Lines Matching refs:dest
203 void Arm64JNIMacroAssembler::LoadImmediate(XRegister dest, int32_t value, Condition cond) { in LoadImmediate() argument
205 ___ Mov(reg_x(dest), value); in LoadImmediate()
211 temps.Exclude(reg_x(dest)); in LoadImmediate()
214 ___ Csel(reg_x(dest), temp, reg_x(dest), cond); in LoadImmediate()
216 ___ Csel(reg_x(dest), reg_x(XZR), reg_x(dest), cond); in LoadImmediate()
222 WRegister dest, in LoadWFromOffset() argument
227 ___ Ldrsb(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset()
230 ___ Ldrsh(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset()
233 ___ Ldrb(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset()
236 ___ Ldrh(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset()
239 ___ Ldr(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset()
248 void Arm64JNIMacroAssembler::LoadFromOffset(XRegister dest, XRegister base, int32_t offset) { in LoadFromOffset() argument
249 CHECK_NE(dest, SP); in LoadFromOffset()
250 ___ Ldr(reg_x(dest), MEM_OP(reg_x(base), offset)); in LoadFromOffset()
253 void Arm64JNIMacroAssembler::LoadSFromOffset(SRegister dest, XRegister base, int32_t offset) { in LoadSFromOffset() argument
254 ___ Ldr(reg_s(dest), MEM_OP(reg_x(base), offset)); in LoadSFromOffset()
257 void Arm64JNIMacroAssembler::LoadDFromOffset(DRegister dest, XRegister base, int32_t offset) { in LoadDFromOffset() argument
258 ___ Ldr(reg_d(dest), MEM_OP(reg_x(base), offset)); in LoadDFromOffset()
261 void Arm64JNIMacroAssembler::Load(Arm64ManagedRegister dest, in Load() argument
265 if (dest.IsNoRegister()) { in Load()
266 CHECK_EQ(0u, size) << dest; in Load()
267 } else if (dest.IsWRegister()) { in Load()
268 CHECK_EQ(4u, size) << dest; in Load()
269 ___ Ldr(reg_w(dest.AsWRegister()), MEM_OP(reg_x(base), offset)); in Load()
270 } else if (dest.IsXRegister()) { in Load()
271 CHECK_NE(dest.AsXRegister(), SP) << dest; in Load()
274 ___ Ldrb(reg_w(dest.AsOverlappingWRegister()), MEM_OP(reg_x(base), offset)); in Load()
276 ___ Ldr(reg_w(dest.AsOverlappingWRegister()), MEM_OP(reg_x(base), offset)); in Load()
278 CHECK_EQ(8u, size) << dest; in Load()
279 ___ Ldr(reg_x(dest.AsXRegister()), MEM_OP(reg_x(base), offset)); in Load()
281 } else if (dest.IsSRegister()) { in Load()
282 ___ Ldr(reg_s(dest.AsSRegister()), MEM_OP(reg_x(base), offset)); in Load()
284 CHECK(dest.IsDRegister()) << dest; in Load()
285 ___ Ldr(reg_d(dest.AsDRegister()), MEM_OP(reg_x(base), offset)); in Load()
386 void Arm64JNIMacroAssembler::CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister m_scratch) { in CopyRef() argument
392 SP, dest.Int32Value()); in CopyRef()
395 void Arm64JNIMacroAssembler::Copy(FrameOffset dest, in Copy() argument
404 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), SP, dest.Int32Value()); in Copy()
407 StoreToOffset(scratch.AsXRegister(), SP, dest.Int32Value()); in Copy()
413 void Arm64JNIMacroAssembler::Copy(FrameOffset dest, in Copy() argument
426 StoreWToOffset(kStoreWord, scratch.AsWRegister(), SP, dest.Int32Value()); in Copy()
429 StoreToOffset(scratch.AsXRegister(), SP, dest.Int32Value()); in Copy()
473 Arm64ManagedRegister dest = m_dest.AsArm64(); in Copy() local
474 CHECK(dest.IsXRegister()) << dest; in Copy()
482 StoreWToOffset(kStoreWord, scratch.AsWRegister(), dest.AsXRegister(), in Copy()
487 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), dest.AsXRegister(), in Copy()
492 StoreToOffset(scratch.AsXRegister(), dest.AsXRegister(), dest_offset.Int32Value()); in Copy()