Lines Matching refs:ep
66 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context() argument
76 security_state = GET_SECURITY_STATE(ep->h.attr); in cm_setup_context()
102 if (GET_RW(ep->spsr) == MODE_RW_64) in cm_setup_context()
109 if (EP_GET_ST(ep->h.attr) != 0U) in cm_setup_context()
178 if (((GET_RW(ep->spsr) == MODE_RW_64) && (GET_EL(ep->spsr) == MODE_EL2)) in cm_setup_context()
179 || ((GET_RW(ep->spsr) != MODE_RW_64) in cm_setup_context()
180 && (GET_M32(ep->spsr) == MODE32_hyp))) { in cm_setup_context()
185 if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) { in cm_setup_context()
186 if (GET_RW(ep->spsr) != MODE_RW_64) { in cm_setup_context()
205 sctlr_elx = (EP_GET_EE(ep->h.attr) != 0U) ? SCTLR_EE_BIT : 0U; in cm_setup_context()
206 if (GET_RW(ep->spsr) == MODE_RW_64) in cm_setup_context()
257 write_ctx_reg(state, CTX_ELR_EL3, ep->pc); in cm_setup_context()
258 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr); in cm_setup_context()
265 memcpy(gp_regs, (void *)&ep->args, sizeof(aapcs64_params_t)); in cm_setup_context()
300 const entry_point_info_t *ep) in cm_init_context_by_index() argument
303 ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr)); in cm_init_context_by_index()
304 cm_setup_context(ctx, ep); in cm_init_context_by_index()
312 void cm_init_my_context(const entry_point_info_t *ep) in cm_init_my_context() argument
315 ctx = cm_get_context(GET_SECURITY_STATE(ep->h.attr)); in cm_init_my_context()
316 cm_setup_context(ctx, ep); in cm_init_my_context()