89 	struct gen7_surface_state *ss;  in gen7_fill_surface_state()  local
100 	ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);  in gen7_fill_surface_state()
101 	offset = intel_batchbuffer_subdata_offset(batch, ss);  in gen7_fill_surface_state()
103 	ss->ss0.surface_type = SURFACE_2D;  in gen7_fill_surface_state()
104 	ss->ss0.surface_format = format;  in gen7_fill_surface_state()
105 	ss->ss0.render_cache_read_write = 1;  in gen7_fill_surface_state()
108 		ss->ss0.tiled_mode = 2;  in gen7_fill_surface_state()
110 		ss->ss0.tiled_mode = 3;  in gen7_fill_surface_state()
112 	ss->ss1.base_addr = buf->bo->offset;  in gen7_fill_surface_state()
114 				intel_batchbuffer_subdata_offset(batch, ss) + 4,  in gen7_fill_surface_state()
119 	ss->ss2.height = igt_buf_height(buf) - 1;  in gen7_fill_surface_state()
120 	ss->ss2.width  = igt_buf_width(buf) - 1;  in gen7_fill_surface_state()
122 	ss->ss3.pitch  = buf->stride - 1;  in gen7_fill_surface_state()
124 	ss->ss7.shader_chanel_select_r = 4;  in gen7_fill_surface_state()
125 	ss->ss7.shader_chanel_select_g = 5;  in gen7_fill_surface_state()
126 	ss->ss7.shader_chanel_select_b = 6;  in gen7_fill_surface_state()
127 	ss->ss7.shader_chanel_select_a = 7;  in gen7_fill_surface_state()
391 	struct gen8_surface_state *ss;  in gen8_fill_surface_state()  local
402 	ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);  in gen8_fill_surface_state()
403 	offset = intel_batchbuffer_subdata_offset(batch, ss);  in gen8_fill_surface_state()
405 	ss->ss0.surface_type = SURFACE_2D;  in gen8_fill_surface_state()
406 	ss->ss0.surface_format = format;  in gen8_fill_surface_state()
407 	ss->ss0.render_cache_read_write = 1;  in gen8_fill_surface_state()
408 	ss->ss0.vertical_alignment = 1; /* align 4 */  in gen8_fill_surface_state()
409 	ss->ss0.horizontal_alignment = 1; /* align 4 */  in gen8_fill_surface_state()
412 		ss->ss0.tiled_mode = 2;  in gen8_fill_surface_state()
414 		ss->ss0.tiled_mode = 3;  in gen8_fill_surface_state()
416 	ss->ss8.base_addr = buf->bo->offset;  in gen8_fill_surface_state()
419 				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,  in gen8_fill_surface_state()
423 	ss->ss2.height = igt_buf_height(buf) - 1;  in gen8_fill_surface_state()
424 	ss->ss2.width  = igt_buf_width(buf) - 1;  in gen8_fill_surface_state()
425 	ss->ss3.pitch  = buf->stride - 1;  in gen8_fill_surface_state()
427 	ss->ss7.shader_chanel_select_r = 4;  in gen8_fill_surface_state()
428 	ss->ss7.shader_chanel_select_g = 5;  in gen8_fill_surface_state()
429 	ss->ss7.shader_chanel_select_b = 6;  in gen8_fill_surface_state()
430 	ss->ss7.shader_chanel_select_a = 7;  in gen8_fill_surface_state()
444 	struct gen8_surface_state *ss;  in gen11_fill_surface_state()  local
455 	ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);  in gen11_fill_surface_state()
456 	offset = intel_batchbuffer_subdata_offset(batch, ss);  in gen11_fill_surface_state()
458 	ss->ss0.surface_type = surface_type;  in gen11_fill_surface_state()
459 	ss->ss0.surface_format = format;  in gen11_fill_surface_state()
460 	ss->ss0.render_cache_read_write = 1;  in gen11_fill_surface_state()
461 	ss->ss0.vertical_alignment = vertical_alignment; /* align 4 */  in gen11_fill_surface_state()
462 	ss->ss0.horizontal_alignment = horizontal_alignment; /* align 4 */  in gen11_fill_surface_state()
465 		ss->ss0.tiled_mode = 2;  in gen11_fill_surface_state()
467 		ss->ss0.tiled_mode = 3;  in gen11_fill_surface_state()
469 		ss->ss0.tiled_mode = 0;  in gen11_fill_surface_state()
471 	ss->ss8.base_addr = buf->bo->offset;  in gen11_fill_surface_state()
474 				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,  in gen11_fill_surface_state()
479 		ss->ss1.memory_object_control = 2;  in gen11_fill_surface_state()
480 		ss->ss2.height = 1;  in gen11_fill_surface_state()
481 		ss->ss2.width  = 95;  in gen11_fill_surface_state()
482 		ss->ss3.pitch  = 0;  in gen11_fill_surface_state()
483 		ss->ss7.shader_chanel_select_r = 4;  in gen11_fill_surface_state()
484 		ss->ss7.shader_chanel_select_g = 5;  in gen11_fill_surface_state()
485 		ss->ss7.shader_chanel_select_b = 6;  in gen11_fill_surface_state()
486 		ss->ss7.shader_chanel_select_a = 7;  in gen11_fill_surface_state()
489 		ss->ss1.qpitch = 4040;  in gen11_fill_surface_state()
490 		ss->ss1.base_mip_level = 31;  in gen11_fill_surface_state()
491 		ss->ss2.height = 9216;  in gen11_fill_surface_state()
492 		ss->ss2.width  = 1019;  in gen11_fill_surface_state()
493 		ss->ss3.pitch  = 64;  in gen11_fill_surface_state()
494 		ss->ss5.mip_count = 2;  in gen11_fill_surface_state()