Lines Matching refs:sdst
79 (outs SReg_64:$sdst), ?, " $sdst", [(set i64:$sdst, (int_amdgcn_s_memtime))]
104 [(set i32:$sdst, (not i32:$src0))]
108 [(set i64:$sdst, (not i64:$src0))]
116 [(set i32:$sdst, (bitreverse i32:$src0))]
124 [(set i32:$sdst, (ctpop i32:$src0))]
132 [(set i32:$sdst, (cttz_zero_undef i32:$src0))]
137 [(set i32:$sdst, (AMDGPUffbh_u32 i32:$src0))]
142 [(set i32:$sdst, (int_AMDGPU_flbit_i32 i32:$src0))]
146 [(set i32:$sdst, (sext_inreg i32:$src0, i8))]
149 [(set i32:$sdst, (sext_inreg i32:$src0, i16))]
199 [(set i32:$sdst, (add SSrc_32:$src0, SSrc_32:$src1))]
205 [(set i32:$sdst, (sub SSrc_32:$src0, SSrc_32:$src1))]
211 [(set i32:$sdst, (adde (i32 SSrc_32:$src0), (i32 SSrc_32:$src1)))]>;
215 [(set i32:$sdst, (sube (i32 SSrc_32:$src0), (i32 SSrc_32:$src1)))]>;
219 [(set i32:$sdst, (smin i32:$src0, i32:$src1))]
222 [(set i32:$sdst, (umin i32:$src0, i32:$src1))]
225 [(set i32:$sdst, (smax i32:$src0, i32:$src1))]
228 [(set i32:$sdst, (umax i32:$src0, i32:$src1))]
240 [(set i32:$sdst, (and i32:$src0, i32:$src1))]
244 [(set i64:$sdst, (and i64:$src0, i64:$src1))]
248 [(set i32:$sdst, (or i32:$src0, i32:$src1))]
252 [(set i64:$sdst, (or i64:$src0, i64:$src1))]
256 [(set i32:$sdst, (xor i32:$src0, i32:$src1))]
260 [(set i64:$sdst, (xor i64:$src0, i64:$src1))]
279 [(set i32:$sdst, (shl i32:$src0, i32:$src1))]
282 [(set i64:$sdst, (shl i64:$src0, i32:$src1))]
285 [(set i32:$sdst, (srl i32:$src0, i32:$src1))]
288 [(set i64:$sdst, (srl i64:$src0, i32:$src1))]
291 [(set i32:$sdst, (sra i32:$src0, i32:$src1))]
294 [(set i64:$sdst, (sra i64:$src0, i32:$src1))]
299 [(set i32:$sdst, (AMDGPUbfm i32:$src0, i32:$src1))]>;
302 [(set i32:$sdst, (mul i32:$src0, i32:$src1))]
314 let sdst = 0 in {
392 Constraints = "$sdst = $src0" in {
399 (ins SReg_64:$sdst, u16imm:$simm16), " $sdst, $simm16"
404 sopk<0x12, 0x11>, "s_getreg_b32", (outs SReg_32:$sdst),
405 (ins hwreg:$simm16), " $sdst, $simm16"
411 (ins SReg_32:$sdst, hwreg:$simm16), " $simm16, $sdst"
1924 def GET_GROUPSTATICSIZE : PseudoInstSI <(outs SReg_32:$sdst), (ins),
1925 [(set SReg_32:$sdst, (int_amdgcn_groupstaticsize))]>;
2038 (outs VGPR_32:$vdst, SReg_64:$sdst),
2042 (outs rc:$vdst, SReg_64:$sdst),