Lines Matching refs:Opc
97 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
129 bool X86SelectFPExtOrFPTrunc(const Instruction *I, unsigned Opc,
357 unsigned Opc = 0; in X86FastEmitLoad() local
363 Opc = X86::MOV8rm; in X86FastEmitLoad()
367 Opc = X86::MOV16rm; in X86FastEmitLoad()
371 Opc = X86::MOV32rm; in X86FastEmitLoad()
376 Opc = X86::MOV64rm; in X86FastEmitLoad()
381 Opc = HasAVX ? X86::VMOVSSrm : X86::MOVSSrm; in X86FastEmitLoad()
384 Opc = X86::LD_Fp32m; in X86FastEmitLoad()
390 Opc = HasAVX ? X86::VMOVSDrm : X86::MOVSDrm; in X86FastEmitLoad()
393 Opc = X86::LD_Fp64m; in X86FastEmitLoad()
402 Opc = HasAVX ? X86::VMOVNTDQArm : X86::MOVNTDQArm; in X86FastEmitLoad()
404 Opc = HasAVX ? X86::VMOVAPSrm : X86::MOVAPSrm; in X86FastEmitLoad()
406 Opc = HasAVX ? X86::VMOVUPSrm : X86::MOVUPSrm; in X86FastEmitLoad()
411 Opc = HasAVX ? X86::VMOVNTDQArm : X86::MOVNTDQArm; in X86FastEmitLoad()
413 Opc = HasAVX ? X86::VMOVAPDrm : X86::MOVAPDrm; in X86FastEmitLoad()
415 Opc = HasAVX ? X86::VMOVUPDrm : X86::MOVUPDrm; in X86FastEmitLoad()
423 Opc = HasAVX ? X86::VMOVNTDQArm : X86::MOVNTDQArm; in X86FastEmitLoad()
425 Opc = HasAVX ? X86::VMOVDQArm : X86::MOVDQArm; in X86FastEmitLoad()
427 Opc = HasAVX ? X86::VMOVDQUrm : X86::MOVDQUrm; in X86FastEmitLoad()
433 Opc = X86::VMOVNTDQAYrm; in X86FastEmitLoad()
435 Opc = (Alignment >= 32) ? X86::VMOVAPSYrm : X86::VMOVUPSYrm; in X86FastEmitLoad()
441 Opc = X86::VMOVNTDQAYrm; in X86FastEmitLoad()
443 Opc = (Alignment >= 32) ? X86::VMOVAPDYrm : X86::VMOVUPDYrm; in X86FastEmitLoad()
452 Opc = X86::VMOVNTDQAYrm; in X86FastEmitLoad()
454 Opc = (Alignment >= 32) ? X86::VMOVDQAYrm : X86::VMOVDQUYrm; in X86FastEmitLoad()
460 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
462 Opc = (Alignment >= 64) ? X86::VMOVAPSZrm : X86::VMOVUPSZrm; in X86FastEmitLoad()
468 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
470 Opc = (Alignment >= 64) ? X86::VMOVAPDZrm : X86::VMOVUPDZrm; in X86FastEmitLoad()
481 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
483 Opc = (Alignment >= 64) ? X86::VMOVDQA64Zrm : X86::VMOVDQU64Zrm; in X86FastEmitLoad()
490 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86FastEmitLoad()
510 unsigned Opc = 0; in X86FastEmitStore() local
523 case MVT::i8: Opc = X86::MOV8mr; break; in X86FastEmitStore()
524 case MVT::i16: Opc = X86::MOV16mr; break; in X86FastEmitStore()
526 Opc = (IsNonTemporal && HasSSE2) ? X86::MOVNTImr : X86::MOV32mr; in X86FastEmitStore()
530 Opc = (IsNonTemporal && HasSSE2) ? X86::MOVNTI_64mr : X86::MOV64mr; in X86FastEmitStore()
535 Opc = X86::MOVNTSS; in X86FastEmitStore()
537 Opc = HasAVX ? X86::VMOVSSmr : X86::MOVSSmr; in X86FastEmitStore()
539 Opc = X86::ST_Fp32m; in X86FastEmitStore()
544 Opc = X86::MOVNTSD; in X86FastEmitStore()
546 Opc = HasAVX ? X86::VMOVSDmr : X86::MOVSDmr; in X86FastEmitStore()
548 Opc = X86::ST_Fp64m; in X86FastEmitStore()
553 Opc = HasAVX ? X86::VMOVNTPSmr : X86::MOVNTPSmr; in X86FastEmitStore()
555 Opc = HasAVX ? X86::VMOVAPSmr : X86::MOVAPSmr; in X86FastEmitStore()
557 Opc = HasAVX ? X86::VMOVUPSmr : X86::MOVUPSmr; in X86FastEmitStore()
562 Opc = HasAVX ? X86::VMOVNTPDmr : X86::MOVNTPDmr; in X86FastEmitStore()
564 Opc = HasAVX ? X86::VMOVAPDmr : X86::MOVAPDmr; in X86FastEmitStore()
566 Opc = HasAVX ? X86::VMOVUPDmr : X86::MOVUPDmr; in X86FastEmitStore()
574 Opc = HasAVX ? X86::VMOVNTDQmr : X86::MOVNTDQmr; in X86FastEmitStore()
576 Opc = HasAVX ? X86::VMOVDQAmr : X86::MOVDQAmr; in X86FastEmitStore()
578 Opc = HasAVX ? X86::VMOVDQUmr : X86::MOVDQUmr; in X86FastEmitStore()
583 Opc = IsNonTemporal ? X86::VMOVNTPSYmr : X86::VMOVAPSYmr; in X86FastEmitStore()
585 Opc = X86::VMOVUPSYmr; in X86FastEmitStore()
590 Opc = IsNonTemporal ? X86::VMOVNTPDYmr : X86::VMOVAPDYmr; in X86FastEmitStore()
592 Opc = X86::VMOVUPDYmr; in X86FastEmitStore()
600 Opc = IsNonTemporal ? X86::VMOVNTDQYmr : X86::VMOVDQAYmr; in X86FastEmitStore()
602 Opc = X86::VMOVDQUYmr; in X86FastEmitStore()
607 Opc = IsNonTemporal ? X86::VMOVNTPSZmr : X86::VMOVAPSZmr; in X86FastEmitStore()
609 Opc = X86::VMOVUPSZmr; in X86FastEmitStore()
614 Opc = IsNonTemporal ? X86::VMOVNTPDZmr : X86::VMOVAPDZmr; in X86FastEmitStore()
616 Opc = X86::VMOVUPDZmr; in X86FastEmitStore()
626 Opc = IsNonTemporal ? X86::VMOVNTDQZmr : X86::VMOVDQA64Zmr; in X86FastEmitStore()
628 Opc = X86::VMOVDQU64Zmr; in X86FastEmitStore()
632 const MCInstrDesc &Desc = TII.get(Opc); in X86FastEmitStore()
658 unsigned Opc = 0; in X86FastEmitStore() local
663 case MVT::i8: Opc = X86::MOV8mi; break; in X86FastEmitStore()
664 case MVT::i16: Opc = X86::MOV16mi; break; in X86FastEmitStore()
665 case MVT::i32: Opc = X86::MOV32mi; break; in X86FastEmitStore()
669 Opc = X86::MOV64mi32; in X86FastEmitStore()
673 if (Opc) { in X86FastEmitStore()
675 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc)); in X86FastEmitStore()
695 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend() argument
698 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend()
756 unsigned Opc = 0; in handleConstantAddresses() local
767 Opc = X86::MOV64rm; in handleConstantAddresses()
773 Opc = X86::MOV32rm; in handleConstantAddresses()
779 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
1491 unsigned Opc = X86::getSETFromCond(CC); in X86SelectCmp() local
1500 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86SelectCmp()
2044 unsigned Opc = X86::getCMovFromCond(CC, RC->getSize()); in X86FastEmitCMoveSelect() local
2045 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect()
2097 unsigned *Opc = nullptr; in X86FastEmitSSESelect() local
2100 case MVT::f32: Opc = &OpcTable[0][0]; break; in X86FastEmitSSESelect()
2101 case MVT::f64: Opc = &OpcTable[1][0]; break; in X86FastEmitSSESelect()
2147 unsigned CmpReg = fastEmitInst_rri(Opc[0], RC, CmpLHSReg, CmpLHSIsKill, in X86FastEmitSSESelect()
2149 unsigned AndReg = fastEmitInst_rr(Opc[1], RC, CmpReg, /*IsKill=*/false, in X86FastEmitSSESelect()
2151 unsigned AndNReg = fastEmitInst_rr(Opc[2], RC, CmpReg, /*IsKill=*/true, in X86FastEmitSSESelect()
2153 ResultReg = fastEmitInst_rr(Opc[3], RC, AndNReg, /*IsKill=*/true, in X86FastEmitSSESelect()
2163 unsigned Opc; in X86FastEmitPseudoSelect() local
2166 case MVT::i8: Opc = X86::CMOV_GR8; break; in X86FastEmitPseudoSelect()
2167 case MVT::i16: Opc = X86::CMOV_GR16; break; in X86FastEmitPseudoSelect()
2168 case MVT::i32: Opc = X86::CMOV_GR32; break; in X86FastEmitPseudoSelect()
2169 case MVT::f32: Opc = X86::CMOV_FR32; break; in X86FastEmitPseudoSelect()
2170 case MVT::f64: Opc = X86::CMOV_FR64; break; in X86FastEmitPseudoSelect()
2219 fastEmitInst_rri(Opc, RC, RHSReg, RHSIsKill, LHSReg, LHSIsKill, CC); in X86FastEmitPseudoSelect()
2335 unsigned Opc = Subtarget->hasAVX() ? X86::VCVTSS2SDrr : X86::CVTSS2SDrr; in X86SelectFPExt() local
2336 return X86SelectFPExtOrFPTrunc(I, Opc, &X86::FR64RegClass); in X86SelectFPExt()
2346 unsigned Opc = Subtarget->hasAVX() ? X86::VCVTSD2SSrr : X86::CVTSD2SSrr; in X86SelectFPTrunc() local
2347 return X86SelectFPExtOrFPTrunc(I, Opc, &X86::FR32RegClass); in X86SelectFPTrunc()
2516 unsigned Opc; in fastLowerIntrinsicCall() local
2521 case MVT::i32: Opc = X86::MOV32rm; RC = &X86::GR32RegClass; break; in fastLowerIntrinsicCall()
2522 case MVT::i64: Opc = X86::MOV64rm; RC = &X86::GR64RegClass; break; in fastLowerIntrinsicCall()
2553 TII.get(Opc), DestReg), SrcReg); in fastLowerIntrinsicCall()
2658 unsigned Opc; in fastLowerIntrinsicCall() local
2662 case MVT::f32: Opc = SqrtOpc[0][HasAVX]; RC = &X86::FR32RegClass; break; in fastLowerIntrinsicCall()
2663 case MVT::f64: Opc = SqrtOpc[1][HasAVX]; RC = &X86::FR64RegClass; break; in fastLowerIntrinsicCall()
2681 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), in fastLowerIntrinsicCall()
2753 static const uint16_t Opc[2][4] = { in fastLowerIntrinsicCall() local
2762 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg) in fastLowerIntrinsicCall()
2854 unsigned Opc; in fastLowerIntrinsicCall() local
2857 case MVT::i32: Opc = CvtOpc[IsInputDouble][0][HasAVX]; break; in fastLowerIntrinsicCall()
2858 case MVT::i64: Opc = CvtOpc[IsInputDouble][1][HasAVX]; break; in fastLowerIntrinsicCall()
2881 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
3382 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; in fastLowerCall() local
3386 TII.get(Opc)), FI) in fastLowerCall()
3388 Opc = ResVT == MVT::f32 ? X86::MOVSSrm : X86::MOVSDrm; in fastLowerCall()
3390 TII.get(Opc), ResultReg + i), FI); in fastLowerCall()
3507 unsigned Opc = 0; in X86MaterializeInt() local
3511 case MVT::i8: Opc = X86::MOV8ri; break; in X86MaterializeInt()
3512 case MVT::i16: Opc = X86::MOV16ri; break; in X86MaterializeInt()
3513 case MVT::i32: Opc = X86::MOV32ri; break; in X86MaterializeInt()
3516 Opc = X86::MOV32ri; in X86MaterializeInt()
3518 Opc = X86::MOV64ri32; in X86MaterializeInt()
3520 Opc = X86::MOV64ri; in X86MaterializeInt()
3524 if (VT == MVT::i64 && Opc == X86::MOV32ri) { in X86MaterializeInt()
3525 unsigned SrcReg = fastEmitInst_i(Opc, &X86::GR32RegClass, Imm); in X86MaterializeInt()
3532 return fastEmitInst_i(Opc, TLI.getRegClassFor(VT), Imm); in X86MaterializeInt()
3545 unsigned Opc = 0; in X86MaterializeFP() local
3551 Opc = Subtarget->hasAVX() ? X86::VMOVSSrm : X86::MOVSSrm; in X86MaterializeFP()
3554 Opc = X86::LD_Fp32m; in X86MaterializeFP()
3560 Opc = Subtarget->hasAVX() ? X86::VMOVSDrm : X86::MOVSDrm; in X86MaterializeFP()
3563 Opc = X86::LD_Fp64m; in X86MaterializeFP()
3599 TII.get(Opc), ResultReg); in X86MaterializeFP()
3609 TII.get(Opc), ResultReg), in X86MaterializeFP()
3637 unsigned Opc = in X86MaterializeGV() local
3642 TII.get(Opc), ResultReg), AM); in X86MaterializeGV()
3682 unsigned Opc = in fastMaterializeAlloca() local
3689 TII.get(Opc), ResultReg), AM); in fastMaterializeAlloca()
3699 unsigned Opc = 0; in fastMaterializeFloatZero() local
3705 Opc = X86::FsFLD0SS; in fastMaterializeFloatZero()
3708 Opc = X86::LD_Fp032; in fastMaterializeFloatZero()
3714 Opc = X86::FsFLD0SD; in fastMaterializeFloatZero()
3717 Opc = X86::LD_Fp064; in fastMaterializeFloatZero()
3727 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in fastMaterializeFloatZero()