43 …word_operand_stride(chip_class chip, const aco_ptr<Instruction>& instr, unsigned idx, RegClass rc);
44 …bdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte, RegClass rc);
45 …ed> get_subdword_definition_info(Program *program, const aco_ptr<Instruction>& instr, RegClass rc);
50    RegClass rc;
53    assignment(PhysReg reg, RegClass rc) : reg(reg), rc(rc), assigned(-1) {}  in assignment()
96    RegClass rc;
98    DefInfo(ra_ctx& ctx, aco_ptr<Instruction>& instr, RegClass rc_, int operand) : rc(rc_) {  in DefInfo()
121             rc = RegClass::get(rc.type(), info.second);  in DefInfo()
172    void block(PhysReg start, RegClass rc) {  in block()
197    void clear(PhysReg start, RegClass rc) {  in clear()
321 …dword_operand_stride(chip_class chip, const aco_ptr<Instruction>& instr, unsigned idx, RegClass rc)  in get_subdword_operand_stride()
370 …ubdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte, RegClass rc)  in add_subdword_operand()
437 …ned> get_subdword_definition_info(Program *program, const aco_ptr<Instruction>& instr, RegClass rc)  in get_subdword_definition_info()
492    RegClass rc = instr->definitions[idx].regClass();  in add_subdword_definition()
535 void adjust_max_used_regs(ra_ctx& ctx, RegClass rc, unsigned reg)  in adjust_max_used_regs()
612    RegClass rc = info.rc;  in get_reg_simple()
615       info.rc = RegClass(rc.type(), size);  in get_reg_simple()
942    RegClass rc = info.rc;  in get_reg_impl()
992       bool aligned = rc == RegClass::v4 && reg_lo % 4 == 0;  in get_reg_impl()
1133                        RegClass rc,  in get_reg_specified()
1290    RegClass rc = temp.regClass();  in get_reg_create_vector()
1375       bool aligned = rc == RegClass::v4 && reg_lo % 4 == 0;  in get_reg_create_vector()
1501 …d_can_use_reg(chip_class chip, aco_ptr<Instruction>& instr, unsigned idx, PhysReg reg, RegClass rc)  in operand_can_use_reg()
1550          RegClass rc = ctx.assignments[blocking_id].rc;  in get_reg_for_operand()