Lines Matching defs:bits
12385 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"}, array
12386 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"}, array
12387 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"}, array
12388 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"}, array
12389 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"}, array
12390 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"}, array
12391 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"}, array
12392 {"bits": [30, 30], "name": "ENABLE"}, array
12393 {"bits": [31, 31], "name": "DISABLE_ROP3"} array
12398 {"bits": [0, 31], "name": "BLEND_ALPHA"} array
12403 {"bits": [0, 31], "name": "BLEND_BLUE"} array
12408 {"bits": [0, 31], "name": "BLEND_GREEN"} array
12413 {"bits": [0, 31], "name": "BLEND_RED"} array
12418 {"bits": [0, 4], "name": "TILE_MODE_INDEX"}, array
12419 {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"}, array
12420 {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"}, array
12421 {"bits": [12, 14], "name": "NUM_SAMPLES"}, array
12422 {"bits": [15, 16], "name": "NUM_FRAGMENTS"}, array
12423 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}, array
12424 {"bits": [18, 18], "name": "DISABLE_FMASK_NOFETCH_OPT"}, array
12425 {"bits": [19, 19], "name": "LIMIT_COLOR_FETCH_TO_256B_MAX"} array
12430 {"bits": [0, 13], "name": "MIP0_HEIGHT"}, array
12431 {"bits": [14, 27], "name": "MIP0_WIDTH"}, array
12432 {"bits": [28, 31], "name": "MAX_MIP"} array
12437 {"bits": [0, 12], "name": "MIP0_DEPTH"}, array
12438 {"bits": [13, 13], "name": "META_LINEAR"}, array
12439 {"bits": [14, 18], "name": "COLOR_SW_MODE"}, array
12440 {"bits": [19, 23], "name": "FMASK_SW_MODE"}, array
12441 {"bits": [24, 25], "name": "RESOURCE_TYPE"}, array
12442 {"bits": [26, 26], "name": "CMASK_PIPE_ALIGNED"}, array
12443 {"bits": [27, 29], "name": "RESOURCE_LEVEL"}, array
12444 {"bits": [30, 30], "name": "DCC_PIPE_ALIGNED"}, array
12445 {"bits": [31, 31], "name": "VRS_RATE_HINT_ENABLE"} array
12450 {"bits": [0, 7], "name": "BASE_256B"} array
12455 {"bits": [0, 31], "name": "CLEAR_WORD0"} array
12460 {"bits": [0, 31], "name": "CLEAR_WORD1"} array
12465 {"bits": [0, 13], "name": "TILE_MAX"} array
12470 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, array
12471 {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"}, array
12472 …{"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNC… array
12473 …{"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPR… array
12474 {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"}, array
12475 {"bits": [7, 8], "name": "COLOR_TRANSFORM"}, array
12476 {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"}, array
12477 {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"}, array
12478 {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}, array
12479 {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"}, array
12480 {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"}, array
12481 {"bits": [20, 20], "name": "INDEPENDENT_128B_BLOCKS"}, array
12482 {"bits": [21, 21], "name": "SKIP_LOW_COMP_RATIO"}, array
12483 {"bits": [22, 22], "name": "DCC_COMPRESS_DISABLE"} array
12488 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"}, array
12489 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"}, array
12490 {"bits": [7, 7], "name": "LINEAR_GENERAL"}, array
12491 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"}, array
12492 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"}, array
12493 {"bits": [13, 13], "name": "FAST_CLEAR"}, array
12494 {"bits": [14, 14], "name": "COMPRESSION"}, array
12495 {"bits": [15, 15], "name": "BLEND_CLAMP"}, array
12496 {"bits": [16, 16], "name": "BLEND_BYPASS"}, array
12497 {"bits": [17, 17], "name": "SIMPLE_FLOAT"}, array
12498 {"bits": [18, 18], "name": "ROUND_MODE"}, array
12499 {"bits": [19, 19], "name": "CMASK_IS_LINEAR"}, array
12500 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"}, array
12501 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"}, array
12502 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}, array
12503 {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"}, array
12504 {"bits": [28, 28], "name": "DCC_ENABLE"}, array
12505 {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}, array
12506 {"bits": [31, 31], "name": "NBC_TILING"} array
12511 {"bits": [0, 10], "name": "TILE_MAX"}, array
12512 {"bits": [20, 30], "name": "FMASK_TILE_MAX"} array
12517 {"bits": [0, 21], "name": "TILE_MAX"} array
12522 {"bits": [0, 12], "name": "SLICE_START"}, array
12523 {"bits": [13, 25], "name": "SLICE_MAX"}, array
12524 {"bits": [26, 29], "name": "MIP_LEVEL"} array
12529 {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"}, array
12530 {"bits": [1, 1], "name": "ENABLE_1FRAG_PS_INVOKE"}, array
12531 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"}, array
12532 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"}, array
12533 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"} array
12538 {"bits": [0, 0], "name": "COVERAGE_OUT_ENABLE"}, array
12539 {"bits": [1, 3], "name": "COVERAGE_OUT_MRT"}, array
12540 {"bits": [4, 5], "name": "COVERAGE_OUT_CHANNEL"}, array
12541 {"bits": [8, 11], "name": "COVERAGE_OUT_SAMPLES"} array
12546 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, array
12547 {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}, array
12548 {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"}, array
12549 {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"}, array
12550 {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"}, array
12551 {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"}, array
12552 {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"}, array
12553 {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"} array
12558 {"bits": [0, 8], "name": "PERF_SEL"}, array
12559 {"bits": [10, 18], "name": "PERF_SEL1"}, array
12560 {"bits": [20, 23], "name": "CNTR_MODE"}, array
12561 {"bits": [24, 27], "name": "PERF_MODE1"}, array
12562 {"bits": [28, 31], "name": "PERF_MODE"} array
12567 {"bits": [0, 8], "name": "PERF_SEL2"}, array
12568 {"bits": [10, 18], "name": "PERF_SEL3"}, array
12569 {"bits": [24, 27], "name": "PERF_MODE3"}, array
12570 {"bits": [28, 31], "name": "PERF_MODE2"} array
12575 {"bits": [0, 8], "name": "PERF_SEL"}, array
12576 {"bits": [28, 31], "name": "PERF_MODE"} array
12581 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"}, array
12582 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"}, array
12583 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"}, array
12584 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"}, array
12585 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"}, array
12586 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"}, array
12587 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"}, array
12588 {"bits": [13, 15], "name": "MRT_FILTER_SEL"}, array
12589 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"}, array
12590 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"}, array
12591 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"}, array
12592 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"} array
12597 {"bits": [0, 1], "enum_ref": "WritePolicy", "name": "CMASK_WR_POLICY"}, array
12598 {"bits": [2, 3], "enum_ref": "WritePolicy", "name": "FMASK_WR_POLICY"}, array
12599 {"bits": [4, 5], "enum_ref": "WritePolicy", "name": "DCC_WR_POLICY"}, array
12600 {"bits": [6, 7], "enum_ref": "WritePolicy", "name": "COLOR_WR_POLICY"}, array
12601 {"bits": [16, 17], "enum_ref": "ReadPolicy", "name": "CMASK_RD_POLICY"}, array
12602 {"bits": [18, 19], "enum_ref": "ReadPolicy", "name": "FMASK_RD_POLICY"}, array
12603 {"bits": [20, 21], "enum_ref": "ReadPolicy", "name": "DCC_RD_POLICY"}, array
12604 {"bits": [22, 23], "enum_ref": "ReadPolicy", "name": "COLOR_RD_POLICY"}, array
12605 {"bits": [24, 24], "name": "CMASK_L3_BYPASS"}, array
12606 {"bits": [25, 25], "name": "FMASK_L3_BYPASS"}, array
12607 {"bits": [26, 26], "name": "DCC_L3_BYPASS"}, array
12608 {"bits": [27, 27], "name": "COLOR_L3_BYPASS"}, array
12609 {"bits": [30, 30], "name": "FMASK_BIG_PAGE"}, array
12610 {"bits": [31, 31], "name": "COLOR_BIG_PAGE"} array
12615 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"}, array
12616 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"}, array
12617 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"}, array
12618 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"}, array
12619 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"}, array
12620 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"}, array
12621 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"}, array
12622 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"} array
12627 {"bits": [0, 3], "name": "TARGET0_ENABLE"}, array
12628 {"bits": [4, 7], "name": "TARGET1_ENABLE"}, array
12629 {"bits": [8, 11], "name": "TARGET2_ENABLE"}, array
12630 {"bits": [12, 15], "name": "TARGET3_ENABLE"}, array
12631 {"bits": [16, 19], "name": "TARGET4_ENABLE"}, array
12632 {"bits": [20, 23], "name": "TARGET5_ENABLE"}, array
12633 {"bits": [24, 27], "name": "TARGET6_ENABLE"}, array
12634 {"bits": [28, 31], "name": "TARGET7_ENABLE"} array
12639 {"bits": [0, 31], "name": "DEST_BASE_256B"} array
12644 {"bits": [0, 7], "name": "DEST_BASE_HI_256B"} array
12649 {"bits": [0, 10], "name": "INDEX"} array
12654 {"bits": [0, 31], "name": "CU_EN"} array
12659 {"bits": [0, 31], "name": "SIZE"} array
12664 {"bits": [0, 31], "name": "DISPATCH_ID"} array
12669 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"}, array
12670 {"bits": [1, 1], "name": "PARTIAL_TG_EN"}, array
12671 {"bits": [2, 2], "name": "FORCE_START_AT_000"}, array
12672 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"}, array
12673 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"}, array
12674 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"}, array
12675 {"bits": [6, 6], "name": "ORDER_MODE"}, array
12676 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"}, array
12677 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"}, array
12678 {"bits": [12, 12], "name": "RESERVED"}, array
12679 {"bits": [13, 13], "name": "TUNNEL_ENABLE"}, array
12680 {"bits": [14, 14], "name": "RESTORE"}, array
12681 {"bits": [15, 15], "name": "CS_W32_EN"} array
12686 {"bits": [0, 9], "name": "OFF_DELAY"}, array
12687 {"bits": [10, 10], "name": "IMMEDIATE"} array
12692 {"bits": [0, 1], "name": "SEND_SEID"}, array
12693 {"bits": [2, 2], "name": "RESERVED2"}, array
12694 {"bits": [3, 3], "name": "RESERVED3"}, array
12695 {"bits": [4, 4], "name": "RESERVED4"}, array
12696 {"bits": [5, 16], "name": "WAVE_ID_BASE"} array
12701 {"bits": [0, 15], "name": "NUM_THREAD_FULL"}, array
12702 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"} array
12707 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"} array
12712 {"bits": [0, 7], "name": "DATA"} array
12717 {"bits": [0, 5], "name": "VGPRS"}, array
12718 {"bits": [6, 9], "name": "SGPRS"}, array
12719 {"bits": [10, 11], "name": "PRIORITY"}, array
12720 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
12721 {"bits": [20, 20], "name": "PRIV"}, array
12722 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
12723 {"bits": [23, 23], "name": "IEEE_MODE"}, array
12724 {"bits": [24, 24], "name": "BULKY"}, array
12725 {"bits": [26, 26], "name": "FP16_OVFL"}, array
12726 {"bits": [29, 29], "name": "WGP_MODE"}, array
12727 {"bits": [30, 30], "name": "MEM_ORDERED"}, array
12728 {"bits": [31, 31], "name": "FWD_PROGRESS"} array
12733 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
12734 {"bits": [1, 5], "name": "USER_SGPR"}, array
12735 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
12736 {"bits": [7, 7], "name": "TGID_X_EN"}, array
12737 {"bits": [8, 8], "name": "TGID_Y_EN"}, array
12738 {"bits": [9, 9], "name": "TGID_Z_EN"}, array
12739 {"bits": [10, 10], "name": "TG_SIZE_EN"}, array
12740 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"}, array
12741 {"bits": [13, 14], "name": "EXCP_EN_MSB"}, array
12742 {"bits": [15, 23], "name": "LDS_SIZE"}, array
12743 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} array
12748 {"bits": [0, 3], "name": "SHARED_VGPR_CNT"} array
12753 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"} array
12758 {"bits": [0, 29], "name": "PAYLOAD"}, array
12759 {"bits": [30, 30], "name": "IS_EVENT"}, array
12760 {"bits": [31, 31], "name": "IS_STATE"} array
12765 {"bits": [0, 0], "name": "SOFT_GROUPING_EN"}, array
12766 {"bits": [1, 4], "name": "NUMBER_OF_REQUESTS_PER_CU"}, array
12767 {"bits": [5, 8], "name": "SOFT_GROUPING_ALLOCATION_TIMEOUT"}, array
12768 {"bits": [9, 9], "name": "HARD_LOCK_HYSTERESIS"}, array
12769 {"bits": [10, 14], "name": "HARD_LOCK_LOW_THRESHOLD"}, array
12770 {"bits": [15, 15], "name": "PRODUCER_REQUEST_LOCKOUT"}, array
12771 {"bits": [16, 16], "name": "GLOBAL_SCANNING_EN"}, array
12772 {"bits": [17, 19], "name": "ALLOCATION_RATE_THROTTLING_THRESHOLD"}, array
12773 {"bits": [20, 26], "name": "DEDICATED_PREALLOCATION_BUFFER_LIMIT"} array
12778 {"bits": [0, 9], "name": "WAVES_PER_SH"}, array
12779 {"bits": [12, 15], "name": "TG_PER_CU"}, array
12780 {"bits": [16, 21], "name": "LOCK_THRESHOLD"}, array
12781 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"}, array
12782 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"}, array
12783 {"bits": [24, 26], "name": "CU_GROUP_COUNT"} array
12788 {"bits": [0, 31], "name": "RESTART"} array
12793 {"bits": [0, 31], "name": "START"} array
12798 {"bits": [0, 31], "name": "THREADGROUP_ID"} array
12803 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"} array
12808 {"bits": [0, 11], "name": "WAVES"}, array
12809 {"bits": [12, 24], "name": "WAVESIZE"} array
12814 {"bits": [0, 3], "name": "DATA"} array
12819 {"bits": [0, 15], "name": "ADDR"} array
12824 {"bits": [0, 31], "name": "ADDR"} array
12829 {"bits": [0, 3], "name": "INDEX"}, array
12830 {"bits": [30, 30], "name": "CLEAR"}, array
12831 {"bits": [31, 31], "name": "ENABLE"} array
12836 {"bits": [0, 2], "name": "INDEX"}, array
12837 {"bits": [30, 30], "name": "ALWAYS"}, array
12838 {"bits": [31, 31], "name": "ENABLE"} array
12843 {"bits": [0, 4], "name": "INDEX"}, array
12844 {"bits": [30, 30], "name": "CLEAR"}, array
12845 {"bits": [31, 31], "name": "ENABLE"} array
12850 {"bits": [0, 9], "name": "PERF_SEL2"}, array
12851 {"bits": [10, 19], "name": "PERF_SEL3"}, array
12852 {"bits": [24, 27], "name": "CNTR_MODE3"}, array
12853 {"bits": [28, 31], "name": "CNTR_MODE2"} array
12858 {"bits": [0, 31], "name": "PERFCOUNTER_HI"} array
12863 {"bits": [0, 31], "name": "PERFCOUNTER_LO"} array
12868 {"bits": [0, 9], "name": "PERF_SEL"}, array
12869 {"bits": [10, 19], "name": "PERF_SEL1"}, array
12870 {"bits": [20, 23], "name": "SPM_MODE"}, array
12871 {"bits": [24, 27], "name": "CNTR_MODE1"}, array
12872 {"bits": [28, 31], "name": "CNTR_MODE0"} array
12877 {"bits": [0, 4], "name": "INDEX"}, array
12878 {"bits": [30, 30], "name": "ALWAYS"}, array
12879 {"bits": [31, 31], "name": "ENABLE"} array
12884 {"bits": [0, 15], "name": "MEM_ADDR_HI"}, array
12885 {"bits": [16, 16], "name": "CS_PS_SEL"}, array
12886 {"bits": [25, 26], "name": "CACHE_POLICY"}, array
12887 {"bits": [29, 31], "name": "COMMAND"} array
12892 {"bits": [2, 31], "name": "MEM_ADDR_LO"} array
12897 {"bits": [0, 31], "name": "LAST_FENCE"} array
12902 {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"} array
12907 {"bits": [0, 15], "name": "IB1_BASE_HI"} array
12912 {"bits": [2, 31], "name": "IB1_BASE_LO"} array
12917 {"bits": [0, 19], "name": "IB1_BUFSZ"} array
12922 {"bits": [0, 19], "name": "IB1_CMD_REQSZ"} array
12927 {"bits": [0, 19], "name": "IB1_OFFSET"} array
12932 {"bits": [0, 15], "name": "IB2_BASE_HI"} array
12937 {"bits": [2, 31], "name": "IB2_BASE_LO"} array
12942 {"bits": [0, 19], "name": "IB2_BUFSZ"} array
12947 {"bits": [0, 19], "name": "IB2_CMD_REQSZ"} array
12952 {"bits": [0, 15], "name": "INIT_BASE_HI"} array
12957 {"bits": [5, 31], "name": "INIT_BASE_LO"} array
12962 {"bits": [0, 11], "name": "INIT_BUFSZ"} array
12967 {"bits": [0, 11], "name": "INIT_CMD_REQSZ"} array
12972 {"bits": [0, 31], "name": "COHER_BASE_256B"} array
12977 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"} array
12982 {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"}, array
12983 {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"}, array
12984 {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"}, array
12985 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"}, array
12986 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"}, array
12987 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"}, array
12988 {"bits": [23, 23], "name": "TC_ACTION_ENA"}, array
12989 {"bits": [25, 25], "name": "CB_ACTION_ENA"}, array
12990 {"bits": [26, 26], "name": "DB_ACTION_ENA"}, array
12991 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"}, array
12992 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"}, array
12993 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}, array
12994 {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"} array
12999 {"bits": [0, 31], "name": "COHER_SIZE_256B"} array
13004 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"} array
13009 {"bits": [0, 5], "name": "START_DELAY_COUNT"} array
13014 {"bits": [24, 25], "name": "MEID"}, array
13015 {"bits": [31, 31], "name": "STATUS"} array
13020 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"}, array
13021 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"}, array
13022 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"}, array
13023 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"}, array
13024 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"}, array
13025 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"}, array
13026 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"}, array
13027 {"bits": [7, 7], "name": "MEC1_TC_BUSY"}, array
13028 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"}, array
13029 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"}, array
13030 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"}, array
13031 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"}, array
13032 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"}, array
13033 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"}, array
13034 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"}, array
13035 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"}, array
13036 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"}, array
13037 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"}, array
13038 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"}, array
13039 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"}, array
13040 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"}, array
13041 {"bits": [23, 23], "name": "MEC2_TC_BUSY"}, array
13042 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"}, array
13043 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"}, array
13044 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"}, array
13045 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"}, array
13046 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"}, array
13047 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"} array
13052 {"bits": [0, 0], "name": "MES_LOAD_BUSY"}, array
13053 {"bits": [2, 2], "name": "MES_MUTEX_BUSY"}, array
13054 {"bits": [3, 3], "name": "MES_MESSAGE_BUSY"}, array
13055 {"bits": [7, 7], "name": "MES_TC_BUSY"}, array
13056 {"bits": [8, 8], "name": "MES_DMA_BUSY"}, array
13057 {"bits": [10, 10], "name": "MES_PIPE0_BUSY"}, array
13058 {"bits": [11, 11], "name": "MES_PIPE1_BUSY"}, array
13059 {"bits": [12, 12], "name": "MES_PIPE2_BUSY"}, array
13060 {"bits": [13, 13], "name": "MES_PIPE3_BUSY"} array
13065 {"bits": [0, 5], "name": "FREE_COUNT"} array
13070 {"bits": [0, 3], "name": "COUNT"} array
13075 {"bits": [0, 15], "name": "PRIV_VIOLATION_ADDR"} array
13080 {"bits": [0, 31], "name": "SCRATCH_DATA"} array
13085 {"bits": [0, 8], "name": "SCRATCH_INDEX"}, array
13086 {"bits": [31, 31], "name": "SCRATCH_INDEX_64BIT_MODE"} array
13091 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"}, array
13092 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"}, array
13093 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"}, array
13094 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"}, array
13095 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"}, array
13096 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"}, array
13097 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"}, array
13098 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"}, array
13099 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"}, array
13100 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"}, array
13101 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"}, array
13102 {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"}, array
13103 {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"}, array
13104 {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"}, array
13105 {"bits": [25, 25], "name": "GCRIU_WAITING_ON_FREE"} array
13110 {"bits": [0, 0], "name": "MEC1_BUSY"}, array
13111 {"bits": [1, 1], "name": "MEC2_BUSY"}, array
13112 {"bits": [2, 2], "name": "DC0_BUSY"}, array
13113 {"bits": [3, 3], "name": "DC1_BUSY"}, array
13114 {"bits": [4, 4], "name": "RCIU1_BUSY"}, array
13115 {"bits": [5, 5], "name": "RCIU2_BUSY"}, array
13116 {"bits": [6, 6], "name": "ROQ1_BUSY"}, array
13117 {"bits": [7, 7], "name": "ROQ2_BUSY"}, array
13118 {"bits": [10, 10], "name": "TCIU_BUSY"}, array
13119 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"}, array
13120 {"bits": [12, 12], "name": "QU_BUSY"}, array
13121 {"bits": [13, 13], "name": "UTCL2IU_BUSY"}, array
13122 {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"}, array
13123 {"bits": [15, 15], "name": "GCRIU_BUSY"}, array
13124 {"bits": [16, 16], "name": "MES_BUSY"}, array
13125 {"bits": [17, 17], "name": "MES_SCRATCH_RAM_BUSY"}, array
13126 {"bits": [18, 18], "name": "RCIU3_BUSY"}, array
13127 {"bits": [19, 19], "name": "MES_INSTRUCTION_CACHE_BUSY"}, array
13128 {"bits": [29, 29], "name": "CPG_CPC_BUSY"}, array
13129 {"bits": [30, 30], "name": "CPF_CPC_BUSY"}, array
13130 {"bits": [31, 31], "name": "CPC_BUSY"} array
13135 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"}, array
13136 {"bits": [1, 1], "name": "CSF_RING_BUSY"}, array
13137 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"}, array
13138 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"}, array
13139 {"bits": [4, 4], "name": "CSF_STATE_BUSY"}, array
13140 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"}, array
13141 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"}, array
13142 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"}, array
13143 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"}, array
13144 {"bits": [9, 9], "name": "CSF_DATA_BUSY"}, array
13145 {"bits": [10, 10], "name": "CSF_CE_DATA_BUSY"}, array
13146 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"}, array
13147 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"}, array
13148 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"}, array
13149 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"}, array
13150 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"}, array
13151 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"}, array
13152 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"}, array
13153 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"}, array
13154 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"}, array
13155 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"}, array
13156 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"}, array
13157 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"}, array
13158 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"}, array
13159 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"}, array
13160 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"}, array
13161 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"}, array
13162 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"}, array
13163 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"}, array
13164 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"}, array
13165 {"bits": [30, 30], "name": "HQD_PQ_BUSY"}, array
13166 {"bits": [31, 31], "name": "HQD_IB_BUSY"} array
13171 {"bits": [12, 12], "name": "MES_HQD_DISPATCH_BUSY"}, array
13172 {"bits": [14, 14], "name": "MES_HQD_DMA_OFFLOAD_BUSY"}, array
13173 {"bits": [17, 17], "name": "MES_HQD_MESSAGE_BUSY"}, array
13174 {"bits": [18, 18], "name": "MES_HQD_PQ_FETCHER_BUSY"}, array
13175 {"bits": [22, 22], "name": "MES_HQD_CONSUMED_RPTR_BUSY"}, array
13176 {"bits": [23, 23], "name": "MES_HQD_FETCHER_ARB_BUSY"}, array
13177 {"bits": [24, 24], "name": "MES_HQD_ROQ_ALIGN_BUSY"}, array
13178 {"bits": [27, 27], "name": "MES_HQD_ROQ_PQ_BUSY"}, array
13179 {"bits": [30, 30], "name": "MES_HQD_PQ_BUSY"} array
13184 {"bits": [0, 2], "name": "FREE_COUNT"} array
13189 {"bits": [0, 0], "name": "RING_FETCHING_DATA"}, array
13190 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"}, array
13191 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"}, array
13192 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"}, array
13193 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"}, array
13194 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"}, array
13195 {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"}, array
13196 {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"}, array
13197 {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"}, array
13198 {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"}, array
13199 {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"}, array
13200 {"bits": [12, 12], "name": "DATA_FETCHING_DATA"}, array
13201 {"bits": [13, 13], "name": "GCRIU_WAIT_ON_FREE"} array
13206 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"}, array
13207 {"bits": [1, 1], "name": "CSF_BUSY"}, array
13208 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"}, array
13209 {"bits": [5, 5], "name": "ROQ_RING_BUSY"}, array
13210 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"}, array
13211 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"}, array
13212 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"}, array
13213 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"}, array
13214 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"}, array
13215 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"}, array
13216 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"}, array
13217 {"bits": [13, 13], "name": "INTERRUPT_BUSY"}, array
13218 {"bits": [14, 14], "name": "TCIU_BUSY"}, array
13219 {"bits": [15, 15], "name": "HQD_BUSY"}, array
13220 {"bits": [16, 16], "name": "PRT_BUSY"}, array
13221 {"bits": [17, 17], "name": "UTCL2IU_BUSY"}, array
13222 {"bits": [18, 18], "name": "RCIU_BUSY"}, array
13223 {"bits": [19, 19], "name": "RCIU_GFX_BUSY"}, array
13224 {"bits": [20, 20], "name": "RCIU_CMP_BUSY"}, array
13225 {"bits": [21, 21], "name": "ROQ_DATA_BUSY"}, array
13226 {"bits": [22, 22], "name": "ROQ_CE_DATA_BUSY"}, array
13227 {"bits": [23, 23], "name": "GCRIU_BUSY"}, array
13228 {"bits": [24, 24], "name": "MES_HQD_BUSY"}, array
13229 {"bits": [26, 26], "name": "CPF_GFX_BUSY"}, array
13230 {"bits": [27, 27], "name": "CPF_CMP_BUSY"}, array
13231 {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"}, array
13232 {"bits": [30, 30], "name": "CPC_CPF_BUSY"}, array
13233 {"bits": [31, 31], "name": "CPF_BUSY"} array
13238 {"bits": [0, 15], "name": "DB_BASE_HI"} array
13243 {"bits": [2, 31], "name": "DB_BASE_LO"} array
13248 {"bits": [0, 19], "name": "DB_BUFSZ"} array
13253 {"bits": [0, 19], "name": "DB_CMD_REQSZ"} array
13258 {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"}, array
13259 {"bits": [1, 1], "name": "WATCH_CONTROL"}, array
13260 {"bits": [4, 5], "name": "MIN_AVAILSZ"}, array
13261 {"bits": [16, 24], "name": "BUFFER_DEPTH"}, array
13262 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"}, array
13263 {"bits": [29, 29], "name": "PIO_FIFO_FULL"}, array
13264 {"bits": [30, 31], "name": "PIO_COUNT"} array
13269 {"bits": [0, 15], "name": "ADDR_HI"}, array
13270 {"bits": [16, 31], "name": "RSVD"} array
13275 {"bits": [0, 1], "name": "RSVD"}, array
13276 {"bits": [2, 31], "name": "ADDR_LO"} array
13281 {"bits": [0, 25], "name": "BYTE_COUNT"}, array
13282 {"bits": [26, 26], "name": "SAS"}, array
13283 {"bits": [27, 27], "name": "DAS"}, array
13284 {"bits": [28, 28], "name": "SAIC"}, array
13285 {"bits": [29, 29], "name": "DAIC"}, array
13286 {"bits": [30, 30], "name": "RAW_WAIT"}, array
13287 {"bits": [31, 31], "name": "DIS_WC"} array
13292 {"bits": [0, 31], "name": "DST_ADDR"} array
13297 {"bits": [0, 15], "name": "DST_ADDR_HI"} array
13302 {"bits": [0, 31], "name": "SRC_ADDR"} array
13307 {"bits": [0, 15], "name": "SRC_ADDR_HI"} array
13312 {"bits": [10, 10], "name": "MEMLOG_CLEAR"}, array
13313 {"bits": [13, 14], "name": "SRC_CACHE_POLICY"}, array
13314 {"bits": [15, 15], "name": "SRC_VOLATLE"}, array
13315 {"bits": [20, 21], "name": "DST_SELECT"}, array
13316 {"bits": [25, 26], "name": "DST_CACHE_POLICY"}, array
13317 {"bits": [27, 27], "name": "DST_VOLATLE"}, array
13318 {"bits": [29, 30], "name": "SRC_SELECT"} array
13323 {"bits": [0, 25], "name": "DMA_READ_TAG"}, array
13324 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"} array
13329 {"bits": [0, 31], "name": "OBJECT"} array
13334 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"}, array
13335 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"}, array
13336 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"}, array
13337 {"bits": [8, 8], "name": "MODE"} array
13342 {"bits": [0, 31], "name": "WINDOW_HI"} array
13347 {"bits": [0, 15], "name": "MIN"}, array
13348 {"bits": [16, 31], "name": "MAX"} array
13353 {"bits": [0, 31], "name": "WINDOW_MASK_HI"} array
13358 {"bits": [0, 15], "name": "ADDR_HI"} array
13363 {"bits": [2, 31], "name": "ADDR_LO"} array
13368 {"bits": [0, 31], "name": "CNTX_ID"} array
13373 {"bits": [16, 17], "name": "DST_SEL"}, array
13374 {"bits": [20, 21], "name": "ACTION_PIPE_ID"}, array
13375 {"bits": [22, 23], "name": "ACTION_ID"}, array
13376 {"bits": [24, 26], "name": "INT_SEL"}, array
13377 {"bits": [29, 31], "name": "DATA_SEL"} array
13382 {"bits": [0, 31], "name": "DATA_HI"} array
13387 {"bits": [0, 31], "name": "DATA_LO"} array
13392 {"bits": [12, 23], "name": "GCR_CNTL"}, array
13393 {"bits": [25, 26], "name": "CACHE_POLICY"}, array
13394 {"bits": [27, 27], "name": "EOP_VOLATILE"}, array
13395 {"bits": [28, 28], "name": "EXECUTE"} array
13400 {"bits": [0, 31], "name": "LAST_FENCE_HI"} array
13405 {"bits": [0, 31], "name": "LAST_FENCE_LO"} array
13410 {"bits": [0, 19], "name": "IB2_OFFSET"} array
13415 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"} array
13420 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"} array
13425 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"} array
13430 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"}, array
13431 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"}, array
13432 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"}, array
13433 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"}, array
13434 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"}, array
13435 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"}, array
13436 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"}, array
13437 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"}, array
13438 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"}, array
13439 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"}, array
13440 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"}, array
13441 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"}, array
13442 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"} array
13447 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"}, array
13448 {"bits": [31, 31], "name": "STATUS"} array
13453 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"}, array
13454 {"bits": [22, 23], "name": "CACHE_POLICY"} array
13459 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"} array
13464 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"}, array
13465 {"bits": [22, 23], "name": "CACHE_POLICY"} array
13470 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"} array
13475 {"bits": [0, 31], "name": "ME_MC_WDATA_HI"} array
13480 {"bits": [0, 31], "name": "ME_MC_WDATA_LO"} array
13485 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"} array
13490 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"} array
13495 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"} array
13500 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"} array
13505 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"} array
13510 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"} array
13515 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"} array
13520 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"} array
13525 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"} array
13530 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"} array
13535 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"} array
13540 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"} array
13545 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"} array
13550 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"} array
13555 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"} array
13560 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"} array
13565 {"bits": [0, 31], "name": "CINVOC_COUNT_HI"} array
13570 {"bits": [0, 31], "name": "CINVOC_COUNT_LO"} array
13575 {"bits": [0, 31], "name": "CPRIM_COUNT_HI"} array
13580 {"bits": [0, 31], "name": "CPRIM_COUNT_LO"} array
13585 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, array
13586 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"}, array
13587 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"}, array
13588 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} array
13593 {"bits": [31, 31], "name": "PERFMON_ENABLE"} array
13598 {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"} array
13603 {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"} array
13608 {"bits": [0, 1], "name": "STATUS"} array
13613 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"} array
13618 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"} array
13623 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"} array
13628 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"} array
13633 {"bits": [0, 7], "name": "IB_EN"} array
13638 {"bits": [0, 0], "name": "CONFIG_REG_EN"}, array
13639 {"bits": [1, 1], "name": "CNTX_REG_EN"}, array
13640 {"bits": [15, 15], "name": "UCONFIG_REG_EN"}, array
13641 {"bits": [16, 16], "name": "SH_GFX_REG_EN"}, array
13642 {"bits": [24, 24], "name": "SH_CS_REG_EN"} array
13647 {"bits": [0, 31], "name": "ADDR_LO"} array
13652 {"bits": [0, 1], "name": "PIPE_ID"} array
13657 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"} array
13662 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"} array
13667 {"bits": [25, 26], "name": "CACHE_POLICY"} array
13672 {"bits": [0, 0], "name": "NOT_VISIBLE"} array
13677 {"bits": [0, 19], "name": "RB_OFFSET"} array
13682 {"bits": [0, 0], "name": "Z_PASS_ACITVE"}, array
13683 {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"}, array
13684 {"bits": [2, 2], "name": "PIPELINE_ACTIVE"}, array
13685 {"bits": [3, 3], "name": "STIPPLE_ACTIVE"}, array
13686 {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"}, array
13687 {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"}, array
13688 {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"}, array
13689 {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"} array
13694 {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"} array
13699 {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"} array
13704 {"bits": [0, 31], "name": "OBSOLETE"} array
13709 {"bits": [0, 31], "name": "SEM_WAIT_TIMER"} array
13714 {"bits": [0, 15], "name": "SEM_ADDR_HI"}, array
13715 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"}, array
13716 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"}, array
13717 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"}, array
13718 {"bits": [29, 31], "name": "SEM_SELECT"} array
13723 {"bits": [0, 0], "name": "SEM_PRIV"}, array
13724 {"bits": [3, 31], "name": "SEM_ADDR_LO"} array
13729 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"} array
13734 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"} array
13739 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"} array
13744 {"bits": [0, 15], "name": "ST_BASE_HI"} array
13749 {"bits": [2, 31], "name": "ST_BASE_LO"} array
13754 {"bits": [0, 19], "name": "ST_BUFSZ"} array
13759 {"bits": [0, 19], "name": "ST_CMD_REQSZ"} array
13764 {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"} array
13769 {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"} array
13774 {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"} array
13779 {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"} array
13784 {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"} array
13789 {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"} array
13794 {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"} array
13799 {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"} array
13804 {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"} array
13809 {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"} array
13814 {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"} array
13819 {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"} array
13824 {"bits": [0, 31], "name": "IAVERT_COUNT_HI"} array
13829 {"bits": [0, 31], "name": "IAVERT_COUNT_LO"} array
13834 {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"} array
13839 {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"} array
13844 {"bits": [0, 3], "name": "VMID"} array
13849 {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"} array
13854 {"bits": [0, 2], "name": "SRC_STATE_ID"} array
13859 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"}, array
13860 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"}, array
13861 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"}, array
13862 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"}, array
13863 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"}, array
13864 {"bits": [16, 16], "name": "OFFSET_ROUND"} array
13869 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"}, array
13870 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"}, array
13871 {"bits": [2, 2], "name": "DISABLE_CONSERVATIVE_ZPASS_COUNTS"}, array
13872 {"bits": [3, 3], "name": "ENHANCED_CONSERVATIVE_ZPASS_COUNTS"}, array
13873 {"bits": [4, 6], "name": "SAMPLE_RATE"}, array
13874 {"bits": [8, 11], "name": "ZPASS_ENABLE"}, array
13875 {"bits": [12, 15], "name": "ZFAIL_ENABLE"}, array
13876 {"bits": [16, 19], "name": "SFAIL_ENABLE"}, array
13877 {"bits": [20, 23], "name": "DBFAIL_ENABLE"}, array
13878 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"}, array
13879 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"} array
13884 {"bits": [0, 31], "name": "MAX"} array
13889 {"bits": [0, 31], "name": "MIN"} array
13894 {"bits": [0, 31], "name": "DEPTH_CLEAR"} array
13899 {"bits": [0, 0], "name": "STENCIL_ENABLE"}, array
13900 {"bits": [1, 1], "name": "Z_ENABLE"}, array
13901 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"}, array
13902 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"}, array
13903 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"}, array
13904 {"bits": [7, 7], "name": "BACKFACE_ENABLE"}, array
13905 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"}, array
13906 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"}, array
13907 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"}, array
13908 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"} array
13913 {"bits": [0, 13], "name": "X_MAX"}, array
13914 {"bits": [16, 29], "name": "Y_MAX"} array
13919 {"bits": [0, 10], "name": "SLICE_START"}, array
13920 {"bits": [11, 12], "name": "SLICE_START_HI"}, array
13921 {"bits": [13, 23], "name": "SLICE_MAX"}, array
13922 {"bits": [24, 24], "name": "Z_READ_ONLY"}, array
13923 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}, array
13924 {"bits": [26, 29], "name": "MIPID"}, array
13925 {"bits": [30, 31], "name": "SLICE_MAX_HI"} array
13930 {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"}, array
13931 {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"}, array
13932 {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"} array
13937 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"}, array
13938 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"}, array
13939 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"}, array
13940 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"}, array
13941 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"}, array
13942 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"}, array
13943 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"}, array
13944 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"}, array
13945 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"}, array
13946 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"}, array
13947 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"}, array
13948 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"} array
13953 {"bits": [0, 31], "name": "BASE_256B"} array
13958 {"bits": [0, 0], "name": "RESERVED_FIELD_1"}, array
13959 {"bits": [1, 1], "name": "FULL_CACHE"}, array
13960 {"bits": [2, 2], "name": "RESERVED_FIELD_2"}, array
13961 {"bits": [3, 3], "name": "RESERVED_FIELD_3"}, array
13962 {"bits": [4, 9], "name": "RESERVED_FIELD_4"}, array
13963 {"bits": [10, 15], "name": "RESERVED_FIELD_5"}, array
13964 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}, array
13965 {"bits": [17, 17], "name": "RESERVED_FIELD_6"}, array
13966 {"bits": [18, 18], "name": "PIPE_ALIGNED"}, array
13967 {"bits": [19, 20], "name": "VRS_HTILE_ENCODING"} array
13972 {"bits": [0, 30], "name": "COUNT_HI"} array
13977 {"bits": [0, 31], "name": "COUNT_LOW"} array
13982 {"bits": [0, 7], "name": "START_X"}, array
13983 {"bits": [8, 15], "name": "START_Y"}, array
13984 {"bits": [16, 23], "name": "MAX_X"}, array
13985 {"bits": [24, 31], "name": "MAX_Y"} array
13990 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"}, array
13991 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"}, array
13992 {"bits": [2, 2], "name": "DEPTH_COPY"}, array
13993 {"bits": [3, 3], "name": "STENCIL_COPY"}, array
13994 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"}, array
13995 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"}, array
13996 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"}, array
13997 {"bits": [7, 7], "name": "COPY_CENTROID"}, array
13998 {"bits": [8, 11], "name": "COPY_SAMPLE"}, array
13999 {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}, array
14000 {"bits": [13, 13], "name": "PS_INVOKE_DISABLE"} array
14005 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"}, array
14006 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"}, array
14007 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"}, array
14008 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"}, array
14009 {"bits": [7, 7], "name": "FAST_Z_DISABLE"}, array
14010 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"}, array
14011 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"}, array
14012 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"}, array
14013 {"bits": [11, 11], "name": "FORCE_Z_READ"}, array
14014 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"}, array
14015 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"}, array
14016 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"}, array
14017 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"}, array
14018 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"}, array
14019 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"}, array
14020 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"}, array
14021 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"}, array
14022 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"}, array
14023 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"}, array
14024 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"}, array
14025 {"bits": [29, 29], "name": "FORCE_Z_VALID"}, array
14026 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"}, array
14027 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"} array
14032 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"}, array
14033 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"}, array
14034 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"}, array
14035 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"}, array
14036 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"}, array
14037 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"}, array
14038 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"}, array
14039 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"}, array
14040 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"}, array
14041 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"}, array
14042 {"bits": [15, 17], "name": "HIS_SFUNC_FF"}, array
14043 {"bits": [18, 20], "name": "HIS_SFUNC_BF"}, array
14044 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"}, array
14045 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"}, array
14046 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}, array
14047 {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"}, array
14048 {"bits": [26, 26], "name": "FORCE_VRS_RATE_FINE"}, array
14049 {"bits": [27, 28], "name": "CENTROID_COMPUTATION_MODE"} array
14054 {"bits": [0, 10], "name": "FIELD_1"}, array
14055 {"bits": [11, 21], "name": "FIELD_2"} array
14060 {"bits": [0, 3], "name": "FIELD_1"}, array
14061 {"bits": [4, 7], "name": "FIELD_2"}, array
14062 {"bits": [8, 12], "name": "FIELD_3"}, array
14063 {"bits": [13, 14], "name": "FIELD_4"}, array
14064 {"bits": [15, 16], "name": "FIELD_5"}, array
14065 {"bits": [17, 18], "name": "FIELD_6"}, array
14066 {"bits": [19, 20], "name": "FIELD_7"}, array
14067 {"bits": [28, 31], "name": "RESOURCE_LEVEL"} array
14072 {"bits": [0, 21], "name": "FIELD_1"} array
14077 {"bits": [0, 1], "enum_ref": "WritePolicy", "name": "Z_WR_POLICY"}, array
14078 {"bits": [2, 3], "enum_ref": "WritePolicy", "name": "S_WR_POLICY"}, array
14079 {"bits": [4, 5], "enum_ref": "WritePolicy", "name": "HTILE_WR_POLICY"}, array
14080 {"bits": [6, 7], "enum_ref": "WritePolicy", "name": "ZPCPSD_WR_POLICY"}, array
14081 {"bits": [16, 17], "enum_ref": "ReadPolicy", "name": "Z_RD_POLICY"}, array
14082 {"bits": [18, 19], "enum_ref": "ReadPolicy", "name": "S_RD_POLICY"}, array
14083 {"bits": [20, 21], "enum_ref": "ReadPolicy", "name": "HTILE_RD_POLICY"}, array
14084 {"bits": [24, 24], "name": "Z_BIG_PAGE"}, array
14085 {"bits": [25, 25], "name": "S_BIG_PAGE"}, array
14086 {"bits": [26, 26], "name": "Z_NOALLOC"}, array
14087 {"bits": [27, 27], "name": "S_NOALLOC"}, array
14088 {"bits": [28, 28], "name": "HTILE_NOALLOC"}, array
14089 {"bits": [29, 29], "name": "ZPCPSD_NOALLOC"} array
14094 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"}, array
14095 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"}, array
14096 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"}, array
14097 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"}, array
14098 {"bits": [6, 6], "name": "KILL_ENABLE"}, array
14099 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"}, array
14100 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"}, array
14101 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"}, array
14102 {"bits": [10, 10], "name": "EXEC_ON_NOOP"}, array
14103 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"}, array
14104 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"}, array
14105 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}, array
14106 {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"}, array
14107 {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"}, array
14108 {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"}, array
14109 {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"}, array
14110 {"bits": [23, 23], "name": "PRE_SHADER_DEPTH_COVERAGE_ENABLE"} array
14115 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"}, array
14116 {"bits": [4, 11], "name": "COMPAREVALUE0"}, array
14117 {"bits": [12, 19], "name": "COMPAREMASK0"}, array
14118 {"bits": [24, 24], "name": "ENABLE0"} array
14123 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"}, array
14124 {"bits": [4, 11], "name": "COMPAREVALUE1"}, array
14125 {"bits": [12, 19], "name": "COMPAREMASK1"}, array
14126 {"bits": [24, 24], "name": "ENABLE1"} array
14131 {"bits": [0, 7], "name": "STENCILTESTVAL"}, array
14132 {"bits": [8, 15], "name": "STENCILMASK"}, array
14133 {"bits": [16, 23], "name": "STENCILWRITEMASK"}, array
14134 {"bits": [24, 31], "name": "STENCILOPVAL"} array
14139 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"}, array
14140 {"bits": [8, 15], "name": "STENCILMASK_BF"}, array
14141 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"}, array
14142 {"bits": [24, 31], "name": "STENCILOPVAL_BF"} array
14147 {"bits": [0, 7], "name": "CLEAR"} array
14152 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"}, array
14153 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"}, array
14154 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"}, array
14155 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"}, array
14156 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"}, array
14157 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"} array
14162 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"}, array
14163 {"bits": [4, 8], "name": "SW_MODE"}, array
14164 {"bits": [9, 10], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, array
14165 {"bits": [11, 11], "name": "ITERATE_FLUSH"}, array
14166 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, array
14167 {"bits": [13, 15], "name": "RESERVED_FIELD_1"}, array
14168 {"bits": [20, 20], "name": "ITERATE_256"}, array
14169 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, array
14170 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"} array
14175 {"bits": [0, 2], "name": "VRS_OVERRIDE_RATE_COMBINER_MODE"}, array
14176 {"bits": [4, 5], "name": "VRS_OVERRIDE_RATE_X"}, array
14177 {"bits": [6, 7], "name": "VRS_OVERRIDE_RATE_Y"} array
14182 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"}, array
14183 {"bits": [2, 3], "name": "NUM_SAMPLES"}, array
14184 {"bits": [4, 8], "name": "SW_MODE"}, array
14185 {"bits": [9, 10], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, array
14186 {"bits": [11, 11], "name": "ITERATE_FLUSH"}, array
14187 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, array
14188 {"bits": [13, 15], "name": "RESERVED_FIELD_1"}, array
14189 {"bits": [16, 19], "name": "MAXMIP"}, array
14190 {"bits": [20, 20], "name": "ITERATE_256"}, array
14191 {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"}, array
14192 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, array
14193 {"bits": [28, 28], "name": "READ_SIZE"}, array
14194 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"}, array
14195 {"bits": [31, 31], "name": "ZRANGE_PRECISION"} array
14200 {"bits": [0, 7], "name": "BASE_HI"} array
14205 {"bits": [0, 2], "name": "NUM_PIPES"}, array
14206 {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"}, array
14207 {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"}, array
14208 {"bits": [8, 10], "name": "NUM_PKRS"}, array
14209 {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"}, array
14210 {"bits": [26, 27], "name": "NUM_RB_PER_SE"} array
14215 {"bits": [0, 7], "name": "PERF_SEL"}, array
14216 {"bits": [8, 15], "name": "PERF_SEL_END"}, array
14217 {"bits": [24, 27], "name": "PERF_MODE"}, array
14218 {"bits": [28, 28], "name": "ENABLE"}, array
14219 {"bits": [29, 29], "name": "CLEAR"} array
14224 {"bits": [0, 1], "name": "COMPARE_MODE0"}, array
14225 {"bits": [2, 3], "name": "COMPARE_MODE1"}, array
14226 {"bits": [4, 5], "name": "COMPARE_MODE2"}, array
14227 {"bits": [6, 7], "name": "COMPARE_MODE3"}, array
14228 {"bits": [8, 11], "name": "COMPARE_VALUE0"}, array
14229 {"bits": [12, 15], "name": "COMPARE_VALUE1"}, array
14230 {"bits": [16, 19], "name": "COMPARE_VALUE2"}, array
14231 {"bits": [20, 23], "name": "COMPARE_VALUE3"} array
14236 {"bits": [0, 15], "name": "COUNTER_HI"}, array
14237 {"bits": [16, 31], "name": "COMPARE_VALUE"} array
14242 {"bits": [0, 31], "name": "COUNTER_LO"} array
14247 {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"}, array
14248 {"bits": [8, 15], "name": "START_TRIGGER"}, array
14249 {"bits": [16, 23], "name": "STOP_TRIGGER"}, array
14250 {"bits": [24, 24], "name": "ENABLE_ANY"}, array
14251 {"bits": [25, 25], "name": "CLEAR_ALL"}, array
14252 {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"} array
14257 {"bits": [0, 8], "name": "PERF_SEL"}, array
14258 {"bits": [24, 27], "name": "PERF_MODE"}, array
14259 {"bits": [28, 31], "name": "CNTL_MODE"} array
14264 {"bits": [0, 15], "name": "BASE"}, array
14265 {"bits": [16, 31], "name": "UNUSED"} array
14270 {"bits": [0, 5], "name": "AINC"}, array
14271 {"bits": [6, 7], "name": "UNUSED1"}, array
14272 {"bits": [8, 9], "name": "DMODE"}, array
14273 {"bits": [10, 31], "name": "UNUSED2"} array
14278 {"bits": [0, 0], "name": "COMPLETE"}, array
14279 {"bits": [1, 31], "name": "UNUSED"} array
14284 {"bits": [0, 31], "name": "DST"} array
14289 {"bits": [0, 7], "name": "OFFSET0"}, array
14290 {"bits": [8, 31], "name": "UNUSED"} array
14295 {"bits": [0, 7], "name": "OFFSET1"}, array
14296 {"bits": [8, 31], "name": "UNUSED"} array
14301 {"bits": [0, 7], "name": "OP"}, array
14302 {"bits": [8, 31], "name": "UNUSED"} array
14307 {"bits": [0, 15], "name": "SIZE"}, array
14308 {"bits": [16, 31], "name": "UNUSED"} array
14313 {"bits": [0, 0], "name": "FLAG"}, array
14314 {"bits": [1, 12], "name": "COUNTER"}, array
14315 {"bits": [13, 13], "name": "TYPE"}, array
14316 {"bits": [14, 14], "name": "DED"}, array
14317 {"bits": [15, 15], "name": "RELEASE_ALL"}, array
14318 {"bits": [16, 26], "name": "HEAD_QUEUE"}, array
14319 {"bits": [27, 27], "name": "HEAD_VALID"}, array
14320 {"bits": [28, 28], "name": "HEAD_FLAG"}, array
14321 {"bits": [29, 29], "name": "HALTED"}, array
14322 {"bits": [30, 30], "name": "HEAD_QUEUE1"}, array
14323 {"bits": [31, 31], "name": "UNUSED1"} array
14328 {"bits": [0, 15], "name": "RESOURCE_CNT"}, array
14329 {"bits": [16, 31], "name": "UNUSED"} array
14334 {"bits": [0, 5], "name": "INDEX"}, array
14335 {"bits": [6, 31], "name": "UNUSED"} array
14340 {"bits": [0, 15], "name": "DS_ADDRESS"}, array
14341 {"bits": [16, 19], "name": "CRAWLER_TYPE"}, array
14342 {"bits": [20, 23], "name": "CRAWLER"}, array
14343 {"bits": [24, 29], "name": "UNUSED"}, array
14344 {"bits": [30, 30], "name": "NO_ALLOC"}, array
14345 {"bits": [31, 31], "name": "ENABLE"} array
14350 {"bits": [0, 3], "name": "INDEX"}, array
14351 {"bits": [4, 31], "name": "UNUSED"} array
14356 {"bits": [0, 31], "name": "SPACE_AVAILABLE"} array
14361 {"bits": [0, 30], "name": "VALUE"}, array
14362 {"bits": [31, 31], "name": "INCDEC"} array
14367 {"bits": [0, 31], "name": "RING_SIZE"} array
14372 {"bits": [0, 31], "name": "READ_ADDR"} array
14377 {"bits": [0, 31], "name": "BURST_ADDR"} array
14382 {"bits": [0, 31], "name": "BURST_COUNT"} array
14387 {"bits": [0, 31], "name": "BURST_DATA"} array
14392 {"bits": [0, 31], "name": "READ_DATA"} array
14397 {"bits": [0, 31], "name": "WRITE_COMPLETE"} array
14402 {"bits": [0, 31], "name": "WRITE_ADDR"} array
14407 {"bits": [0, 31], "name": "WRITE_DATA"} array
14412 {"bits": [0, 9], "name": "PERF_SEL0"}, array
14413 {"bits": [10, 19], "name": "PERF_SEL1"}, array
14414 {"bits": [20, 23], "name": "CNTR_MODE"}, array
14415 {"bits": [24, 27], "name": "PERF_MODE0"}, array
14416 {"bits": [28, 31], "name": "PERF_MODE1"} array
14421 {"bits": [0, 9], "name": "PERF_SEL2"}, array
14422 {"bits": [10, 19], "name": "PERF_SEL3"}, array
14423 {"bits": [24, 27], "name": "PERF_MODE2"}, array
14424 {"bits": [28, 31], "name": "PERF_MODE3"} array
14429 {"bits": [0, 8], "name": "PRIM_GRP_SIZE"}, array
14430 {"bits": [9, 17], "name": "VERT_GRP_SIZE"}, array
14431 {"bits": [18, 18], "name": "BREAK_WAVE_AT_EOI"}, array
14432 {"bits": [19, 19], "name": "PACKET_TO_ONE_PA"} array
14437 {"bits": [0, 31], "name": "FIRST_INDEX"} array
14442 {"bits": [0, 9], "name": "MAX_VERTS_PER_SUBGROUP"} array
14447 {"bits": [0, 8], "name": "PRIM_AMP_FACTOR"}, array
14448 {"bits": [9, 17], "name": "THDS_PER_SUBGRP"} array
14453 {"bits": [0, 0], "name": "OVERSUB_EN"}, array
14454 {"bits": [1, 10], "name": "NUM_PC_LINES"} array
14459 {"bits": [0, 2], "name": "RT_SLICE"}, array
14460 {"bits": [3, 6], "name": "VIEWPORT"}, array
14461 {"bits": [8, 8], "name": "EN_STEREO"} array
14466 {"bits": [0, 0], "name": "EN_USER_VGPR1"}, array
14467 {"bits": [1, 1], "name": "EN_USER_VGPR2"}, array
14468 {"bits": [2, 2], "name": "EN_USER_VGPR3"} array
14473 {"bits": [0, 7], "name": "INSTANCE_INDEX"}, array
14474 {"bits": [8, 15], "name": "SA_INDEX"}, array
14475 {"bits": [16, 23], "name": "SE_INDEX"}, array
14476 {"bits": [29, 29], "name": "SA_BROADCAST_WRITES"}, array
14477 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"}, array
14478 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"} array
14483 {"bits": [0, 5], "name": "PERF_SEL"}, array
14484 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, array
14485 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, array
14486 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"}, array
14487 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"}, array
14488 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"}, array
14489 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"}, array
14490 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"}, array
14491 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"}, array
14492 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"}, array
14493 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"}, array
14494 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"}, array
14495 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"}, array
14496 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"}, array
14497 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"}, array
14498 {"bits": [27, 27], "name": "TCP_BUSY_USER_DEFINED_MASK"}, array
14499 {"bits": [28, 28], "name": "GE_BUSY_USER_DEFINED_MASK"}, array
14500 {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"}, array
14501 {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"}, array
14502 {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"} array
14507 {"bits": [1, 1], "name": "UTCL1_BUSY_USER_DEFINED_MASK"}, array
14508 {"bits": [2, 2], "name": "GL2CC_BUSY_USER_DEFINED_MASK"}, array
14509 {"bits": [3, 3], "name": "SDMA_BUSY_USER_DEFINED_MASK"}, array
14510 {"bits": [4, 4], "name": "CH_BUSY_USER_DEFINED_MASK"}, array
14511 {"bits": [5, 5], "name": "PH_BUSY_USER_DEFINED_MASK"}, array
14512 {"bits": [6, 6], "name": "PMM_BUSY_USER_DEFINED_MASK"}, array
14513 {"bits": [7, 7], "name": "GUS_BUSY_USER_DEFINED_MASK"}, array
14514 {"bits": [8, 8], "name": "GL1CC_BUSY_USER_DEFINED_MASK"} array
14519 {"bits": [0, 5], "name": "PERF_SEL"}, array
14520 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, array
14521 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, array
14522 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"}, array
14523 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"}, array
14524 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"}, array
14525 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"}, array
14526 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"}, array
14527 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"}, array
14528 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"}, array
14529 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}, array
14530 {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"}, array
14531 {"bits": [23, 23], "name": "UTCL1_BUSY_USER_DEFINED_MASK"}, array
14532 {"bits": [24, 24], "name": "TCP_BUSY_USER_DEFINED_MASK"}, array
14533 {"bits": [25, 25], "name": "GL1CC_BUSY_USER_DEFINED_MASK"} array
14538 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"}, array
14539 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"}, array
14540 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"}, array
14541 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"}, array
14542 {"bits": [12, 12], "name": "DB_CLEAN"}, array
14543 {"bits": [13, 13], "name": "CB_CLEAN"}, array
14544 {"bits": [14, 14], "name": "TA_BUSY"}, array
14545 {"bits": [15, 15], "name": "GDS_BUSY"}, array
14546 {"bits": [16, 16], "name": "GE_BUSY_NO_DMA"}, array
14547 {"bits": [20, 20], "name": "SX_BUSY"}, array
14548 {"bits": [21, 21], "name": "GE_BUSY"}, array
14549 {"bits": [22, 22], "name": "SPI_BUSY"}, array
14550 {"bits": [23, 23], "name": "BCI_BUSY"}, array
14551 {"bits": [24, 24], "name": "SC_BUSY"}, array
14552 {"bits": [25, 25], "name": "PA_BUSY"}, array
14553 {"bits": [26, 26], "name": "DB_BUSY"}, array
14554 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"}, array
14555 {"bits": [29, 29], "name": "CP_BUSY"}, array
14556 {"bits": [30, 30], "name": "CB_BUSY"}, array
14557 {"bits": [31, 31], "name": "GUI_ACTIVE"} array
14562 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"}, array
14563 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"}, array
14564 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"}, array
14565 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"}, array
14566 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"}, array
14567 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"}, array
14568 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"}, array
14569 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"}, array
14570 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"}, array
14571 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"}, array
14572 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"}, array
14573 {"bits": [14, 14], "name": "RLC_RQ_PENDING"}, array
14574 {"bits": [15, 15], "name": "UTCL2_BUSY"}, array
14575 {"bits": [16, 16], "name": "EA_BUSY"}, array
14576 {"bits": [17, 17], "name": "RMI_BUSY"}, array
14577 {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"}, array
14578 {"bits": [19, 19], "name": "SDMA_SCH_RQ_PENDING"}, array
14579 {"bits": [20, 20], "name": "EA_LINK_BUSY"}, array
14580 {"bits": [21, 21], "name": "SDMA_BUSY"}, array
14581 {"bits": [22, 22], "name": "SDMA0_RQ_PENDING"}, array
14582 {"bits": [23, 23], "name": "SDMA1_RQ_PENDING"}, array
14583 {"bits": [24, 24], "name": "SDMA2_RQ_PENDING"}, array
14584 {"bits": [25, 25], "name": "SDMA3_RQ_PENDING"}, array
14585 {"bits": [26, 26], "name": "RLC_BUSY"}, array
14586 {"bits": [27, 27], "name": "TCP_BUSY"}, array
14587 {"bits": [28, 28], "name": "CPF_BUSY"}, array
14588 {"bits": [29, 29], "name": "CPC_BUSY"}, array
14589 {"bits": [30, 30], "name": "CPG_BUSY"}, array
14590 {"bits": [31, 31], "name": "CPAXI_BUSY"} array
14595 {"bits": [5, 5], "name": "GRBM_RLC_INTR_CREDIT_PENDING"}, array
14596 {"bits": [6, 6], "name": "GRBM_UTCL2_INTR_CREDIT_PENDING"}, array
14597 {"bits": [7, 7], "name": "GRBM_CPF_INTR_CREDIT_PENDING"}, array
14598 {"bits": [8, 8], "name": "MESPIPE0_RQ_PENDING"}, array
14599 {"bits": [9, 9], "name": "MESPIPE1_RQ_PENDING"}, array
14600 {"bits": [10, 10], "name": "MESPIPE2_RQ_PENDING"}, array
14601 {"bits": [11, 11], "name": "MESPIPE3_RQ_PENDING"}, array
14602 {"bits": [13, 13], "name": "PH_BUSY"}, array
14603 {"bits": [14, 14], "name": "CH_BUSY"}, array
14604 {"bits": [15, 15], "name": "GL2CC_BUSY"}, array
14605 {"bits": [16, 16], "name": "GL1CC_BUSY"}, array
14606 {"bits": [28, 28], "name": "GUS_LINK_BUSY"}, array
14607 {"bits": [29, 29], "name": "GUS_BUSY"}, array
14608 {"bits": [30, 30], "name": "UTCL1_BUSY"}, array
14609 {"bits": [31, 31], "name": "PMM_BUSY"} array
14614 {"bits": [1, 1], "name": "DB_CLEAN"}, array
14615 {"bits": [2, 2], "name": "CB_CLEAN"}, array
14616 {"bits": [3, 3], "name": "UTCL1_BUSY"}, array
14617 {"bits": [4, 4], "name": "TCP_BUSY"}, array
14618 {"bits": [5, 5], "name": "GL1CC_BUSY"}, array
14619 {"bits": [21, 21], "name": "RMI_BUSY"}, array
14620 {"bits": [22, 22], "name": "BCI_BUSY"}, array
14621 {"bits": [24, 24], "name": "PA_BUSY"}, array
14622 {"bits": [25, 25], "name": "TA_BUSY"}, array
14623 {"bits": [26, 26], "name": "SX_BUSY"}, array
14624 {"bits": [27, 27], "name": "SPI_BUSY"}, array
14625 {"bits": [29, 29], "name": "SC_BUSY"}, array
14626 {"bits": [30, 30], "name": "DB_BUSY"}, array
14627 {"bits": [31, 31], "name": "CB_BUSY"} array
14632 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, array
14633 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, array
14634 {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, array
14635 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, array
14636 {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, array
14637 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"} array
14642 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, array
14643 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, array
14644 {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, array
14645 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, array
14646 {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, array
14647 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}, array
14648 {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"}, array
14649 {"bits": [22, 22], "name": "EN_INST_OPT_ADV"}, array
14650 {"bits": [23, 23], "name": "HW_USE_ONLY"} array
14655 {"bits": [0, 0], "name": "UCP_ENA_0"}, array
14656 {"bits": [1, 1], "name": "UCP_ENA_1"}, array
14657 {"bits": [2, 2], "name": "UCP_ENA_2"}, array
14658 {"bits": [3, 3], "name": "UCP_ENA_3"}, array
14659 {"bits": [4, 4], "name": "UCP_ENA_4"}, array
14660 {"bits": [5, 5], "name": "UCP_ENA_5"}, array
14661 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"}, array
14662 {"bits": [14, 15], "name": "PS_UCP_MODE"}, array
14663 {"bits": [16, 16], "name": "CLIP_DISABLE"}, array
14664 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"}, array
14665 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"}, array
14666 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"}, array
14667 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"}, array
14668 {"bits": [21, 21], "name": "VTX_KILL_OR"}, array
14669 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"}, array
14670 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"}, array
14671 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"}, array
14672 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"}, array
14673 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}, array
14674 {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"} array
14679 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"}, array
14680 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"}, array
14681 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"}, array
14682 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"}, array
14683 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"}, array
14684 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"}, array
14685 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"}, array
14686 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"}, array
14687 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"}, array
14688 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"}, array
14689 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"}, array
14690 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"}, array
14691 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"}, array
14692 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"}, array
14693 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"}, array
14694 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"} array
14699 {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"}, array
14700 {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"}, array
14701 {"bits": [2, 9], "name": "VERTEX_REUSE_DEPTH"} array
14706 {"bits": [0, 31], "name": "DATA_REGISTER"} array
14711 {"bits": [0, 31], "name": "VPORT_XOFFSET"} array
14716 {"bits": [0, 31], "name": "VPORT_XSCALE"} array
14721 {"bits": [0, 31], "name": "VPORT_YOFFSET"} array
14726 {"bits": [0, 31], "name": "VPORT_YSCALE"} array
14731 {"bits": [0, 31], "name": "VPORT_ZOFFSET"} array
14736 {"bits": [0, 31], "name": "VPORT_ZSCALE"} array
14741 {"bits": [0, 2], "name": "VERTEX_RATE_COMBINER_MODE"}, array
14742 {"bits": [3, 5], "name": "PRIMITIVE_RATE_COMBINER_MODE"}, array
14743 {"bits": [6, 8], "name": "HTILE_RATE_COMBINER_MODE"}, array
14744 {"bits": [9, 11], "name": "SAMPLE_ITER_COMBINER_MODE"}, array
14745 {"bits": [13, 13], "name": "EXPOSE_VRS_PIXELS_MASK"}, array
14746 {"bits": [14, 14], "name": "CMASK_RATE_HINT_FORCE_ZERO"} array
14751 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"}, array
14752 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"}, array
14753 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"}, array
14754 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"}, array
14755 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"}, array
14756 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"}, array
14757 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"}, array
14758 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"}, array
14759 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"}, array
14760 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"}, array
14761 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"}, array
14762 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"}, array
14763 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"}, array
14764 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"}, array
14765 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"}, array
14766 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"}, array
14767 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"}, array
14768 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"}, array
14769 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"}, array
14770 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"}, array
14771 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"}, array
14772 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"}, array
14773 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"}, array
14774 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"}, array
14775 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"}, array
14776 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}, array
14777 {"bits": [27, 27], "name": "USE_VTX_LINE_WIDTH"}, array
14778 {"bits": [28, 28], "name": "USE_VTX_VRS_RATE"}, array
14779 {"bits": [29, 29], "name": "BYPASS_VTX_RATE_COMBINER"}, array
14780 {"bits": [30, 30], "name": "BYPASS_PRIM_RATE_COMBINER"} array
14785 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"}, array
14786 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"}, array
14787 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"}, array
14788 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"}, array
14789 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"}, array
14790 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"}, array
14791 {"bits": [8, 8], "name": "VTX_XY_FMT"}, array
14792 {"bits": [9, 9], "name": "VTX_Z_FMT"}, array
14793 {"bits": [10, 10], "name": "VTX_W0_FMT"}, array
14794 {"bits": [11, 11], "name": "PERFCOUNTER_REF"} array
14799 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"}, array
14800 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"}, array
14801 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"}, array
14802 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"}, array
14803 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}, array
14804 {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"}, array
14805 {"bits": [28, 28], "name": "SAMPLE_COVERAGE_ENCODING"}, array
14806 {"bits": [29, 29], "name": "COVERED_CENTROID_IS_CENTER"} array
14811 {"bits": [0, 15], "name": "AA_MASK_X0Y0"}, array
14812 {"bits": [16, 31], "name": "AA_MASK_X1Y0"} array
14817 {"bits": [0, 15], "name": "AA_MASK_X0Y1"}, array
14818 {"bits": [16, 31], "name": "AA_MASK_X1Y1"} array
14823 {"bits": [0, 3], "name": "S0_X"}, array
14824 {"bits": [4, 7], "name": "S0_Y"}, array
14825 {"bits": [8, 11], "name": "S1_X"}, array
14826 {"bits": [12, 15], "name": "S1_Y"}, array
14827 {"bits": [16, 19], "name": "S2_X"}, array
14828 {"bits": [20, 23], "name": "S2_Y"}, array
14829 {"bits": [24, 27], "name": "S3_X"}, array
14830 {"bits": [28, 31], "name": "S3_Y"} array
14835 {"bits": [0, 3], "name": "S4_X"}, array
14836 {"bits": [4, 7], "name": "S4_Y"}, array
14837 {"bits": [8, 11], "name": "S5_X"}, array
14838 {"bits": [12, 15], "name": "S5_Y"}, array
14839 {"bits": [16, 19], "name": "S6_X"}, array
14840 {"bits": [20, 23], "name": "S6_Y"}, array
14841 {"bits": [24, 27], "name": "S7_X"}, array
14842 {"bits": [28, 31], "name": "S7_Y"} array
14847 {"bits": [0, 3], "name": "S8_X"}, array
14848 {"bits": [4, 7], "name": "S8_Y"}, array
14849 {"bits": [8, 11], "name": "S9_X"}, array
14850 {"bits": [12, 15], "name": "S9_Y"}, array
14851 {"bits": [16, 19], "name": "S10_X"}, array
14852 {"bits": [20, 23], "name": "S10_Y"}, array
14853 {"bits": [24, 27], "name": "S11_X"}, array
14854 {"bits": [28, 31], "name": "S11_Y"} array
14859 {"bits": [0, 3], "name": "S12_X"}, array
14860 {"bits": [4, 7], "name": "S12_Y"}, array
14861 {"bits": [8, 11], "name": "S13_X"}, array
14862 {"bits": [12, 15], "name": "S13_Y"}, array
14863 {"bits": [16, 19], "name": "S14_X"}, array
14864 {"bits": [20, 23], "name": "S14_Y"}, array
14865 {"bits": [24, 27], "name": "S15_X"}, array
14866 {"bits": [28, 31], "name": "S15_Y"} array
14871 {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"}, array
14872 {"bits": [2, 2], "name": "BIN_SIZE_X"}, array
14873 {"bits": [3, 3], "name": "BIN_SIZE_Y"}, array
14874 {"bits": [4, 6], "enum_ref": "BinSizeExtend", "name": "BIN_SIZE_X_EXTEND"}, array
14875 {"bits": [7, 9], "enum_ref": "BinSizeExtend", "name": "BIN_SIZE_Y_EXTEND"}, array
14876 {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"}, array
14877 {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"}, array
14878 {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"}, array
14879 {"bits": [19, 26], "name": "FPOVS_PER_BATCH"}, array
14880 {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"}, array
14881 {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"}, array
14882 {"bits": [29, 30], "enum_ref": "BinMapMode", "name": "BIN_MAPPING_MODE"} array
14887 {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"}, array
14888 {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"} array
14893 {"bits": [0, 3], "name": "DISTANCE_0"}, array
14894 {"bits": [4, 7], "name": "DISTANCE_1"}, array
14895 {"bits": [8, 11], "name": "DISTANCE_2"}, array
14896 {"bits": [12, 15], "name": "DISTANCE_3"}, array
14897 {"bits": [16, 19], "name": "DISTANCE_4"}, array
14898 {"bits": [20, 23], "name": "DISTANCE_5"}, array
14899 {"bits": [24, 27], "name": "DISTANCE_6"}, array
14900 {"bits": [28, 31], "name": "DISTANCE_7"} array
14905 {"bits": [0, 3], "name": "DISTANCE_8"}, array
14906 {"bits": [4, 7], "name": "DISTANCE_9"}, array
14907 {"bits": [8, 11], "name": "DISTANCE_10"}, array
14908 {"bits": [12, 15], "name": "DISTANCE_11"}, array
14909 {"bits": [16, 19], "name": "DISTANCE_12"}, array
14910 {"bits": [20, 23], "name": "DISTANCE_13"}, array
14911 {"bits": [24, 27], "name": "DISTANCE_14"}, array
14912 {"bits": [28, 31], "name": "DISTANCE_15"} array
14917 {"bits": [0, 14], "name": "TL_X"}, array
14918 {"bits": [16, 30], "name": "TL_Y"} array
14923 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"} array
14928 {"bits": [0, 0], "name": "OVER_RAST_ENABLE"}, array
14929 {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"}, array
14930 {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"}, array
14931 {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"}, array
14932 {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"}, array
14933 {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"}, array
14934 {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"}, array
14935 {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"}, array
14936 {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"}, array
14937 {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"}, array
14938 {"bits": [16, 17], "enum_ref": "ScUncertaintyRegionMode", "name": "UNCERTAINTY_REGION_MODE"}, array
14939 {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"}, array
14940 {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"}, array
14941 {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"}, array
14942 {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"}, array
14943 {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"}, array
14944 {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"}, array
14945 {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"}, array
14946 {"bits": [25, 26], "name": "UNCERTAINTY_REGION_MULT"}, array
14947 {"bits": [27, 28], "name": "UNCERTAINTY_REGION_PBB_MULT"} array
14952 {"bits": [0, 3], "name": "ER_TRI"}, array
14953 {"bits": [4, 7], "name": "ER_POINT"}, array
14954 {"bits": [8, 11], "name": "ER_RECT"}, array
14955 {"bits": [12, 17], "name": "ER_LINE_LR"}, array
14956 {"bits": [18, 23], "name": "ER_LINE_RL"}, array
14957 {"bits": [24, 27], "name": "ER_LINE_TB"}, array
14958 {"bits": [28, 31], "name": "ER_LINE_BT"} array
14963 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"}, array
14964 {"bits": [10, 10], "name": "LAST_PIXEL"}, array
14965 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"}, array
14966 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}, array
14967 {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"} array
14972 {"bits": [0, 15], "name": "LINE_PATTERN"}, array
14973 {"bits": [16, 23], "name": "REPEAT_COUNT"}, array
14974 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"}, array
14975 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"} array
14980 {"bits": [0, 3], "name": "CURRENT_PTR"}, array
14981 {"bits": [8, 15], "name": "CURRENT_COUNT"} array
14986 {"bits": [0, 0], "name": "MSAA_ENABLE"}, array
14987 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"}, array
14988 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"}, array
14989 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}, array
14990 {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"}, array
14991 {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"} array
14996 {"bits": [0, 0], "name": "WALK_SIZE"}, array
14997 {"bits": [1, 1], "name": "WALK_ALIGNMENT"}, array
14998 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"}, array
14999 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"}, array
15000 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"}, array
15001 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"}, array
15002 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"}, array
15003 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"}, array
15004 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"}, array
15005 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"}, array
15006 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"}, array
15007 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"}, array
15008 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"}, array
15009 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"}, array
15010 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"}, array
15011 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"}, array
15012 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"}, array
15013 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"}, array
15014 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"}, array
15015 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"}, array
15016 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"}, array
15017 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"}, array
15018 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"}, array
15019 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"} array
15024 {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"}, array
15025 {"bits": [16, 23], "name": "MAX_FPOVS_IN_WAVE"} array
15030 {"bits": [0, 13], "name": "X_COORD"} array
15035 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"}, array
15036 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"} array
15041 {"bits": [0, 15], "name": "COUNT"} array
15046 {"bits": [0, 13], "name": "Y_COORD"} array
15051 {"bits": [0, 9], "name": "PERF_SEL"} array
15056 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"}, array
15057 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"}, array
15058 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"}, array
15059 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"}, array
15060 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"}, array
15061 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"}, array
15062 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"}, array
15063 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"}, array
15064 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"}, array
15065 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"}, array
15066 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"}, array
15067 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"}, array
15068 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"}, array
15069 {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"}, array
15070 {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"} array
15075 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"}, array
15076 {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"}, array
15077 {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"} array
15082 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"}, array
15083 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"} array
15088 {"bits": [0, 15], "name": "X"}, array
15089 {"bits": [16, 31], "name": "Y"} array
15094 {"bits": [0, 15], "name": "BR_X"}, array
15095 {"bits": [16, 31], "name": "BR_Y"} array
15100 {"bits": [0, 15], "name": "TL_X"}, array
15101 {"bits": [16, 31], "name": "TL_Y"} array
15106 {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"}, array
15107 {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"}, array
15108 {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"}, array
15109 {"bits": [5, 6], "name": "WAVE_BREAK_REGION_SIZE"} array
15114 {"bits": [0, 0], "name": "ENABLE"}, array
15115 {"bits": [1, 2], "name": "NUM_SE"}, array
15116 {"bits": [5, 6], "name": "NUM_RB_PER_SE"}, array
15117 {"bits": [12, 13], "name": "NUM_SC"}, array
15118 {"bits": [16, 17], "name": "NUM_RB_PER_SC"}, array
15119 {"bits": [20, 21], "name": "NUM_PACKER_PER_SC"} array
15124 {"bits": [0, 31], "name": "VPORT_ZMAX"} array
15129 {"bits": [0, 31], "name": "VPORT_ZMIN"} array
15134 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"}, array
15135 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"} array
15140 {"bits": [0, 14], "name": "BR_X"}, array
15141 {"bits": [16, 30], "name": "BR_Y"} array
15146 {"bits": [0, 14], "name": "TL_X"}, array
15147 {"bits": [16, 30], "name": "TL_Y"}, array
15148 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"} array
15153 {"bits": [0, 31], "name": "STEREO_X_OFFSET"} array
15158 {"bits": [1, 4], "name": "STEREO_MODE"}, array
15159 {"bits": [5, 7], "name": "RT_SLICE_MODE"}, array
15160 {"bits": [8, 11], "name": "RT_SLICE_OFFSET"}, array
15161 {"bits": [16, 18], "name": "VP_ID_MODE"}, array
15162 {"bits": [19, 22], "name": "VP_ID_OFFSET"} array
15167 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"}, array
15168 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"} array
15173 {"bits": [0, 15], "name": "WIDTH"} array
15178 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"}, array
15179 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"}, array
15180 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"}, array
15181 {"bits": [4, 4], "name": "DIAMOND_ADJUST"} array
15186 {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"} array
15191 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"} array
15196 {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"}, array
15197 {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"}, array
15198 {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"}, array
15199 {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"}, array
15200 {"bits": [4, 4], "name": "USE_PROVOKING_ZW"} array
15205 {"bits": [0, 9], "name": "PERF_SEL"}, array
15206 {"bits": [10, 19], "name": "PERF_SEL1"}, array
15207 {"bits": [20, 23], "name": "CNTR_MODE"}, array
15208 {"bits": [24, 27], "name": "PERF_MODE1"}, array
15209 {"bits": [28, 31], "name": "PERF_MODE"} array
15214 {"bits": [0, 9], "name": "PERF_SEL2"}, array
15215 {"bits": [10, 19], "name": "PERF_SEL3"}, array
15216 {"bits": [24, 27], "name": "PERF_MODE3"}, array
15217 {"bits": [28, 31], "name": "PERF_MODE2"} array
15222 {"bits": [0, 15], "name": "MIN_SIZE"}, array
15223 {"bits": [16, 31], "name": "MAX_SIZE"} array
15228 {"bits": [0, 15], "name": "HEIGHT"}, array
15229 {"bits": [16, 31], "name": "WIDTH"} array
15234 {"bits": [0, 31], "name": "CLAMP"} array
15239 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"}, array
15240 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"} array
15245 {"bits": [0, 31], "name": "SCALE"} array
15250 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"}, array
15251 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"}, array
15252 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"}, array
15253 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"}, array
15254 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"}, array
15255 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"}, array
15256 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"}, array
15257 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"}, array
15258 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"}, array
15259 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"}, array
15260 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"} array
15265 {"bits": [0, 0], "name": "CULL_FRONT"}, array
15266 {"bits": [1, 1], "name": "CULL_BACK"}, array
15267 {"bits": [2, 2], "name": "FACE"}, array
15268 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"}, array
15269 …{"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_P… array
15270 …{"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_P… array
15271 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"}, array
15272 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"}, array
15273 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"}, array
15274 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"}, array
15275 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"}, array
15276 {"bits": [20, 20], "name": "PERSP_CORR_DIS"}, array
15277 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}, array
15278 {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"}, array
15279 {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"}, array
15280 {"bits": [24, 24], "name": "KEEP_TOGETHER_ENABLE"} array
15285 {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"}, array
15286 {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"}, array
15287 {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"}, array
15288 {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"}, array
15289 {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"} array
15294 {"bits": [0, 0], "name": "PIX_CENTER"}, array
15295 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"}, array
15296 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"} array
15301 {"bits": [0, 3], "name": "FEATURE_SEL"}, array
15302 {"bits": [4, 7], "name": "SE_INDEX"}, array
15303 {"bits": [8, 11], "name": "SA_INDEX"}, array
15304 {"bits": [12, 15], "name": "WGP_INDEX"}, array
15305 {"bits": [16, 17], "name": "EVENT_SEL"}, array
15306 {"bits": [18, 19], "name": "UNUSED"}, array
15307 {"bits": [20, 20], "name": "ENABLE"}, array
15308 {"bits": [21, 31], "name": "RESERVED"} array
15313 {"bits": [0, 0], "name": "ENABLE"}, array
15314 {"bits": [1, 1], "name": "MODE_SELECT"}, array
15315 {"bits": [2, 2], "name": "RESET"}, array
15316 {"bits": [3, 31], "name": "RESERVED"} array
15321 {"bits": [0, 3], "name": "VFID"}, array
15322 {"bits": [4, 5], "name": "CNT_ID"}, array
15323 {"bits": [6, 31], "name": "RESERVED"} array
15328 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"} array
15333 {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"} array
15338 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, array
15339 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} array
15344 {"bits": [0, 0], "name": "StrobeResetPerfMonitors"}, array
15345 {"bits": [1, 1], "name": "StrobeStartAccumulation"}, array
15346 {"bits": [2, 2], "name": "StrobeRearmAccum"}, array
15347 {"bits": [3, 3], "name": "StrobeResetSpmBlock"}, array
15348 {"bits": [4, 7], "name": "StrobeStartSpm"}, array
15349 {"bits": [8, 8], "name": "StrobeRearmSwaAccum"}, array
15350 {"bits": [9, 9], "name": "StrobeStartSwa"}, array
15351 {"bits": [10, 10], "name": "StrobePerfmonSampleWires"}, array
15352 {"bits": [11, 31], "name": "RESERVED"} array
15357 {"bits": [0, 10], "name": "addr"}, array
15358 {"bits": [11, 31], "name": "RESERVED"} array
15363 {"bits": [0, 7], "name": "global_offset"}, array
15364 {"bits": [8, 15], "name": "spmwithaccum_se_offset"}, array
15365 {"bits": [16, 23], "name": "spmwithaccum_global_offset"}, array
15366 {"bits": [24, 31], "name": "RESERVED"} array
15371 {"bits": [0, 7], "name": "data"}, array
15372 {"bits": [8, 31], "name": "RESERVED"} array
15377 {"bits": [0, 7], "name": "spp_addr_region"}, array
15378 {"bits": [8, 15], "name": "swa_addr_region"}, array
15379 {"bits": [16, 31], "name": "RESERVED"} array
15384 {"bits": [0, 6], "name": "addr"}, array
15385 {"bits": [7, 31], "name": "RESERVED"} array
15390 {"bits": [0, 31], "name": "data"} array
15395 {"bits": [0, 18], "name": "DataRamWrCount"}, array
15396 {"bits": [19, 31], "name": "RESERVED"} array
15401 {"bits": [0, 0], "name": "EnableAccum"}, array
15402 {"bits": [1, 1], "name": "EnableSpmWithAccumMode"}, array
15403 {"bits": [2, 2], "name": "EnableSPPMode"}, array
15404 {"bits": [3, 3], "name": "AutoResetPerfmonDisable"}, array
15405 {"bits": [4, 4], "name": "SwaAutoResetPerfmonDisable"}, array
15406 {"bits": [5, 5], "name": "AutoAccumEn"}, array
15407 {"bits": [6, 6], "name": "SwaAutoAccumEn"}, array
15408 {"bits": [7, 7], "name": "AutoSpmEn"}, array
15409 {"bits": [8, 8], "name": "SwaAutoSpmEn"}, array
15410 {"bits": [9, 9], "name": "Globals_LoadOverride"}, array
15411 {"bits": [10, 10], "name": "Globals_SwaLoadOverride"}, array
15412 {"bits": [11, 11], "name": "SE0_LoadOverride"}, array
15413 {"bits": [12, 12], "name": "SE0_SwaLoadOverride"}, array
15414 {"bits": [13, 13], "name": "SE1_LoadOverride"}, array
15415 {"bits": [14, 14], "name": "SE1_SwaLoadOverride"}, array
15416 {"bits": [15, 15], "name": "SE2_LoadOverride"}, array
15417 {"bits": [16, 16], "name": "SE2_SwaLoadOverride"}, array
15418 {"bits": [17, 17], "name": "SE3_LoadOverride"}, array
15419 {"bits": [18, 18], "name": "SE3_SwaLoadOverride"} array
15424 {"bits": [0, 7], "name": "SamplesRequested"} array
15429 {"bits": [0, 7], "name": "NumbSamplesCompleted"}, array
15430 {"bits": [8, 8], "name": "AccumDone"}, array
15431 {"bits": [9, 9], "name": "SpmDone"}, array
15432 {"bits": [10, 10], "name": "AccumOverflow"}, array
15433 {"bits": [11, 11], "name": "AccumArmed"}, array
15434 {"bits": [12, 12], "name": "SequenceInProgress"}, array
15435 {"bits": [13, 13], "name": "FinalSequenceInProgress"}, array
15436 {"bits": [14, 14], "name": "AllFifosEmpty"}, array
15437 {"bits": [15, 15], "name": "FSMIsIdle"}, array
15438 {"bits": [16, 16], "name": "SwaAccumDone"}, array
15439 {"bits": [17, 17], "name": "SwaSpmDone"}, array
15440 {"bits": [18, 18], "name": "SwaAccumOverflow"}, array
15441 {"bits": [19, 19], "name": "SwaAccumArmed"}, array
15442 {"bits": [20, 20], "name": "AllSegsDone"}, array
15443 {"bits": [21, 21], "name": "RearmSwaPending"}, array
15444 {"bits": [22, 22], "name": "RearmSppPending"}, array
15445 {"bits": [23, 31], "name": "RESERVED"} array
15450 {"bits": [0, 15], "name": "Threshold"} array
15455 {"bits": [0, 6], "name": "DESER_START_SKEW"}, array
15456 {"bits": [7, 31], "name": "RESERVED"} array
15461 {"bits": [0, 31], "name": "GFXCLOCK_HIGHCOUNT"} array
15466 {"bits": [0, 31], "name": "GFXCLOCK_LOWCOUNT"} array
15471 {"bits": [0, 31], "name": "GLB_SAMPLEDELAY_INDEX"} array
15476 {"bits": [0, 6], "name": "data"}, array
15477 {"bits": [7, 31], "name": "RESERVED"} array
15482 {"bits": [0, 6], "name": "GLOBALS_MUXSEL_SKEW"}, array
15483 {"bits": [7, 31], "name": "RESERVED"} array
15488 {"bits": [0, 6], "name": "GLOBALS_SAMPLE_SKEW"}, array
15489 {"bits": [7, 31], "name": "RESERVED"} array
15494 {"bits": [0, 7], "name": "PERFMON_SEL_ADDR"}, array
15495 {"bits": [8, 31], "name": "RESERVED"} array
15500 {"bits": [0, 15], "name": "OFFSET"}, array
15501 {"bits": [16, 31], "name": "RESERVED"} array
15506 {"bits": [0, 11], "name": "RESERVED1"}, array
15507 {"bits": [12, 13], "name": "PERFMON_RING_MODE"}, array
15508 {"bits": [14, 15], "name": "RESERVED"}, array
15509 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"} array
15514 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, array
15515 {"bits": [8, 15], "name": "GLOBAL_NUM_LINE"}, array
15516 {"bits": [16, 31], "name": "RESERVED"} array
15521 {"bits": [0, 15], "name": "RING_BASE_HI"}, array
15522 {"bits": [16, 31], "name": "RESERVED"} array
15527 {"bits": [0, 31], "name": "RING_BASE_LO"} array
15532 {"bits": [0, 31], "name": "RING_BASE_SIZE"} array
15537 {"bits": [0, 7], "name": "SE0_NUM_LINE"}, array
15538 {"bits": [8, 15], "name": "SE1_NUM_LINE"}, array
15539 {"bits": [16, 23], "name": "SE2_NUM_LINE"}, array
15540 {"bits": [24, 31], "name": "SE3_NUM_LINE"} array
15545 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, array
15546 {"bits": [8, 10], "name": "RESERVED1"}, array
15547 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"}, array
15548 {"bits": [16, 20], "name": "SE0_NUM_LINE"}, array
15549 {"bits": [21, 25], "name": "SE1_NUM_LINE"}, array
15550 {"bits": [26, 30], "name": "SE2_NUM_LINE"}, array
15551 {"bits": [31, 31], "name": "RESERVED"} array
15556 {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"} array
15561 {"bits": [0, 4], "name": "RESERVED"}, array
15562 {"bits": [5, 31], "name": "PERFMON_RING_WRPTR"} array
15567 {"bits": [0, 7], "name": "NUM_SEGMENT_THRESHOLD"}, array
15568 {"bits": [8, 31], "name": "RESERVED"} array
15573 {"bits": [0, 8], "name": "PERFMON_SEL_ADDR"}, array
15574 {"bits": [9, 31], "name": "RESERVED"} array
15579 {"bits": [0, 31], "name": "PERFMON_SEL_DATA"} array
15584 {"bits": [0, 6], "name": "SE_MUXSEL_SKEW"}, array
15585 {"bits": [7, 31], "name": "RESERVED"} array
15590 {"bits": [0, 31], "name": "SE_SAMPLEDELAY_INDEX"} array
15595 {"bits": [0, 6], "name": "SE_SAMPLE_SKEW"}, array
15596 {"bits": [7, 31], "name": "RESERVED"} array
15601 {"bits": [0, 0], "name": "PauseSpmSamplingRequest"} array
15606 {"bits": [0, 0], "name": "SpmSamplingPaused"} array
15611 {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"}, array
15612 {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"}, array
15613 {"bits": [4, 5], "name": "TC_PERF_EN_SEL"}, array
15614 {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"}, array
15615 {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"}, array
15616 {"bits": [10, 13], "name": "PERF_COUNTER_CID"}, array
15617 {"bits": [14, 18], "name": "PERF_COUNTER_VMID"}, array
15618 {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"}, array
15619 {"bits": [25, 25], "name": "PERF_SOFT_RESET"}, array
15620 {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"} array
15625 {"bits": [0, 31], "name": "OBSOLETE_ADDR"} array
15630 {"bits": [0, 31], "name": "SCRATCH_REG0"} array
15635 {"bits": [0, 31], "name": "SCRATCH_REG1"} array
15640 {"bits": [0, 31], "name": "SCRATCH_REG2"} array
15645 {"bits": [0, 31], "name": "SCRATCH_REG3"} array
15650 {"bits": [0, 31], "name": "SCRATCH_REG4"} array
15655 {"bits": [0, 31], "name": "SCRATCH_REG5"} array
15660 {"bits": [0, 31], "name": "SCRATCH_REG6"} array
15665 {"bits": [0, 31], "name": "SCRATCH_REG7"} array
15670 {"bits": [0, 23], "name": "IMMED"}, array
15671 {"bits": [24, 26], "name": "ID"}, array
15672 {"bits": [27, 27], "name": "reserved27"}, array
15673 {"bits": [28, 30], "name": "OP"}, array
15674 {"bits": [31, 31], "name": "reserved31"} array
15679 {"bits": [0, 7], "name": "OBSOLETE_UMSK"}, array
15680 {"bits": [16, 17], "name": "OBSOLETE_SWAP"} array
15685 {"bits": [0, 15], "name": "CMD_OP"} array
15690 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"}, array
15691 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"}, array
15692 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"}, array
15693 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"}, array
15694 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"}, array
15695 {"bits": [20, 20], "name": "POS_FLOAT_ULC"}, array
15696 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"} array
15701 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"}, array
15702 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"}, array
15703 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"}, array
15704 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"}, array
15705 {"bits": [26, 26], "name": "FORCE_HALF_RATE_PC_EXP"}, array
15706 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}, array
15707 {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"}, array
15708 {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"}, array
15709 {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"} array
15714 {"bits": [0, 31], "name": "RESERVED"} array
15719 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"}, array
15720 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"}, array
15721 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"}, array
15722 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"}, array
15723 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"}, array
15724 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"}, array
15725 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"} array
15730 {"bits": [0, 3], "name": "BIN0_MIN"}, array
15731 {"bits": [4, 7], "name": "BIN0_MAX"}, array
15732 {"bits": [8, 11], "name": "BIN1_MIN"}, array
15733 {"bits": [12, 15], "name": "BIN1_MAX"}, array
15734 {"bits": [16, 19], "name": "BIN2_MIN"}, array
15735 {"bits": [20, 23], "name": "BIN2_MAX"}, array
15736 {"bits": [24, 27], "name": "BIN3_MIN"}, array
15737 {"bits": [28, 31], "name": "BIN3_MAX"} array
15742 {"bits": [0, 5], "name": "OFFSET"}, array
15743 {"bits": [8, 9], "name": "DEFAULT_VAL"}, array
15744 {"bits": [10, 10], "name": "FLAT_SHADE"}, array
15745 {"bits": [11, 11], "name": "ROTATE_PC_PTR"}, array
15746 {"bits": [13, 16], "name": "CYL_WRAP"}, array
15747 {"bits": [17, 17], "name": "PT_SPRITE_TEX"}, array
15748 {"bits": [18, 18], "name": "DUP"}, array
15749 {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, array
15750 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, array
15751 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, array
15752 {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"}, array
15753 {"bits": [24, 24], "name": "ATTR0_VALID"}, array
15754 {"bits": [25, 25], "name": "ATTR1_VALID"} array
15759 {"bits": [0, 5], "name": "OFFSET"}, array
15760 {"bits": [8, 9], "name": "DEFAULT_VAL"}, array
15761 {"bits": [10, 10], "name": "FLAT_SHADE"}, array
15762 {"bits": [11, 11], "name": "ROTATE_PC_PTR"}, array
15763 {"bits": [18, 18], "name": "DUP"}, array
15764 {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, array
15765 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, array
15766 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, array
15767 {"bits": [24, 24], "name": "ATTR0_VALID"}, array
15768 {"bits": [25, 25], "name": "ATTR1_VALID"} array
15773 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"}, array
15774 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"}, array
15775 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"}, array
15776 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"}, array
15777 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"}, array
15778 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"}, array
15779 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"}, array
15780 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"}, array
15781 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"}, array
15782 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"}, array
15783 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"}, array
15784 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"}, array
15785 {"bits": [12, 12], "name": "FRONT_FACE_ENA"}, array
15786 {"bits": [13, 13], "name": "ANCILLARY_ENA"}, array
15787 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"}, array
15788 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"} array
15793 {"bits": [0, 5], "name": "NUM_INTERP"}, array
15794 {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"}, array
15795 {"bits": [8, 8], "name": "LATE_PC_DEALLOC"}, array
15796 {"bits": [9, 13], "name": "NUM_PRIM_INTERP"}, array
15797 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}, array
15798 {"bits": [15, 15], "name": "PS_W32_EN"} array
15803 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"}, array
15804 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"}, array
15805 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"}, array
15806 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"}, array
15807 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"}, array
15808 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"}, array
15809 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"}, array
15810 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"} array
15815 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "IDX0_EXPORT_FORMAT"} array
15820 {"bits": [0, 5], "name": "LIMIT"} array
15825 {"bits": [0, 31], "name": "CHECKSUM"} array
15830 {"bits": [0, 7], "name": "MEM_BASE"} array
15835 {"bits": [0, 31], "name": "MEM_BASE"} array
15840 {"bits": [0, 5], "name": "VGPRS"}, array
15841 {"bits": [6, 9], "name": "SGPRS"}, array
15842 {"bits": [10, 11], "name": "PRIORITY"}, array
15843 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
15844 {"bits": [20, 20], "name": "PRIV"}, array
15845 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
15846 {"bits": [23, 23], "name": "IEEE_MODE"}, array
15847 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"}, array
15848 {"bits": [25, 25], "name": "MEM_ORDERED"}, array
15849 {"bits": [26, 26], "name": "FWD_PROGRESS"}, array
15850 {"bits": [27, 27], "name": "WGP_MODE"}, array
15851 {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"}, array
15852 {"bits": [31, 31], "name": "FP16_OVFL"} array
15857 {"bits": [0, 5], "name": "VGPRS"}, array
15858 {"bits": [6, 9], "name": "SGPRS"}, array
15859 {"bits": [10, 11], "name": "PRIORITY"}, array
15860 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
15861 {"bits": [20, 20], "name": "PRIV"}, array
15862 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
15863 {"bits": [23, 23], "name": "IEEE_MODE"}, array
15864 {"bits": [24, 24], "name": "MEM_ORDERED"}, array
15865 {"bits": [25, 25], "name": "FWD_PROGRESS"}, array
15866 {"bits": [26, 26], "name": "WGP_MODE"}, array
15867 {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"}, array
15868 {"bits": [30, 30], "name": "FP16_OVFL"} array
15873 {"bits": [0, 5], "name": "VGPRS"}, array
15874 {"bits": [6, 9], "name": "SGPRS"}, array
15875 {"bits": [10, 11], "name": "PRIORITY"}, array
15876 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
15877 {"bits": [20, 20], "name": "PRIV"}, array
15878 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
15879 {"bits": [23, 23], "name": "IEEE_MODE"}, array
15880 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"}, array
15881 {"bits": [25, 25], "name": "MEM_ORDERED"}, array
15882 {"bits": [26, 26], "name": "FWD_PROGRESS"}, array
15883 {"bits": [27, 27], "name": "LOAD_PROVOKING_VTX"}, array
15884 {"bits": [29, 29], "name": "FP16_OVFL"} array
15889 {"bits": [0, 5], "name": "VGPRS"}, array
15890 {"bits": [6, 9], "name": "SGPRS"}, array
15891 {"bits": [10, 11], "name": "PRIORITY"}, array
15892 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
15893 {"bits": [20, 20], "name": "PRIV"}, array
15894 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
15895 {"bits": [23, 23], "name": "IEEE_MODE"}, array
15896 {"bits": [24, 25], "name": "VGPR_COMP_CNT"}, array
15897 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"}, array
15898 {"bits": [27, 27], "name": "MEM_ORDERED"}, array
15899 {"bits": [28, 28], "name": "FWD_PROGRESS"}, array
15900 {"bits": [31, 31], "name": "FP16_OVFL"} array
15905 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
15906 {"bits": [1, 5], "name": "USER_SGPR"}, array
15907 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
15908 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
15909 {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"}, array
15910 {"bits": [18, 18], "name": "OC_LDS_EN"}, array
15911 {"bits": [19, 26], "name": "LDS_SIZE"}, array
15912 {"bits": [27, 27], "name": "USER_SGPR_MSB"}, array
15913 {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} array
15918 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
15919 {"bits": [1, 5], "name": "USER_SGPR"}, array
15920 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
15921 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
15922 {"bits": [16, 17], "name": "VGPR_COMP_CNT"}, array
15923 {"bits": [18, 18], "name": "OC_LDS_EN"}, array
15924 {"bits": [19, 26], "name": "LDS_SIZE"}, array
15925 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
15926 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
15931 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
15932 {"bits": [1, 5], "name": "USER_SGPR"}, array
15933 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
15934 {"bits": [7, 7], "name": "OC_LDS_EN"}, array
15935 {"bits": [8, 8], "name": "TG_SIZE_EN"}, array
15936 {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
15937 {"bits": [18, 26], "name": "LDS_SIZE"}, array
15938 {"bits": [27, 27], "name": "USER_SGPR_MSB"}, array
15939 {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} array
15944 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
15945 {"bits": [1, 5], "name": "USER_SGPR"}, array
15946 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
15947 {"bits": [7, 7], "name": "WAVE_CNT_EN"}, array
15948 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"}, array
15949 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
15950 {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"}, array
15951 {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"}, array
15952 {"bits": [27, 27], "name": "USER_SGPR_MSB"}, array
15953 {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} array
15958 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
15959 {"bits": [1, 5], "name": "USER_SGPR"}, array
15960 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
15961 {"bits": [7, 7], "name": "OC_LDS_EN"}, array
15962 {"bits": [8, 8], "name": "SO_BASE0_EN"}, array
15963 {"bits": [9, 9], "name": "SO_BASE1_EN"}, array
15964 {"bits": [10, 10], "name": "SO_BASE2_EN"}, array
15965 {"bits": [11, 11], "name": "SO_BASE3_EN"}, array
15966 {"bits": [12, 12], "name": "SO_EN"}, array
15967 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
15968 {"bits": [22, 22], "name": "PC_BASE_EN"}, array
15969 {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}, array
15970 {"bits": [27, 27], "name": "USER_SGPR_MSB"}, array
15971 {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} array
15976 {"bits": [0, 15], "name": "CU_EN"}, array
15977 {"bits": [16, 21], "name": "WAVE_LIMIT"}, array
15978 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}, array
15979 {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"} array
15984 {"bits": [0, 5], "name": "WAVE_LIMIT"}, array
15985 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"}, array
15986 {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}, array
15987 {"bits": [16, 31], "name": "CU_EN"} array
15992 {"bits": [0, 15], "name": "CU_EN"}, array
15993 {"bits": [16, 21], "name": "WAVE_LIMIT"}, array
15994 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"} array
15999 {"bits": [0, 15], "name": "CU_EN"}, array
16000 {"bits": [16, 22], "name": "SPI_SHADER_LATE_ALLOC_GS"} array
16005 {"bits": [0, 15], "name": "CU_EN"} array
16010 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"}, array
16011 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"}, array
16012 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"}, array
16013 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}, array
16014 {"bits": [16, 19], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS4_EXPORT_FORMAT"} array
16019 {"bits": [0, 0], "name": "SOFT_GROUPING_EN"}, array
16020 {"bits": [1, 4], "name": "NUMBER_OF_REQUESTS_PER_CU"}, array
16021 {"bits": [5, 8], "name": "SOFT_GROUPING_ALLOCATION_TIMEOUT"}, array
16022 {"bits": [9, 9], "name": "HARD_LOCK_HYSTERESIS"}, array
16023 {"bits": [10, 14], "name": "HARD_LOCK_LOW_THRESHOLD"}, array
16024 {"bits": [15, 15], "name": "PRODUCER_REQUEST_LOCKOUT"}, array
16025 {"bits": [16, 16], "name": "GLOBAL_SCANNING_EN"}, array
16026 {"bits": [17, 19], "name": "ALLOCATION_RATE_THROTTLING_THRESHOLD"} array
16031 {"bits": [0, 6], "name": "CONTRIBUTION"} array
16036 {"bits": [0, 31], "name": "DATA"} array
16041 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"} array
16046 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"}, array
16047 {"bits": [6, 6], "name": "VS_HALF_PACK"}, array
16048 {"bits": [7, 7], "name": "NO_PC_EXPORT"}, array
16049 {"bits": [8, 12], "name": "PRIM_EXPORT_COUNT"} array
16054 {"bits": [0, 0], "name": "TARGET_INST"}, array
16055 {"bits": [1, 1], "name": "TARGET_DATA"}, array
16056 {"bits": [2, 2], "name": "INVALIDATE"}, array
16057 {"bits": [16, 16], "name": "COMPLETE"}, array
16058 {"bits": [17, 18], "name": "L2_WB_POLICY"} array
16063 {"bits": [0, 8], "name": "PERF_SEL"}, array
16064 {"bits": [20, 23], "name": "SPM_MODE"}, array
16065 {"bits": [28, 31], "name": "PERF_MODE"} array
16070 {"bits": [0, 0], "name": "PS_EN"}, array
16071 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, array
16072 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, array
16073 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, array
16074 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, array
16075 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, array
16076 {"bits": [6, 6], "name": "CS_EN"}, array
16077 {"bits": [8, 9], "name": "CNTR_RATE"}, array
16078 {"bits": [13, 13], "name": "DISABLE_FLUSH"}, array
16079 {"bits": [14, 14], "name": "DISABLE_ME0PIPE0_PERF"}, array
16080 {"bits": [15, 15], "name": "DISABLE_ME0PIPE1_PERF"}, array
16081 {"bits": [16, 16], "name": "DISABLE_ME1PIPE0_PERF"}, array
16082 {"bits": [17, 17], "name": "DISABLE_ME1PIPE1_PERF"}, array
16083 {"bits": [18, 18], "name": "DISABLE_ME1PIPE2_PERF"}, array
16084 {"bits": [19, 19], "name": "DISABLE_ME1PIPE3_PERF"} array
16089 {"bits": [0, 0], "name": "FORCE_EN"} array
16094 {"bits": [0, 31], "name": "BASE_LO"} array
16099 {"bits": [0, 3], "name": "BASE_HI"}, array
16100 {"bits": [8, 29], "name": "SIZE"} array
16105 {"bits": [0, 1], "name": "MODE"}, array
16106 {"bits": [2, 2], "name": "ALL_VMID"}, array
16107 {"bits": [3, 3], "name": "CH_PERF_EN"}, array
16108 {"bits": [4, 4], "name": "INTERRUPT_EN"}, array
16109 {"bits": [5, 5], "name": "DOUBLE_BUFFER"}, array
16110 {"bits": [6, 8], "name": "HIWATER"}, array
16111 {"bits": [9, 9], "name": "REG_STALL_EN"}, array
16112 {"bits": [10, 10], "name": "SPI_STALL_EN"}, array
16113 {"bits": [11, 11], "name": "SQ_STALL_EN"}, array
16114 {"bits": [12, 12], "name": "REG_DROP_ON_STALL"}, array
16115 {"bits": [13, 13], "name": "UTIL_TIMER"}, array
16116 {"bits": [14, 15], "name": "WAVESTART_MODE"}, array
16117 {"bits": [16, 17], "name": "RT_FREQ"}, array
16118 {"bits": [18, 18], "name": "SYNC_COUNT_MARKERS"}, array
16119 {"bits": [19, 19], "name": "SYNC_COUNT_DRAWS"}, array
16120 {"bits": [20, 22], "name": "LOWATER_OFFSET"}, array
16121 {"bits": [28, 28], "name": "AUTO_FLUSH_PADDING_DIS"}, array
16122 {"bits": [29, 29], "name": "AUTO_FLUSH_MODE"}, array
16123 {"bits": [30, 30], "name": "CAPTURE_ALL"}, array
16124 {"bits": [31, 31], "name": "DRAW_EVENT_EN"} array
16129 {"bits": [0, 31], "name": "CNTR"} array
16134 {"bits": [0, 1], "name": "SIMD_SEL"}, array
16135 {"bits": [4, 7], "name": "WGP_SEL"}, array
16136 {"bits": [9, 9], "name": "SA_SEL"}, array
16137 {"bits": [10, 16], "name": "WTYPE_INCLUDE"} array
16142 {"bits": [0, 11], "name": "FINISH_PENDING"}, array
16143 {"bits": [12, 23], "name": "FINISH_DONE"}, array
16144 {"bits": [24, 24], "name": "UTC_ERR"}, array
16145 {"bits": [25, 25], "name": "BUSY"}, array
16146 {"bits": [26, 26], "name": "EVENT_CNTR_OVERFLOW"}, array
16147 {"bits": [27, 27], "name": "EVENT_CNTR_STALL"}, array
16148 {"bits": [28, 31], "name": "OWNER_VMID"} array
16153 {"bits": [0, 0], "name": "BUF0_FULL"}, array
16154 {"bits": [1, 1], "name": "BUF1_FULL"}, array
16155 {"bits": [4, 4], "name": "PACKET_LOST_BUF_NO_LOCKDOWN"} array
16160 {"bits": [0, 10], "enum_ref": "ThreadTraceTokenExclude", "name": "TOKEN_EXCLUDE"}, array
16161 {"bits": [12, 12], "name": "BOP_EVENTS_TOKEN_INCLUDE"}, array
16162 {"bits": [16, 23], "enum_ref": "ThreadTraceRegInclude", "name": "REG_INCLUDE"}, array
16163 {"bits": [24, 25], "name": "INST_EXCLUDE"}, array
16164 {"bits": [26, 28], "name": "REG_EXCLUDE"}, array
16165 {"bits": [31, 31], "name": "REG_DETAIL_ALL"} array
16170 {"bits": [0, 28], "name": "OFFSET"}, array
16171 {"bits": [31, 31], "name": "BUFFER_ID"} array
16176 {"bits": [0, 19], "name": "WAVE_SLOT"} array
16181 {"bits": [0, 31], "name": "EXEC_HI"} array
16186 {"bits": [0, 31], "name": "EXEC_LO"} array
16191 {"bits": [0, 31], "name": "UNUSED"} array
16196 {"bits": [0, 7], "name": "VGPR_BASE"}, array
16197 {"bits": [8, 15], "name": "VGPR_SIZE"}, array
16198 {"bits": [16, 23], "name": "SGPR_BASE"}, array
16199 {"bits": [24, 27], "name": "SGPR_SIZE"} array
16204 {"bits": [0, 4], "name": "WAVE_ID"}, array
16205 {"bits": [8, 9], "name": "SIMD_ID"}, array
16206 {"bits": [10, 13], "name": "WGP_ID"}, array
16207 {"bits": [16, 16], "name": "SA_ID"}, array
16208 {"bits": [18, 19], "name": "SE_ID"} array
16213 {"bits": [0, 3], "name": "QUEUE_ID"}, array
16214 {"bits": [4, 5], "name": "PIPE_ID"}, array
16215 {"bits": [8, 9], "name": "ME_ID"}, array
16216 {"bits": [12, 14], "name": "STATE_ID"}, array
16217 {"bits": [16, 20], "name": "WG_ID"}, array
16218 {"bits": [24, 27], "name": "VM_ID"} array
16223 {"bits": [0, 3], "name": "WAVE_ID"}, array
16224 {"bits": [4, 5], "name": "SIMD_ID"}, array
16225 {"bits": [6, 7], "name": "PIPE_ID"}, array
16226 {"bits": [8, 11], "name": "CU_ID"}, array
16227 {"bits": [12, 12], "name": "SH_ID"}, array
16228 {"bits": [13, 14], "name": "SE_ID"}, array
16229 {"bits": [15, 15], "name": "WAVE_ID_MSB"}, array
16230 {"bits": [16, 19], "name": "TG_ID"}, array
16231 {"bits": [20, 23], "name": "VM_ID"}, array
16232 {"bits": [24, 26], "name": "QUEUE_ID"}, array
16233 {"bits": [27, 29], "name": "STATE_ID"}, array
16234 {"bits": [30, 31], "name": "ME_ID"} array
16239 {"bits": [24, 24], "name": "WAVE_IDLE"}, array
16240 {"bits": [25, 31], "name": "MISC_CNT"} array
16245 {"bits": [0, 3], "name": "VM_CNT"}, array
16246 {"bits": [4, 6], "name": "EXP_CNT"}, array
16247 {"bits": [7, 7], "name": "LGKM_CNT_BIT4"}, array
16248 {"bits": [8, 11], "name": "LGKM_CNT"}, array
16249 {"bits": [12, 14], "name": "VALU_CNT"}, array
16250 {"bits": [22, 23], "name": "VM_CNT_HI"}, array
16251 {"bits": [24, 24], "name": "LGKM_CNT_BIT5"}, array
16252 {"bits": [26, 31], "name": "VS_CNT"} array
16257 {"bits": [0, 1], "name": "INST_PREFETCH"}, array
16258 {"bits": [7, 7], "name": "RESOURCE_OVERRIDE"}, array
16259 {"bits": [8, 9], "name": "MEM_ORDER"}, array
16260 {"bits": [10, 10], "name": "FWD_PROGRESS"}, array
16261 {"bits": [11, 11], "name": "WAVE64"} array
16266 {"bits": [0, 31], "name": "INST_DW0"} array
16271 {"bits": [0, 8], "name": "LDS_BASE"}, array
16272 {"bits": [12, 20], "name": "LDS_SIZE"}, array
16273 {"bits": [24, 27], "name": "VGPR_SHARED_SIZE"} array
16278 {"bits": [0, 31], "name": "M0"} array
16283 {"bits": [0, 3], "name": "FP_ROUND"}, array
16284 {"bits": [4, 7], "name": "FP_DENORM"}, array
16285 {"bits": [8, 8], "name": "DX10_CLAMP"}, array
16286 {"bits": [9, 9], "name": "IEEE"}, array
16287 {"bits": [10, 10], "name": "LOD_CLAMPED"}, array
16288 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
16289 {"bits": [23, 23], "name": "FP16_OVFL"}, array
16290 {"bits": [27, 27], "name": "DISABLE_PERF"} array
16295 {"bits": [0, 15], "name": "PC_HI"} array
16300 {"bits": [0, 31], "name": "PC_LO"} array
16305 {"bits": [0, 0], "name": "POPS_EN"}, array
16306 {"bits": [1, 2], "name": "POPS_PACKER_ID"} array
16311 {"bits": [0, 1], "name": "DEP_MODE"} array
16316 {"bits": [0, 19], "name": "CYCLES"} array
16321 {"bits": [0, 0], "name": "SCC"}, array
16322 {"bits": [1, 2], "name": "SPI_PRIO"}, array
16323 {"bits": [3, 4], "name": "USER_PRIO"}, array
16324 {"bits": [5, 5], "name": "PRIV"}, array
16325 {"bits": [6, 6], "name": "TRAP_EN"}, array
16326 {"bits": [7, 7], "name": "TTRACE_EN"}, array
16327 {"bits": [8, 8], "name": "EXPORT_RDY"}, array
16328 {"bits": [9, 9], "name": "EXECZ"}, array
16329 {"bits": [10, 10], "name": "VCCZ"}, array
16330 {"bits": [11, 11], "name": "IN_TG"}, array
16331 {"bits": [12, 12], "name": "IN_BARRIER"}, array
16332 {"bits": [13, 13], "name": "HALT"}, array
16333 {"bits": [14, 14], "name": "TRAP"}, array
16334 {"bits": [15, 15], "name": "TTRACE_SIMD_EN"}, array
16335 {"bits": [16, 16], "name": "VALID"}, array
16336 {"bits": [17, 17], "name": "ECC_ERR"}, array
16337 {"bits": [18, 18], "name": "SKIP_EXPORT"}, array
16338 {"bits": [19, 19], "name": "PERF_EN"}, array
16339 {"bits": [23, 23], "name": "FATAL_HALT"}, array
16340 {"bits": [27, 27], "name": "MUST_EXPORT"} array
16345 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"}, array
16346 {"bits": [10, 10], "name": "SAVECTX"}, array
16347 {"bits": [11, 11], "name": "ILLEGAL_INST"}, array
16348 {"bits": [12, 14], "name": "EXCP_HI"}, array
16349 {"bits": [15, 15], "name": "BUFFER_OOB"}, array
16350 {"bits": [16, 19], "name": "EXCP_CYCLE"}, array
16351 {"bits": [20, 23], "name": "EXCP_GROUP_MASK"}, array
16352 {"bits": [24, 24], "name": "EXCP_WAVE64HI"}, array
16353 {"bits": [28, 28], "name": "UTC_ERROR"}, array
16354 {"bits": [29, 31], "name": "DP_RATE"} array
16359 {"bits": [0, 5], "name": "SRC0"}, array
16360 {"bits": [6, 11], "name": "SRC1"}, array
16361 {"bits": [12, 17], "name": "SRC2"}, array
16362 {"bits": [18, 23], "name": "DST"} array
16367 {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"}, array
16368 {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"}, array
16369 {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"}, array
16370 {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"}, array
16371 {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"}, array
16372 {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"}, array
16373 {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"}, array
16374 {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"}, array
16375 {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"}, array
16376 {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"}, array
16377 {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"}, array
16378 {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"}, array
16379 {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"}, array
16380 {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"}, array
16381 {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"}, array
16382 {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"}, array
16383 {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"} array
16388 {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"}, array
16389 {"bits": [4, 7], "name": "MRT1_EPSILON"}, array
16390 {"bits": [8, 11], "name": "MRT2_EPSILON"}, array
16391 {"bits": [12, 15], "name": "MRT3_EPSILON"}, array
16392 {"bits": [16, 19], "name": "MRT4_EPSILON"}, array
16393 {"bits": [20, 23], "name": "MRT5_EPSILON"}, array
16394 {"bits": [24, 27], "name": "MRT6_EPSILON"}, array
16395 {"bits": [28, 31], "name": "MRT7_EPSILON"} array
16400 {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"}, array
16401 {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"}, array
16402 {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"}, array
16403 {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"}, array
16404 {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"}, array
16405 {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"} array
16410 {"bits": [0, 9], "name": "PERF_SEL"}, array
16411 {"bits": [20, 23], "name": "CNTR_MODE"}, array
16412 {"bits": [28, 31], "name": "PERF_MODE"} array
16417 {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"}, array
16418 {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"}, array
16419 {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"}, array
16420 {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"}, array
16421 {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"}, array
16422 {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"}, array
16423 {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"}, array
16424 {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"} array
16429 {"bits": [0, 0], "name": "MRT0_FMT_MAPPING_DISABLE"}, array
16430 {"bits": [1, 1], "name": "MRT1_FMT_MAPPING_DISABLE"}, array
16431 {"bits": [2, 2], "name": "MRT2_FMT_MAPPING_DISABLE"}, array
16432 {"bits": [3, 3], "name": "MRT3_FMT_MAPPING_DISABLE"}, array
16433 {"bits": [4, 4], "name": "MRT4_FMT_MAPPING_DISABLE"}, array
16434 {"bits": [5, 5], "name": "MRT5_FMT_MAPPING_DISABLE"}, array
16435 {"bits": [6, 6], "name": "MRT6_FMT_MAPPING_DISABLE"}, array
16436 {"bits": [7, 7], "name": "MRT7_FMT_MAPPING_DISABLE"} array
16441 {"bits": [0, 31], "name": "ADDRESS"} array
16446 {"bits": [0, 7], "name": "ADDRESS"} array
16451 {"bits": [0, 9], "name": "PERF_SEL"}, array
16452 {"bits": [28, 31], "name": "COUNTER_MODE"} array
16457 {"bits": [0, 31], "name": "MATCH_INDEX"} array
16462 {"bits": [0, 31], "name": "BASE_ADDR"} array
16467 {"bits": [0, 15], "name": "BASE_ADDR"} array
16472 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, array
16473 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"}, array
16474 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"}, array
16475 {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, array
16476 {"bits": [8, 8], "name": "ATC"}, array
16477 {"bits": [9, 9], "name": "NOT_EOP"}, array
16478 {"bits": [10, 10], "name": "REQ_PATH"}, array
16479 {"bits": [11, 13], "name": "MTYPE"}, array
16480 {"bits": [14, 14], "name": "DISABLE_INSTANCE_PACKING"} array
16485 {"bits": [0, 31], "name": "MAX_SIZE"} array
16490 {"bits": [0, 31], "name": "NUM_INSTANCES"} array
16495 {"bits": [0, 31], "name": "NUM_INDICES"} array
16500 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"}, array
16501 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"}, array
16502 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"}, array
16503 {"bits": [5, 5], "name": "NOT_EOP"}, array
16504 {"bits": [6, 6], "name": "USE_OPAQUE"}, array
16505 {"bits": [29, 31], "name": "REG_RT_INDEX"} array
16510 {"bits": [1, 1], "name": "EN_REG_RT_INDEX"}, array
16511 {"bits": [3, 3], "name": "EN_PRIM_PAYLOAD"}, array
16512 {"bits": [4, 4], "name": "EN_DRAW_VP"} array
16517 {"bits": [0, 31], "name": "MISC"} array
16522 {"bits": [0, 14], "name": "ITEMSIZE"} array
16527 {"bits": [0, 31], "name": "MEM_SIZE"} array
16532 {"bits": [0, 10], "name": "ES_PER_GS"} array
16537 {"bits": [0, 27], "name": "ADDRESS_LOW"} array
16542 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"}, array
16543 {"bits": [10, 26], "name": "ADDRESS_HI"}, array
16544 {"bits": [27, 27], "name": "EXTENDED_EVENT"} array
16549 {"bits": [0, 3], "name": "DECR"} array
16554 {"bits": [0, 3], "name": "FIRST_DECR"} array
16559 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}, array
16560 {"bits": [14, 14], "name": "RETAIN_ORDER"}, array
16561 {"bits": [15, 15], "name": "RETAIN_QUADS"}, array
16562 {"bits": [16, 18], "name": "PRIM_ORDER"} array
16567 {"bits": [0, 0], "name": "COMP_X_EN"}, array
16568 {"bits": [1, 1], "name": "COMP_Y_EN"}, array
16569 {"bits": [2, 2], "name": "COMP_Z_EN"}, array
16570 {"bits": [3, 3], "name": "COMP_W_EN"}, array
16571 {"bits": [8, 15], "name": "STRIDE"}, array
16572 {"bits": [16, 23], "name": "SHIFT"} array
16577 {"bits": [0, 3], "name": "X_CONV"}, array
16578 {"bits": [4, 7], "name": "X_OFFSET"}, array
16579 {"bits": [8, 11], "name": "Y_CONV"}, array
16580 {"bits": [12, 15], "name": "Y_OFFSET"}, array
16581 {"bits": [16, 19], "name": "Z_CONV"}, array
16582 {"bits": [20, 23], "name": "Z_OFFSET"}, array
16583 {"bits": [24, 27], "name": "W_CONV"}, array
16584 {"bits": [28, 31], "name": "W_OFFSET"} array
16589 {"bits": [0, 14], "name": "OFFSET"} array
16594 {"bits": [0, 0], "name": "ENABLE"}, array
16595 {"bits": [2, 8], "name": "CNT"}, array
16596 {"bits": [31, 31], "name": "EN_MAX_VERT_OUT_PER_GS_INSTANCE"} array
16601 {"bits": [0, 10], "name": "MAX_VERT_OUT"} array
16606 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"}, array
16607 {"bits": [3, 3], "name": "RESERVED_0"}, array
16608 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"}, array
16609 {"bits": [6, 10], "name": "RESERVED_1"}, array
16610 {"bits": [11, 11], "name": "GS_C_PACK_EN"}, array
16611 {"bits": [12, 12], "name": "RESERVED_2"}, array
16612 {"bits": [13, 13], "name": "ES_PASSTHRU"}, array
16613 {"bits": [14, 14], "name": "COMPUTE_MODE"}, array
16614 {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"}, array
16615 {"bits": [16, 16], "name": "ELEMENT_INFO_EN"}, array
16616 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"}, array
16617 {"bits": [18, 18], "name": "SUPPRESS_CUTS"}, array
16618 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"}, array
16619 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"}, array
16620 {"bits": [21, 22], "name": "ONCHIP"} array
16625 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"}, array
16626 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}, array
16627 {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"} array
16632 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"}, array
16633 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"}, array
16634 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"}, array
16635 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"}, array
16636 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"} array
16641 {"bits": [0, 10], "name": "GS_PER_ES"} array
16646 {"bits": [0, 3], "name": "GS_PER_VS"} array
16651 {"bits": [0, 1], "name": "TESS_MODE"} array
16656 {"bits": [0, 31], "name": "MAX_TESS"} array
16661 {"bits": [0, 31], "name": "MIN_TESS"} array
16666 {"bits": [0, 7], "name": "REUSE_DEPTH"} array
16671 {"bits": [0, 9], "name": "OFFCHIP_BUFFERING"}, array
16672 …{"bits": [10, 11], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANU… array
16677 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, array
16678 {"bits": [14, 14], "name": "DISABLE_INSTANCE_PACKING"} array
16683 {"bits": [0, 31], "name": "INDX_OFFSET"} array
16688 {"bits": [0, 31], "name": "INSTANCE_BASE_ID"} array
16693 {"bits": [0, 31], "name": "STEP_RATE"} array
16698 {"bits": [0, 7], "name": "NUM_PATCHES"}, array
16699 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"}, array
16700 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"} array
16705 {"bits": [0, 31], "name": "MAX_INDX"} array
16710 {"bits": [0, 31], "name": "MIN_INDX"} array
16715 {"bits": [0, 0], "name": "RESET_EN"}, array
16716 {"bits": [1, 1], "name": "MATCH_ALL_BITS"} array
16721 {"bits": [0, 31], "name": "RESET_INDX"} array
16726 {"bits": [0, 2], "name": "PATH_SELECT"} array
16731 {"bits": [0, 6], "name": "DEALLOC_DIST"} array
16736 {"bits": [0, 0], "name": "PRIMITIVEID_EN"}, array
16737 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}, array
16738 {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"} array
16743 {"bits": [0, 31], "name": "VALUE"} array
16748 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"} array
16753 {"bits": [0, 0], "name": "REUSE_OFF"} array
16758 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, array
16759 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, array
16760 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, array
16761 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, array
16762 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, array
16763 {"bits": [8, 8], "name": "DYNAMIC_HS"}, array
16764 {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"}, array
16765 {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"}, array
16766 {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"}, array
16767 {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}, array
16768 {"bits": [13, 13], "name": "PRIMGEN_EN"}, array
16769 {"bits": [14, 14], "name": "ORDERED_ID_MODE"}, array
16770 {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"}, array
16771 {"bits": [19, 20], "name": "GS_FAST_LAUNCH"}, array
16772 {"bits": [21, 21], "name": "HS_W32_EN"}, array
16773 {"bits": [22, 22], "name": "GS_W32_EN"}, array
16774 {"bits": [23, 23], "name": "VS_W32_EN"}, array
16775 {"bits": [24, 24], "name": "NGG_WAVE_ID_EN"}, array
16776 {"bits": [25, 25], "name": "PRIMGEN_PASSTHRU_EN"} array
16781 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"}, array
16782 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"}, array
16783 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"}, array
16784 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"} array
16789 {"bits": [0, 31], "name": "OFFSET"} array
16794 {"bits": [0, 0], "name": "STREAMOUT_0_EN"}, array
16795 {"bits": [1, 1], "name": "STREAMOUT_1_EN"}, array
16796 {"bits": [2, 2], "name": "STREAMOUT_2_EN"}, array
16797 {"bits": [3, 3], "name": "STREAMOUT_3_EN"}, array
16798 {"bits": [4, 6], "name": "RAST_STREAM"}, array
16799 {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"}, array
16800 {"bits": [8, 11], "name": "RAST_STREAM_MASK"}, array
16801 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"} array
16806 {"bits": [0, 8], "name": "VERTEX_STRIDE"} array
16811 {"bits": [0, 9], "name": "STRIDE"} array
16816 {"bits": [0, 7], "name": "ACCUM_ISOLINE"}, array
16817 {"bits": [8, 15], "name": "ACCUM_TRI"}, array
16818 {"bits": [16, 23], "name": "ACCUM_QUAD"}, array
16819 {"bits": [24, 28], "name": "DONUT_SPLIT"}, array
16820 {"bits": [29, 31], "name": "TRAP_SPLIT"} array
16825 {"bits": [0, 31], "name": "BASE"} array
16830 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"}, array
16831 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"}, array
16832 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"}, array
16833 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"}, array
16834 {"bits": [9, 9], "name": "DEPRECATED"}, array
16835 {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"}, array
16836 {"bits": [14, 14], "name": "DISABLE_DONUTS"}, array
16837 {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, array
16838 {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"}, array
16839 {"bits": [19, 19], "enum_ref": "VGT_DETECT_ONE", "name": "DETECT_ONE"}, array
16840 {"bits": [20, 20], "enum_ref": "VGT_DETECT_ZERO", "name": "DETECT_ZERO"}, array
16841 {"bits": [23, 25], "name": "MTYPE"} array
16846 {"bits": [0, 15], "name": "SIZE"} array
16851 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"} array
16856 {"bits": [0, 0], "name": "VTX_CNT_EN"} array