8253     {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},  array
8254     {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},  array
8255     {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},  array
8256     {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},  array
8257     {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},  array
8258     {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},  array
8259     {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},  array
8260     {"bits": [30, 30], "name": "ENABLE"},  array
8261     {"bits": [31, 31], "name": "DISABLE_ROP3"}  array
8266     {"bits": [0, 31], "name": "BLEND_ALPHA"}  array
8271     {"bits": [0, 31], "name": "BLEND_BLUE"}  array
8276     {"bits": [0, 31], "name": "BLEND_GREEN"}  array
8281     {"bits": [0, 31], "name": "BLEND_RED"}  array
8286     {"bits": [0, 4], "name": "TILE_MODE_INDEX"},  array
8287     {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},  array
8288     {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},  array
8289     {"bits": [12, 14], "name": "NUM_SAMPLES"},  array
8290     {"bits": [15, 16], "name": "NUM_FRAGMENTS"},  array
8291     {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}  array
8296     {"bits": [0, 31], "name": "BASE_256B"}  array
8301     {"bits": [0, 31], "name": "CLEAR_WORD0"}  array
8306     {"bits": [0, 31], "name": "CLEAR_WORD1"}  array
8311     {"bits": [0, 13], "name": "TILE_MAX"}  array
8316     {"bits": [0, 21], "name": "TILE_MAX"}  array
8321     {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},  array
8322     {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},  array
8323     {"bits": [7, 7], "name": "LINEAR_GENERAL"},  array
8324     {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},  array
8325     {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},  array
8326     {"bits": [13, 13], "name": "FAST_CLEAR"},  array
8327     {"bits": [14, 14], "name": "COMPRESSION"},  array
8328     {"bits": [15, 15], "name": "BLEND_CLAMP"},  array
8329     {"bits": [16, 16], "name": "BLEND_BYPASS"},  array
8330     {"bits": [17, 17], "name": "SIMPLE_FLOAT"},  array
8331     {"bits": [18, 18], "name": "ROUND_MODE"},  array
8332     {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},  array
8333     {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},  array
8334     {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},  array
8335     {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}  array
8340     {"bits": [0, 10], "name": "TILE_MAX"},  array
8341     {"bits": [20, 30], "name": "FMASK_TILE_MAX"}  array
8346     {"bits": [0, 10], "name": "SLICE_START"},  array
8347     {"bits": [13, 23], "name": "SLICE_MAX"}  array
8352     {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},  array
8353     {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},  array
8354     {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}  array
8359     {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},  array
8360     {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},  array
8361     {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},  array
8362     {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},  array
8363     {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},  array
8364     {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},  array
8365     {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},  array
8366     {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}  array
8371     {"bits": [0, 3], "name": "TARGET0_ENABLE"},  array
8372     {"bits": [4, 7], "name": "TARGET1_ENABLE"},  array
8373     {"bits": [8, 11], "name": "TARGET2_ENABLE"},  array
8374     {"bits": [12, 15], "name": "TARGET3_ENABLE"},  array
8375     {"bits": [16, 19], "name": "TARGET4_ENABLE"},  array
8376     {"bits": [20, 23], "name": "TARGET5_ENABLE"},  array
8377     {"bits": [24, 27], "name": "TARGET6_ENABLE"},  array
8378     {"bits": [28, 31], "name": "TARGET7_ENABLE"}  array
8383     {"bits": [1, 2], "name": "DPFP_RATE"},  array
8384     {"bits": [3, 3], "name": "SQC_BALANCE_DISABLE"},  array
8385     {"bits": [4, 4], "name": "HALF_LDS"},  array
8386     {"bits": [16, 31], "name": "INACTIVE_CUS"}  array
8391     {"bits": [16, 19], "name": "SQC0_BANK_DISABLE"},  array
8392     {"bits": [20, 23], "name": "SQC1_BANK_DISABLE"},  array
8393     {"bits": [24, 27], "name": "SQC2_BANK_DISABLE"},  array
8394     {"bits": [28, 31], "name": "SQC3_BANK_DISABLE"}  array
8399     {"bits": [0, 3], "name": "ON_DELAY"},  array
8400     {"bits": [4, 11], "name": "OFF_HYSTERESIS"},  array
8401     {"bits": [24, 24], "name": "SOFT_OVERRIDE7"},  array
8402     {"bits": [25, 25], "name": "PERF_ENABLE"},  array
8403     {"bits": [26, 26], "name": "DBG_ENABLE"},  array
8404     {"bits": [27, 27], "name": "SOFT_OVERRIDE4"},  array
8405     {"bits": [28, 28], "name": "SOFT_OVERRIDE3"},  array
8406     {"bits": [29, 29], "name": "CORE_OVERRIDE"},  array
8407     {"bits": [29, 29], "name": "SOFT_OVERRIDE2"},  array
8408     {"bits": [31, 31], "name": "REG_OVERRIDE"}  array
8413     {"bits": [0, 3], "name": "ON_DELAY"},  array
8414     {"bits": [4, 11], "name": "OFF_HYSTERESIS"},  array
8415     {"bits": [24, 24], "name": "SOFT_OVERRIDE7"},  array
8416     {"bits": [25, 25], "name": "SOFT_OVERRIDE6"},  array
8417     {"bits": [26, 26], "name": "SOFT_OVERRIDE5"},  array
8418     {"bits": [27, 27], "name": "SOFT_OVERRIDE4"},  array
8419     {"bits": [28, 28], "name": "SOFT_OVERRIDE3"},  array
8420     {"bits": [29, 29], "name": "SU_CLK_OVERRIDE"},  array
8421     {"bits": [30, 30], "name": "CL_CLK_OVERRIDE"},  array
8422     {"bits": [31, 31], "name": "REG_CLK_OVERRIDE"}  array
8427     {"bits": [0, 3], "name": "ON_DELAY"},  array
8428     {"bits": [4, 11], "name": "OFF_HYSTERESIS"},  array
8429     {"bits": [24, 24], "name": "SOFT_OVERRIDE7"},  array
8430     {"bits": [25, 25], "name": "SOFT_OVERRIDE6"},  array
8431     {"bits": [26, 26], "name": "SOFT_OVERRIDE5"},  array
8432     {"bits": [27, 27], "name": "SOFT_OVERRIDE4"},  array
8433     {"bits": [28, 28], "name": "SOFT_OVERRIDE3"},  array
8434     {"bits": [29, 29], "name": "SOFT_OVERRIDE2"},  array
8435     {"bits": [30, 30], "name": "SOFT_OVERRIDE1"},  array
8436     {"bits": [31, 31], "name": "SOFT_OVERRIDE0"}  array
8441     {"bits": [0, 3], "name": "ON_DELAY"},  array
8442     {"bits": [4, 11], "name": "OFF_HYSTERESIS"},  array
8443     {"bits": [30, 30], "name": "CORE_OVERRIDE"},  array
8444     {"bits": [31, 31], "name": "REG_OVERRIDE"}  array
8449     {"bits": [0, 3], "name": "ON_DELAY"},  array
8450     {"bits": [4, 11], "name": "OFF_HYSTERESIS"},  array
8451     {"bits": [24, 24], "name": "SOFT_OVERRIDE7"},  array
8452     {"bits": [25, 25], "name": "PERF_ENABLE"},  array
8453     {"bits": [26, 26], "name": "DBG_ENABLE"},  array
8454     {"bits": [27, 27], "name": "SOFT_OVERRIDE4"},  array
8455     {"bits": [28, 28], "name": "SOFT_OVERRIDE3"},  array
8456     {"bits": [29, 29], "name": "GS_OVERRIDE"},  array
8457     {"bits": [30, 30], "name": "CORE_OVERRIDE"},  array
8458     {"bits": [31, 31], "name": "REG_OVERRIDE"}  array
8463     {"bits": [0, 31], "name": "DEST_BASE_256B"}  array
8468     {"bits": [0, 31], "name": "SIZE"}  array
8473     {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},  array
8474     {"bits": [1, 1], "name": "PARTIAL_TG_EN"},  array
8475     {"bits": [2, 2], "name": "FORCE_START_AT_000"},  array
8476     {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},  array
8477     {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},  array
8478     {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},  array
8479     {"bits": [6, 6], "name": "ORDER_MODE"},  array
8480     {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},  array
8481     {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},  array
8482     {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},  array
8483     {"bits": [12, 12], "name": "DATA_ATC"},  array
8484     {"bits": [14, 14], "name": "RESTORE"}  array
8489     {"bits": [0, 15], "name": "NUM_THREAD_FULL"},  array
8490     {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}  array
8495     {"bits": [0, 7], "name": "DATA"},  array
8496     {"bits": [8, 8], "name": "INST_ATC"}  array
8501     {"bits": [0, 5], "name": "VGPRS"},  array
8502     {"bits": [6, 9], "name": "SGPRS"},  array
8503     {"bits": [10, 11], "name": "PRIORITY"},  array
8504     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
8505     {"bits": [20, 20], "name": "PRIV"},  array
8506     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
8507     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
8508     {"bits": [23, 23], "name": "IEEE_MODE"},  array
8509     {"bits": [24, 24], "name": "BULKY"},  array
8510     {"bits": [25, 25], "name": "CDBG_USER"}  array
8515     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
8516     {"bits": [1, 5], "name": "USER_SGPR"},  array
8517     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
8518     {"bits": [7, 7], "name": "TGID_X_EN"},  array
8519     {"bits": [8, 8], "name": "TGID_Y_EN"},  array
8520     {"bits": [9, 9], "name": "TGID_Z_EN"},  array
8521     {"bits": [10, 10], "name": "TG_SIZE_EN"},  array
8522     {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},  array
8523     {"bits": [13, 14], "name": "EXCP_EN_MSB"},  array
8524     {"bits": [15, 23], "name": "LDS_SIZE"},  array
8525     {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
8530     {"bits": [0, 5], "name": "WAVES_PER_SH"},  array
8531     {"bits": [0, 5], "name": "WAVES_PER_SH_GFX6"},  array
8532     {"bits": [12, 15], "name": "TG_PER_CU"},  array
8533     {"bits": [16, 21], "name": "LOCK_THRESHOLD"},  array
8534     {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},  array
8535     {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},  array
8536     {"bits": [24, 26], "name": "CU_GROUP_COUNT"}  array
8541     {"bits": [0, 31], "name": "START"}  array
8546     {"bits": [0, 15], "name": "SH0_CU_EN"},  array
8547     {"bits": [16, 31], "name": "SH1_CU_EN"}  array
8552     {"bits": [0, 7], "name": "DATA"}  array
8557     {"bits": [0, 11], "name": "WAVES"},  array
8558     {"bits": [12, 24], "name": "WAVESIZE"}  array
8563     {"bits": [0, 3], "name": "DATA"}  array
8568     {"bits": [0, 7], "name": "MEM_ADDR_HI"},  array
8569     {"bits": [16, 17], "name": "CS_PS_SEL"},  array
8570     {"bits": [29, 31], "name": "COMMAND"}  array
8575     {"bits": [2, 31], "name": "MEM_ADDR_LO"}  array
8580     {"bits": [0, 31], "name": "LAST_FENCE"}  array
8585     {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"}  array
8590     {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"}  array
8595     {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},  array
8596     {"bits": [6, 6], "name": "COHER_CNT_NEQ_ZERO"},  array
8597     {"bits": [7, 7], "name": "PFP_PARSING_PACKETS"},  array
8598     {"bits": [8, 8], "name": "ME_PARSING_PACKETS"},  array
8599     {"bits": [9, 9], "name": "RCIU_PFP_BUSY"},  array
8600     {"bits": [10, 10], "name": "RCIU_ME_BUSY"},  array
8601     {"bits": [12, 12], "name": "SEM_CMDFIFO_NOT_EMPTY"},  array
8602     {"bits": [13, 13], "name": "SEM_FAILED_AND_HOLDING"},  array
8603     {"bits": [14, 14], "name": "SEM_POLLING_FOR_PASS"},  array
8604     {"bits": [15, 15], "name": "GFX_CONTEXT_BUSY"},  array
8605     {"bits": [17, 17], "name": "ME_PARSER_BUSY"},  array
8606     {"bits": [18, 18], "name": "EOP_DONE_BUSY"},  array
8607     {"bits": [19, 19], "name": "STRM_OUT_BUSY"},  array
8608     {"bits": [20, 20], "name": "PIPE_STATS_BUSY"},  array
8609     {"bits": [21, 21], "name": "RCIU_CE_BUSY"},  array
8610     {"bits": [22, 22], "name": "CE_PARSING_PACKETS"}  array
8615     {"bits": [0, 10], "name": "CEQ_CNT_RING"},  array
8616     {"bits": [16, 26], "name": "CEQ_CNT_IB1"}  array
8621     {"bits": [0, 10], "name": "CEQ_CNT_IB2"}  array
8626     {"bits": [0, 31], "name": "CE_HEADER_DUMP"}  array
8631     {"bits": [0, 7], "name": "IB1_BASE_HI"}  array
8636     {"bits": [2, 31], "name": "IB1_BASE_LO"}  array
8641     {"bits": [0, 19], "name": "IB1_BUFSZ"}  array
8646     {"bits": [0, 7], "name": "IB2_BASE_HI"}  array
8651     {"bits": [2, 31], "name": "IB2_BASE_LO"}  array
8656     {"bits": [0, 19], "name": "IB2_BUFSZ"}  array
8661     {"bits": [0, 7], "name": "INIT_BASE_HI"}  array
8666     {"bits": [5, 31], "name": "INIT_BASE_LO"}  array
8671     {"bits": [0, 11], "name": "INIT_BUFSZ"}  array
8676     {"bits": [0, 9], "name": "CEQ_RPTR_INDIRECT1"},  array
8677     {"bits": [16, 25], "name": "CEQ_WPTR_INDIRECT1"}  array
8682     {"bits": [0, 9], "name": "CEQ_RPTR_INDIRECT2"},  array
8683     {"bits": [16, 25], "name": "CEQ_WPTR_INDIRECT2"}  array
8688     {"bits": [0, 9], "name": "CEQ_RPTR_PRIMARY"},  array
8689     {"bits": [16, 25], "name": "CEQ_WPTR_PRIMARY"}  array
8694     {"bits": [0, 31], "name": "CMD_DATA"}  array
8699     {"bits": [0, 10], "name": "CMD_INDEX"},  array
8700     {"bits": [12, 13], "name": "CMD_ME_SEL"},  array
8701     {"bits": [16, 17], "name": "CMD_QUEUE_SEL"}  array
8706     {"bits": [0, 7], "name": "ACTIVE_HP3D_CONTEXTS"},  array
8707     {"bits": [8, 10], "name": "CURRENT_HP3D_CONTEXT"},  array
8708     {"bits": [20, 27], "name": "ACTIVE_GFX_CONTEXTS"},  array
8709     {"bits": [28, 30], "name": "CURRENT_GFX_CONTEXT"}  array
8714     {"bits": [0, 31], "name": "COHER_BASE_256B"}  array
8719     {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},  array
8720     {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},  array
8721     {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},  array
8722     {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},  array
8723     {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},  array
8724     {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},  array
8725     {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},  array
8726     {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},  array
8727     {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},  array
8728     {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},  array
8729     {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},  array
8730     {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},  array
8731     {"bits": [16, 16], "name": "TC_VOL_ACTION_ENA"},  array
8732     {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},  array
8733     {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},  array
8734     {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},  array
8735     {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},  array
8736     {"bits": [23, 23], "name": "TC_ACTION_ENA"},  array
8737     {"bits": [25, 25], "name": "CB_ACTION_ENA"},  array
8738     {"bits": [26, 26], "name": "DB_ACTION_ENA"},  array
8739     {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},  array
8740     {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},  array
8741     {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}  array
8746     {"bits": [0, 31], "name": "COHER_SIZE_256B"}  array
8751     {"bits": [0, 5], "name": "START_DELAY_COUNT"}  array
8756     {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},  array
8757     {"bits": [24, 25], "name": "MEID"},  array
8758     {"bits": [30, 30], "name": "PHASE1_STATUS"},  array
8759     {"bits": [31, 31], "name": "STATUS"}  array
8764     {"bits": [0, 3], "name": "FETCH_BUFFER_DEPTH"}  array
8769     {"bits": [0, 3], "name": "BUFFER_SLOTS_ALLOCATED"},  array
8770     {"bits": [8, 13], "name": "BUFFER_REQUEST_COUNT"}  array
8775     {"bits": [4, 5], "name": "MIN_AVAILSZ"},  array
8776     {"bits": [16, 19], "name": "BUFFER_DEPTH"},  array
8777     {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},  array
8778     {"bits": [29, 29], "name": "PIO_FIFO_FULL"},  array
8779     {"bits": [30, 31], "name": "PIO_COUNT"}  array
8784     {"bits": [0, 20], "name": "BYTE_COUNT"},  array
8785     {"bits": [21, 21], "name": "DIS_WC"},  array
8786     {"bits": [22, 23], "name": "SRC_SWAP"},  array
8787     {"bits": [24, 25], "name": "DST_SWAP"},  array
8788     {"bits": [26, 26], "name": "SAS"},  array
8789     {"bits": [27, 27], "name": "DAS"},  array
8790     {"bits": [28, 28], "name": "SAIC"},  array
8791     {"bits": [29, 29], "name": "DAIC"},  array
8792     {"bits": [30, 30], "name": "RAW_WAIT"}  array
8797     {"bits": [0, 31], "name": "DST_ADDR"}  array
8802     {"bits": [0, 7], "name": "DST_ADDR_HI"}  array
8807     {"bits": [0, 31], "name": "SRC_ADDR"}  array
8812     {"bits": [0, 7], "name": "SRC_ADDR_HI"}  array
8817     {"bits": [0, 25], "name": "DMA_READ_TAG"},  array
8818     {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}  array
8823     {"bits": [0, 15], "name": "ADDR_HI"}  array
8828     {"bits": [0, 1], "name": "ADDR_SWAP"},  array
8829     {"bits": [2, 31], "name": "ADDR_LO"}  array
8834     {"bits": [0, 31], "name": "DATA_HI"}  array
8839     {"bits": [0, 31], "name": "DATA_LO"}  array
8844     {"bits": [0, 31], "name": "LAST_FENCE_HI"}  array
8849     {"bits": [0, 31], "name": "LAST_FENCE_LO"}  array
8854     {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"}  array
8859     {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"}  array
8864     {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"}  array
8869     {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"}  array
8874     {"bits": [0, 5], "name": "FREE_COUNT"},  array
8875     {"bits": [8, 13], "name": "FREE_COUNT_GDS"},  array
8876     {"bits": [16, 21], "name": "FREE_COUNT_PFP"}  array
8881     {"bits": [0, 19], "name": "IB1_OFFSET"}  array
8886     {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}  array
8891     {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}  array
8896     {"bits": [0, 19], "name": "IB2_OFFSET"}  array
8901     {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}  array
8906     {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}  array
8911     {"bits": [14, 14], "name": "CP_ECC_ERROR_INT_ASSERTED"},  array
8912     {"bits": [17, 17], "name": "WRM_POLL_TIMEOUT_INT_ASSERTED"},  array
8913     {"bits": [19, 19], "name": "CNTX_BUSY_INT_ASSERTED"},  array
8914     {"bits": [20, 20], "name": "CNTX_EMPTY_INT_ASSERTED"},  array
8915     {"bits": [22, 22], "name": "PRIV_INSTR_INT_ASSERTED"},  array
8916     {"bits": [23, 23], "name": "PRIV_REG_INT_ASSERTED"},  array
8917     {"bits": [24, 24], "name": "OPCODE_ERROR_INT_ASSERTED"},  array
8918     {"bits": [26, 26], "name": "TIME_STAMP_INT_ASSERTED"},  array
8919     {"bits": [27, 27], "name": "RESERVED_BIT_ERROR_INT_ASSERTED"},  array
8920     {"bits": [29, 29], "name": "GENERIC2_INT_ASSERTED"},  array
8921     {"bits": [30, 30], "name": "GENERIC1_INT_ASSERTED"},  array
8922     {"bits": [31, 31], "name": "GENERIC0_INT_ASSERTED"}  array
8927     {"bits": [0, 4], "name": "PACK_DELAY_CNT"}  array
8932     {"bits": [0, 9], "name": "MEQ_CNT"}  array
8937     {"bits": [0, 9], "name": "MEQ_RPTR"},  array
8938     {"bits": [16, 25], "name": "MEQ_WPTR"}  array
8943     {"bits": [0, 7], "name": "MEQ1_START"},  array
8944     {"bits": [8, 15], "name": "MEQ2_START"}  array
8949     {"bits": [4, 4], "name": "CE_INVALIDATE_ICACHE"},  array
8950     {"bits": [6, 6], "name": "PFP_INVALIDATE_ICACHE"},  array
8951     {"bits": [8, 8], "name": "ME_INVALIDATE_ICACHE"},  array
8952     {"bits": [24, 24], "name": "CE_HALT"},  array
8953     {"bits": [25, 25], "name": "CE_STEP"},  array
8954     {"bits": [26, 26], "name": "PFP_HALT"},  array
8955     {"bits": [27, 27], "name": "PFP_STEP"},  array
8956     {"bits": [28, 28], "name": "ME_HALT"},  array
8957     {"bits": [29, 29], "name": "ME_STEP"}  array
8962     {"bits": [0, 31], "name": "ME_HEADER_DUMP"}  array
8967     {"bits": [0, 7], "name": "ME_MC_RADDR_HI"}  array
8972     {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},  array
8973     {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}  array
8978     {"bits": [0, 7], "name": "ME_MC_WADDR_HI"}  array
8983     {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},  array
8984     {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}  array
8989     {"bits": [0, 31], "name": "ME_MC_WDATA_HI"}  array
8994     {"bits": [0, 31], "name": "ME_MC_WDATA_LO"}  array
8999     {"bits": [0, 0], "name": "ME_CNTXSW_PREEMPTION"}  array
9004     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"}  array
9009     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"}  array
9014     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"}  array
9019     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"}  array
9024     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"}  array
9029     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"}  array
9034     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"}  array
9039     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"}  array
9044     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"}  array
9049     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"}  array
9054     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"}  array
9059     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"}  array
9064     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"}  array
9069     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"}  array
9074     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"}  array
9079     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"}  array
9084     {"bits": [0, 31], "name": "CINVOC_COUNT_HI"}  array
9089     {"bits": [0, 31], "name": "CINVOC_COUNT_LO"}  array
9094     {"bits": [0, 31], "name": "CPRIM_COUNT_HI"}  array
9099     {"bits": [0, 31], "name": "CPRIM_COUNT_LO"}  array
9104     {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},  array
9105     {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},  array
9106     {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},  array
9107     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}  array
9112     {"bits": [31, 31], "name": "PERFMON_ENABLE"}  array
9117     {"bits": [0, 31], "name": "PFP_HEADER_DUMP"}  array
9122     {"bits": [0, 0], "name": "IB_EN"}  array
9127     {"bits": [0, 0], "name": "CONFIG_REG_EN"},  array
9128     {"bits": [1, 1], "name": "CNTX_REG_EN"},  array
9129     {"bits": [15, 15], "name": "UCONFIG_REG_EN"},  array
9130     {"bits": [16, 16], "name": "SH_GFX_REG_EN"},  array
9131     {"bits": [24, 24], "name": "SH_CS_REG_EN"}  array
9136     {"bits": [0, 31], "name": "PIPE_STATS_ADDR_HI"}  array
9141     {"bits": [0, 1], "name": "PIPE_STATS_ADDR_SWAP"},  array
9142     {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}  array
9147     {"bits": [0, 5], "name": "ROQ_IB1_START"},  array
9148     {"bits": [8, 13], "name": "ROQ_IB2_START"}  array
9153     {"bits": [0, 19], "name": "RB_RPTR"}  array
9158     {"bits": [0, 19], "name": "RB_OFFSET"}  array
9163     {"bits": [0, 27], "name": "PRE_WRITE_TIMER"},  array
9164     {"bits": [28, 31], "name": "PRE_WRITE_LIMIT"}  array
9169     {"bits": [0, 15], "name": "POLL_FREQUENCY"},  array
9170     {"bits": [16, 31], "name": "IDLE_POLL_COUNT"}  array
9175     {"bits": [0, 1], "name": "RINGID"}  array
9180     {"bits": [0, 7], "name": "RB1_START"},  array
9181     {"bits": [8, 15], "name": "RB2_START"},  array
9182     {"bits": [16, 23], "name": "R0_IB1_START"},  array
9183     {"bits": [24, 31], "name": "R1_IB1_START"}  array
9188     {"bits": [0, 10], "name": "ROQ_CNT_IB2"}  array
9193     {"bits": [0, 7], "name": "R2_IB1_START"},  array
9194     {"bits": [8, 15], "name": "R0_IB2_START"},  array
9195     {"bits": [16, 23], "name": "R1_IB2_START"},  array
9196     {"bits": [24, 31], "name": "R2_IB2_START"}  array
9201     {"bits": [0, 10], "name": "ROQ_CNT_RING"},  array
9202     {"bits": [16, 26], "name": "ROQ_CNT_IB1"}  array
9207     {"bits": [0, 9], "name": "ROQ_RPTR_INDIRECT1"},  array
9208     {"bits": [16, 25], "name": "ROQ_WPTR_INDIRECT1"}  array
9213     {"bits": [0, 9], "name": "ROQ_RPTR_INDIRECT2"},  array
9214     {"bits": [16, 25], "name": "ROQ_WPTR_INDIRECT2"}  array
9219     {"bits": [0, 9], "name": "ROQ_RPTR_PRIMARY"},  array
9220     {"bits": [16, 25], "name": "ROQ_WPTR_PRIMARY"}  array
9225     {"bits": [0, 31], "name": "SCRATCH_DATA"}  array
9230     {"bits": [0, 7], "name": "SCRATCH_INDEX"}  array
9235     {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"}  array
9240     {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"}  array
9245     {"bits": [0, 31], "name": "OBSOLETE"}  array
9250     {"bits": [0, 31], "name": "SEM_WAIT_TIMER"}  array
9255     {"bits": [0, 7], "name": "SEM_ADDR_HI"},  array
9256     {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},  array
9257     {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},  array
9258     {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},  array
9259     {"bits": [29, 31], "name": "SEM_SELECT"}  array
9264     {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},  array
9265     {"bits": [3, 31], "name": "SEM_ADDR_LO"}  array
9270     {"bits": [0, 0], "name": "RBIU_TO_DMA_NOT_RDY_TO_RCV"},  array
9271     {"bits": [2, 2], "name": "RBIU_TO_SEM_NOT_RDY_TO_RCV"},  array
9272     {"bits": [4, 4], "name": "RBIU_TO_MEMWR_NOT_RDY_TO_RCV"},  array
9273     {"bits": [10, 10], "name": "ME_HAS_ACTIVE_CE_BUFFER_FLAG"},  array
9274     {"bits": [11, 11], "name": "ME_HAS_ACTIVE_DE_BUFFER_FLAG"},  array
9275     {"bits": [12, 12], "name": "ME_STALLED_ON_TC_WR_CONFIRM"},  array
9276     {"bits": [13, 13], "name": "ME_STALLED_ON_ATOMIC_RTN_DATA"},  array
9277     {"bits": [14, 14], "name": "ME_WAITING_ON_MC_READ_DATA"},  array
9278     {"bits": [15, 15], "name": "ME_WAITING_ON_REG_READ_DATA"},  array
9279     {"bits": [16, 16], "name": "MIU_WAITING_ON_RDREQ_FREE"},  array
9280     {"bits": [17, 17], "name": "MIU_WAITING_ON_WRREQ_FREE"},  array
9281     {"bits": [23, 23], "name": "RCIU_WAITING_ON_GDS_FREE"},  array
9282     {"bits": [24, 24], "name": "RCIU_WAITING_ON_GRBM_FREE"},  array
9283     {"bits": [25, 25], "name": "RCIU_WAITING_ON_VGT_FREE"},  array
9284     {"bits": [26, 26], "name": "RCIU_STALLED_ON_ME_READ"},  array
9285     {"bits": [27, 27], "name": "RCIU_STALLED_ON_DMA_READ"},  array
9286     {"bits": [28, 28], "name": "RCIU_HALTED_BY_REG_VIOLATION"},  array
9287     {"bits": [28, 28], "name": "RCIU_STALLED_ON_APPEND_READ"}  array
9292     {"bits": [0, 0], "name": "PFP_TO_CSF_NOT_RDY_TO_RCV"},  array
9293     {"bits": [1, 1], "name": "PFP_TO_MEQ_NOT_RDY_TO_RCV"},  array
9294     {"bits": [2, 2], "name": "PFP_TO_RCIU_NOT_RDY_TO_RCV"},  array
9295     {"bits": [4, 4], "name": "PFP_TO_VGT_WRITES_PENDING"},  array
9296     {"bits": [5, 5], "name": "PFP_RCIU_READ_PENDING"},  array
9297     {"bits": [6, 6], "name": "PFP_MIU_READ_PENDING"},  array
9298     {"bits": [7, 7], "name": "PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV"},  array
9299     {"bits": [8, 8], "name": "PFP_WAITING_ON_BUFFER_DATA"},  array
9300     {"bits": [9, 9], "name": "ME_WAIT_ON_CE_COUNTER"},  array
9301     {"bits": [10, 10], "name": "ME_WAIT_ON_AVAIL_BUFFER"},  array
9302     {"bits": [11, 11], "name": "GFX_CNTX_NOT_AVAIL_TO_ME"},  array
9303     {"bits": [12, 12], "name": "ME_RCIU_NOT_RDY_TO_RCV"},  array
9304     {"bits": [13, 13], "name": "ME_TO_CONST_NOT_RDY_TO_RCV"},  array
9305     {"bits": [14, 14], "name": "ME_WAITING_DATA_FROM_PFP"},  array
9306     {"bits": [15, 15], "name": "ME_WAITING_ON_PARTIAL_FLUSH"},  array
9307     {"bits": [16, 16], "name": "MEQ_TO_ME_NOT_RDY_TO_RCV"},  array
9308     {"bits": [17, 17], "name": "STQ_TO_ME_NOT_RDY_TO_RCV"},  array
9309     {"bits": [18, 18], "name": "ME_WAITING_DATA_FROM_STQ"},  array
9310     {"bits": [19, 19], "name": "PFP_STALLED_ON_TC_WR_CONFIRM"},  array
9311     {"bits": [20, 20], "name": "PFP_STALLED_ON_ATOMIC_RTN_DATA"},  array
9312     {"bits": [21, 21], "name": "EOPD_FIFO_NEEDS_SC_EOP_DONE"},  array
9313     {"bits": [22, 22], "name": "EOPD_FIFO_NEEDS_WR_CONFIRM"},  array
9314     {"bits": [23, 23], "name": "STRMO_WR_OF_PRIM_DATA_PENDING"},  array
9315     {"bits": [24, 24], "name": "PIPE_STATS_WR_DATA_PENDING"},  array
9316     {"bits": [25, 25], "name": "APPEND_RDY_WAIT_ON_CS_DONE"},  array
9317     {"bits": [26, 26], "name": "APPEND_RDY_WAIT_ON_PS_DONE"},  array
9318     {"bits": [27, 27], "name": "APPEND_WAIT_ON_WR_CONFIRM"},  array
9319     {"bits": [28, 28], "name": "APPEND_ACTIVE_PARTITION"},  array
9320     {"bits": [29, 29], "name": "APPEND_WAITING_TO_SEND_MEMWRITE"},  array
9321     {"bits": [30, 30], "name": "SURF_SYNC_NEEDS_IDLE_CNTXS"},  array
9322     {"bits": [31, 31], "name": "SURF_SYNC_NEEDS_ALL_CLEAN"}  array
9327     {"bits": [0, 0], "name": "CE_TO_CSF_NOT_RDY_TO_RCV"},  array
9328     {"bits": [1, 1], "name": "CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV"},  array
9329     {"bits": [2, 2], "name": "CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER"},  array
9330     {"bits": [3, 3], "name": "CE_TO_RAM_INIT_NOT_RDY"},  array
9331     {"bits": [4, 4], "name": "CE_TO_RAM_DUMP_NOT_RDY"},  array
9332     {"bits": [5, 5], "name": "CE_TO_RAM_WRITE_NOT_RDY"},  array
9333     {"bits": [6, 6], "name": "CE_TO_INC_FIFO_NOT_RDY_TO_RCV"},  array
9334     {"bits": [7, 7], "name": "CE_TO_WR_FIFO_NOT_RDY_TO_RCV"},  array
9335     {"bits": [8, 8], "name": "CE_TO_MIU_WRITE_NOT_RDY_TO_RCV"},  array
9336     {"bits": [10, 10], "name": "CE_WAITING_ON_BUFFER_DATA"},  array
9337     {"bits": [11, 11], "name": "CE_WAITING_ON_CE_BUFFER_FLAG"},  array
9338     {"bits": [12, 12], "name": "CE_WAITING_ON_DE_COUNTER"},  array
9339     {"bits": [13, 13], "name": "CE_WAITING_ON_DE_COUNTER_UNDERFLOW"},  array
9340     {"bits": [14, 14], "name": "TCIU_WAITING_ON_FREE"},  array
9341     {"bits": [15, 15], "name": "TCIU_WAITING_ON_TAGS"}  array
9346     {"bits": [7, 7], "name": "MIU_RDREQ_BUSY"},  array
9347     {"bits": [8, 8], "name": "MIU_WRREQ_BUSY"},  array
9348     {"bits": [9, 9], "name": "ROQ_RING_BUSY"},  array
9349     {"bits": [10, 10], "name": "ROQ_INDIRECT1_BUSY"},  array
9350     {"bits": [11, 11], "name": "ROQ_INDIRECT2_BUSY"},  array
9351     {"bits": [12, 12], "name": "ROQ_STATE_BUSY"},  array
9352     {"bits": [13, 13], "name": "DC_BUSY"},  array
9353     {"bits": [15, 15], "name": "PFP_BUSY"},  array
9354     {"bits": [16, 16], "name": "MEQ_BUSY"},  array
9355     {"bits": [17, 17], "name": "ME_BUSY"},  array
9356     {"bits": [18, 18], "name": "QUERY_BUSY"},  array
9357     {"bits": [19, 19], "name": "SEMAPHORE_BUSY"},  array
9358     {"bits": [20, 20], "name": "INTERRUPT_BUSY"},  array
9359     {"bits": [21, 21], "name": "SURFACE_SYNC_BUSY"},  array
9360     {"bits": [22, 22], "name": "DMA_BUSY"},  array
9361     {"bits": [23, 23], "name": "RCIU_BUSY"},  array
9362     {"bits": [24, 24], "name": "SCRATCH_RAM_BUSY"},  array
9363     {"bits": [25, 25], "name": "CPC_CPG_BUSY"},  array
9364     {"bits": [26, 26], "name": "CE_BUSY"},  array
9365     {"bits": [27, 27], "name": "TCIU_BUSY"},  array
9366     {"bits": [28, 28], "name": "ROQ_CE_RING_BUSY"},  array
9367     {"bits": [29, 29], "name": "ROQ_CE_INDIRECT1_BUSY"},  array
9368     {"bits": [30, 30], "name": "ROQ_CE_INDIRECT2_BUSY"},  array
9369     {"bits": [31, 31], "name": "CP_BUSY"}  array
9374     {"bits": [0, 8], "name": "STQ_CNT"}  array
9379     {"bits": [0, 9], "name": "STQ_RPTR"}  array
9384     {"bits": [0, 7], "name": "STQ0_START"},  array
9385     {"bits": [8, 15], "name": "STQ1_START"},  array
9386     {"bits": [16, 23], "name": "STQ2_START"}  array
9391     {"bits": [0, 31], "name": "STREAM_OUT_ADDR_HI"}  array
9396     {"bits": [0, 1], "name": "STREAM_OUT_ADDR_SWAP"},  array
9397     {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}  array
9402     {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}  array
9407     {"bits": [0, 7], "name": "ST_BASE_HI"}  array
9412     {"bits": [2, 31], "name": "ST_BASE_LO"}  array
9417     {"bits": [0, 19], "name": "ST_BUFSZ"}  array
9422     {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"}  array
9427     {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"}  array
9432     {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"}  array
9437     {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"}  array
9442     {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"}  array
9447     {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"}  array
9452     {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"}  array
9457     {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"}  array
9462     {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"}  array
9467     {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"}  array
9472     {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"}  array
9477     {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"}  array
9482     {"bits": [0, 31], "name": "IAVERT_COUNT_HI"}  array
9487     {"bits": [0, 31], "name": "IAVERT_COUNT_LO"}  array
9492     {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"}  array
9497     {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"}  array
9502     {"bits": [0, 3], "name": "VMID"}  array
9507     {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"}  array
9512     {"bits": [0, 2], "name": "SRC_STATE_ID"}  array
9517     {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},  array
9518     {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},  array
9519     {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},  array
9520     {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},  array
9521     {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},  array
9522     {"bits": [16, 16], "name": "OFFSET_ROUND"}  array
9527     {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},  array
9528     {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},  array
9529     {"bits": [4, 6], "name": "SAMPLE_RATE"},  array
9530     {"bits": [8, 11], "name": "ZPASS_ENABLE"},  array
9531     {"bits": [12, 15], "name": "ZFAIL_ENABLE"},  array
9532     {"bits": [16, 19], "name": "SFAIL_ENABLE"},  array
9533     {"bits": [20, 23], "name": "DBFAIL_ENABLE"},  array
9534     {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},  array
9535     {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}  array
9540     {"bits": [0, 31], "name": "MAX"}  array
9545     {"bits": [0, 31], "name": "MIN"}  array
9550     {"bits": [0, 31], "name": "DEPTH_CLEAR"}  array
9555     {"bits": [0, 0], "name": "STENCIL_ENABLE"},  array
9556     {"bits": [1, 1], "name": "Z_ENABLE"},  array
9557     {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},  array
9558     {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},  array
9559     {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},  array
9560     {"bits": [7, 7], "name": "BACKFACE_ENABLE"},  array
9561     {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},  array
9562     {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},  array
9563     {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},  array
9564     {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}  array
9569     {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},  array
9570     {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},  array
9571     {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},  array
9572     {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},  array
9573     {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},  array
9574     {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},  array
9575     {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}  array
9580     {"bits": [0, 10], "name": "PITCH_TILE_MAX"},  array
9581     {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}  array
9586     {"bits": [0, 21], "name": "SLICE_TILE_MAX"}  array
9591     {"bits": [0, 10], "name": "SLICE_START"},  array
9592     {"bits": [13, 23], "name": "SLICE_MAX"},  array
9593     {"bits": [24, 24], "name": "Z_READ_ONLY"},  array
9594     {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}  array
9599     {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},  array
9600     {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},  array
9601     {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},  array
9602     {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},  array
9603     {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},  array
9604     {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},  array
9605     {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},  array
9606     {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},  array
9607     {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},  array
9608     {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},  array
9609     {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},  array
9610     {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}  array
9615     {"bits": [0, 0], "name": "LINEAR"},  array
9616     {"bits": [1, 1], "name": "FULL_CACHE"},  array
9617     {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},  array
9618     {"bits": [3, 3], "name": "PRELOAD"},  array
9619     {"bits": [4, 9], "name": "PREFETCH_WIDTH"},  array
9620     {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},  array
9621     {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}  array
9626     {"bits": [0, 7], "name": "START_X"},  array
9627     {"bits": [8, 15], "name": "START_Y"},  array
9628     {"bits": [16, 23], "name": "MAX_X"},  array
9629     {"bits": [24, 31], "name": "MAX_Y"}  array
9634     {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},  array
9635     {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},  array
9636     {"bits": [2, 2], "name": "DEPTH_COPY"},  array
9637     {"bits": [3, 3], "name": "STENCIL_COPY"},  array
9638     {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},  array
9639     {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},  array
9640     {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},  array
9641     {"bits": [7, 7], "name": "COPY_CENTROID"},  array
9642     {"bits": [8, 11], "name": "COPY_SAMPLE"}  array
9647     {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},  array
9648     {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},  array
9649     {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},  array
9650     {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},  array
9651     {"bits": [7, 7], "name": "FAST_Z_DISABLE"},  array
9652     {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},  array
9653     {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},  array
9654     {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},  array
9655     {"bits": [11, 11], "name": "FORCE_Z_READ"},  array
9656     {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},  array
9657     {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},  array
9658     {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},  array
9659     {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},  array
9660     {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},  array
9661     {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},  array
9662     {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},  array
9663     {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},  array
9664     {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},  array
9665     {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},  array
9666     {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},  array
9667     {"bits": [29, 29], "name": "FORCE_Z_VALID"},  array
9668     {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},  array
9669     {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}  array
9674     {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},  array
9675     {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},  array
9676     {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},  array
9677     {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},  array
9678     {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},  array
9679     {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},  array
9680     {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},  array
9681     {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},  array
9682     {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},  array
9683     {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},  array
9684     {"bits": [15, 17], "name": "HIS_SFUNC_FF"},  array
9685     {"bits": [18, 20], "name": "HIS_SFUNC_BF"},  array
9686     {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},  array
9687     {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},  array
9688     {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}  array
9693     {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},  array
9694     {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},  array
9695     {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},  array
9696     {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},  array
9697     {"bits": [6, 6], "name": "KILL_ENABLE"},  array
9698     {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},  array
9699     {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},  array
9700     {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},  array
9701     {"bits": [10, 10], "name": "EXEC_ON_NOOP"},  array
9702     {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},  array
9703     {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},  array
9704     {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}  array
9709     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},  array
9710     {"bits": [4, 11], "name": "COMPAREVALUE0"},  array
9711     {"bits": [12, 19], "name": "COMPAREMASK0"},  array
9712     {"bits": [24, 24], "name": "ENABLE0"}  array
9717     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},  array
9718     {"bits": [4, 11], "name": "COMPAREVALUE1"},  array
9719     {"bits": [12, 19], "name": "COMPAREMASK1"},  array
9720     {"bits": [24, 24], "name": "ENABLE1"}  array
9725     {"bits": [0, 7], "name": "STENCILTESTVAL"},  array
9726     {"bits": [8, 15], "name": "STENCILMASK"},  array
9727     {"bits": [16, 23], "name": "STENCILWRITEMASK"},  array
9728     {"bits": [24, 31], "name": "STENCILOPVAL"}  array
9733     {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},  array
9734     {"bits": [8, 15], "name": "STENCILMASK_BF"},  array
9735     {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},  array
9736     {"bits": [24, 31], "name": "STENCILOPVAL_BF"}  array
9741     {"bits": [0, 7], "name": "CLEAR"}  array
9746     {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},  array
9747     {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},  array
9748     {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},  array
9749     {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},  array
9750     {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},  array
9751     {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}  array
9756     {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},  array
9757     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},  array
9758     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},  array
9759     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},  array
9760     {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"}  array
9765     {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},  array
9766     {"bits": [2, 3], "name": "NUM_SAMPLES"},  array
9767     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},  array
9768     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},  array
9769     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},  array
9770     {"bits": [28, 28], "name": "READ_SIZE"},  array
9771     {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},  array
9772     {"bits": [31, 31], "name": "ZRANGE_PRECISION"}  array
9777     {"bits": [0, 31], "name": "DEBUG_DATA"}  array
9782     {"bits": [0, 17], "name": "DEBUG_INDEX"}  array
9787     {"bits": [0, 2], "name": "NUM_PIPES"},  array
9788     {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},  array
9789     {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},  array
9790     {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},  array
9791     {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},  array
9792     {"bits": [20, 22], "name": "NUM_GPUS"},  array
9793     {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},  array
9794     {"bits": [28, 29], "name": "ROW_SIZE"},  array
9795     {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}  array
9800     {"bits": [0, 1], "enum_ref": "GB_TILE_MODE0__MICRO_TILE_MODE", "name": "MICRO_TILE_MODE"},  array
9801     {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},  array
9802     {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},  array
9803     {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},  array
9804     {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},  array
9805     {"bits": [25, 26], "name": "SAMPLE_SPLIT"}  array
9810     {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},  array
9811     {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},  array
9812     {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},  array
9813     {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},  array
9814     {"bits": [25, 26], "name": "SAMPLE_SPLIT"}  array
9819     {"bits": [0, 7], "name": "READ_TIMEOUT"}  array
9824     {"bits": [1, 1], "name": "IGNORE_RDY"},  array
9825     {"bits": [5, 5], "name": "IGNORE_FAO"},  array
9826     {"bits": [6, 6], "name": "DISABLE_READ_TIMEOUT"},  array
9827     {"bits": [7, 7], "name": "SNAPSHOT_FREE_CNTRS"},  array
9828     {"bits": [8, 11], "name": "HYSTERESIS_GUI_ACTIVE"},  array
9829     {"bits": [12, 12], "name": "GFX_CLOCK_DOMAIN_OVERRIDE"}  array
9834     {"bits": [0, 5], "name": "GRBM_DEBUG_INDEX"}  array
9839     {"bits": [0, 0], "name": "CPF_RDY"},  array
9840     {"bits": [1, 1], "name": "CPG_RDY"},  array
9841     {"bits": [1, 1], "name": "SRBM_RDY"},  array
9842     {"bits": [3, 3], "name": "WD_ME0PIPE0_RDY"},  array
9843     {"bits": [4, 4], "name": "WD_ME0PIPE1_RDY"},  array
9844     {"bits": [6, 6], "name": "SE0SPI_ME0PIPE0_RDY0"},  array
9845     {"bits": [7, 7], "name": "SE0SPI_ME0PIPE1_RDY0"},  array
9846     {"bits": [8, 8], "name": "SE1SPI_ME0PIPE0_RDY0"},  array
9847     {"bits": [9, 9], "name": "GDS_RDY"},  array
9848     {"bits": [9, 9], "name": "SE1SPI_ME0PIPE1_RDY0"},  array
9849     {"bits": [10, 10], "name": "SE2SPI_ME0PIPE0_RDY0"},  array
9850     {"bits": [11, 11], "name": "SE2SPI_ME0PIPE1_RDY0"},  array
9851     {"bits": [12, 12], "name": "SE3SPI_ME0PIPE0_RDY0"},  array
9852     {"bits": [13, 13], "name": "SE3SPI_ME0PIPE1_RDY0"},  array
9853     {"bits": [14, 14], "name": "SE0SPI_ME0PIPE0_RDY1"},  array
9854     {"bits": [15, 15], "name": "SE0SPI_ME0PIPE1_RDY1"},  array
9855     {"bits": [16, 16], "name": "SE1SPI_ME0PIPE0_RDY1"},  array
9856     {"bits": [17, 17], "name": "SE1SPI_ME0PIPE1_RDY1"},  array
9857     {"bits": [18, 18], "name": "SE2SPI_ME0PIPE0_RDY1"},  array
9858     {"bits": [19, 19], "name": "SE2SPI_ME0PIPE1_RDY1"},  array
9859     {"bits": [20, 20], "name": "SE3SPI_ME0PIPE0_RDY1"},  array
9860     {"bits": [21, 21], "name": "SE3SPI_ME0PIPE1_RDY1"}  array
9865     {"bits": [0, 3], "name": "PREFIX_DELAY_CNT"},  array
9866     {"bits": [8, 12], "name": "POST_DELAY_CNT"}  array
9871     {"bits": [0, 7], "name": "INSTANCE_INDEX"},  array
9872     {"bits": [8, 15], "name": "SH_INDEX"},  array
9873     {"bits": [16, 23], "name": "SE_INDEX"},  array
9874     {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},  array
9875     {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},  array
9876     {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}  array
9881     {"bits": [0, 0], "name": "RDERR_INT_ENABLE"},  array
9882     {"bits": [19, 19], "name": "GUI_IDLE_INT_ENABLE"}  array
9887     {"bits": [0, 31], "name": "PERFCOUNTER_HI"}  array
9892     {"bits": [0, 31], "name": "PERFCOUNTER_LO"}  array
9897     {"bits": [0, 5], "name": "PERF_SEL"},  array
9898     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},  array
9899     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},  array
9900     {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},  array
9901     {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},  array
9902     {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},  array
9903     {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},  array
9904     {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},  array
9905     {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},  array
9906     {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},  array
9907     {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},  array
9908     {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},  array
9909     {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},  array
9910     {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},  array
9911     {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},  array
9912     {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},  array
9913     {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},  array
9914     {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},  array
9915     {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}  array
9920     {"bits": [0, 3], "name": "REQ_TYPE"},  array
9921     {"bits": [4, 7], "name": "RSP_TYPE"}  array
9926     {"bits": [2, 17], "name": "READ_ADDRESS"},  array
9927     {"bits": [20, 21], "name": "READ_PIPEID"},  array
9928     {"bits": [22, 23], "name": "READ_MEID"},  array
9929     {"bits": [31, 31], "name": "READ_ERROR"}  array
9934     {"bits": [0, 31], "name": "SCRATCH_REG0"}  array
9939     {"bits": [0, 31], "name": "SCRATCH_REG1"}  array
9944     {"bits": [0, 31], "name": "SCRATCH_REG2"}  array
9949     {"bits": [0, 31], "name": "SCRATCH_REG3"}  array
9954     {"bits": [0, 31], "name": "SCRATCH_REG4"}  array
9959     {"bits": [0, 31], "name": "SCRATCH_REG5"}  array
9964     {"bits": [0, 31], "name": "SCRATCH_REG6"}  array
9969     {"bits": [0, 31], "name": "SCRATCH_REG7"}  array
9974     {"bits": [0, 5], "name": "PERF_SEL"},  array
9975     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},  array
9976     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},  array
9977     {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},  array
9978     {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},  array
9979     {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},  array
9980     {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},  array
9981     {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},  array
9982     {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},  array
9983     {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},  array
9984     {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},  array
9985     {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}  array
9990     {"bits": [0, 5], "name": "SKEW_TOP_THRESHOLD"},  array
9991     {"bits": [6, 11], "name": "SKEW_COUNT"}  array
9996     {"bits": [0, 0], "name": "SOFT_RESET_CP"},  array
9997     {"bits": [2, 2], "name": "SOFT_RESET_RLC"},  array
9998     {"bits": [16, 16], "name": "SOFT_RESET_GFX"},  array
9999     {"bits": [17, 17], "name": "SOFT_RESET_CPF"},  array
10000     {"bits": [18, 18], "name": "SOFT_RESET_CPC"},  array
10001     {"bits": [19, 19], "name": "SOFT_RESET_CPG"}  array
10006     {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},  array
10007     {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},  array
10008     {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},  array
10009     {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},  array
10010     {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},  array
10011     {"bits": [12, 12], "name": "DB_CLEAN"},  array
10012     {"bits": [13, 13], "name": "CB_CLEAN"},  array
10013     {"bits": [14, 14], "name": "TA_BUSY"},  array
10014     {"bits": [15, 15], "name": "GDS_BUSY"},  array
10015     {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},  array
10016     {"bits": [17, 17], "name": "VGT_BUSY"},  array
10017     {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},  array
10018     {"bits": [19, 19], "name": "IA_BUSY"},  array
10019     {"bits": [20, 20], "name": "SX_BUSY"},  array
10020     {"bits": [21, 21], "name": "WD_BUSY"},  array
10021     {"bits": [22, 22], "name": "SPI_BUSY"},  array
10022     {"bits": [23, 23], "name": "BCI_BUSY"},  array
10023     {"bits": [24, 24], "name": "SC_BUSY"},  array
10024     {"bits": [25, 25], "name": "PA_BUSY"},  array
10025     {"bits": [26, 26], "name": "DB_BUSY"},  array
10026     {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},  array
10027     {"bits": [29, 29], "name": "CP_BUSY"},  array
10028     {"bits": [30, 30], "name": "CB_BUSY"},  array
10029     {"bits": [31, 31], "name": "GUI_ACTIVE"}  array
10034     {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},  array
10035     {"bits": [0, 0], "name": "RLC_RQ_PENDING"},  array
10036     {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},  array
10037     {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},  array
10038     {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},  array
10039     {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},  array
10040     {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},  array
10041     {"bits": [8, 8], "name": "RLC_BUSY"},  array
10042     {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},  array
10043     {"bits": [9, 9], "name": "TC_BUSY"},  array
10044     {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},  array
10045     {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},  array
10046     {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},  array
10047     {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},  array
10048     {"bits": [28, 28], "name": "CPF_BUSY"},  array
10049     {"bits": [29, 29], "name": "CPC_BUSY"},  array
10050     {"bits": [30, 30], "name": "CPG_BUSY"}  array
10055     {"bits": [1, 1], "name": "DB_CLEAN"},  array
10056     {"bits": [2, 2], "name": "CB_CLEAN"},  array
10057     {"bits": [22, 22], "name": "BCI_BUSY"},  array
10058     {"bits": [23, 23], "name": "VGT_BUSY"},  array
10059     {"bits": [24, 24], "name": "PA_BUSY"},  array
10060     {"bits": [25, 25], "name": "TA_BUSY"},  array
10061     {"bits": [26, 26], "name": "SX_BUSY"},  array
10062     {"bits": [27, 27], "name": "SPI_BUSY"},  array
10063     {"bits": [29, 29], "name": "SC_BUSY"},  array
10064     {"bits": [30, 30], "name": "DB_BUSY"},  array
10065     {"bits": [31, 31], "name": "CB_BUSY"}  array
10070     {"bits": [0, 7], "name": "WAIT_IDLE_CLOCKS"}  array
10075     {"bits": [0, 0], "name": "IA_BUSY"},  array
10076     {"bits": [1, 1], "name": "IA_DMA_BUSY"},  array
10077     {"bits": [2, 2], "name": "IA_DMA_REQ_BUSY"},  array
10078     {"bits": [3, 3], "name": "IA_GRP_BUSY"},  array
10079     {"bits": [4, 4], "name": "IA_ADC_BUSY"}  array
10084     {"bits": [0, 5], "name": "IA_DEBUG_INDX"},  array
10085     {"bits": [6, 6], "name": "IA_DEBUG_SEL_BUS_B"}  array
10090     {"bits": [0, 31], "name": "MISC"}  array
10095     {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},  array
10096     {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},  array
10097     {"bits": [17, 17], "name": "SWITCH_ON_EOP"},  array
10098     {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},  array
10099     {"bits": [19, 19], "name": "SWITCH_ON_EOI"},  array
10100     {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}  array
10105     {"bits": [0, 7], "name": "PERF_SEL"},  array
10106     {"bits": [10, 19], "name": "PERF_SEL1"},  array
10107     {"bits": [20, 23], "name": "CNTR_MODE"},  array
10108     {"bits": [24, 27], "name": "PERF_MODE1"},  array
10109     {"bits": [28, 31], "name": "PERF_MODE"}  array
10114     {"bits": [0, 7], "name": "PERF_SEL"},  array
10115     {"bits": [28, 31], "name": "PERF_MODE"}  array
10120     {"bits": [0, 0], "name": "ENABLE"},  array
10121     {"bits": [1, 4], "name": "VMID"}  array
10126     {"bits": [0, 0], "name": "UCP_ENA_0"},  array
10127     {"bits": [1, 1], "name": "UCP_ENA_1"},  array
10128     {"bits": [2, 2], "name": "UCP_ENA_2"},  array
10129     {"bits": [3, 3], "name": "UCP_ENA_3"},  array
10130     {"bits": [4, 4], "name": "UCP_ENA_4"},  array
10131     {"bits": [5, 5], "name": "UCP_ENA_5"},  array
10132     {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},  array
10133     {"bits": [14, 15], "name": "PS_UCP_MODE"},  array
10134     {"bits": [16, 16], "name": "CLIP_DISABLE"},  array
10135     {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},  array
10136     {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},  array
10137     {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},  array
10138     {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},  array
10139     {"bits": [21, 21], "name": "VTX_KILL_OR"},  array
10140     {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},  array
10141     {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},  array
10142     {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},  array
10143     {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},  array
10144     {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}  array
10149     {"bits": [31, 31], "name": "CL_BUSY"}  array
10154     {"bits": [0, 0], "name": "CLIP_VTX_REORDER_ENA"},  array
10155     {"bits": [1, 2], "name": "NUM_CLIP_SEQ"},  array
10156     {"bits": [3, 3], "name": "CLIPPED_PRIM_SEQ_STALL"},  array
10157     {"bits": [4, 4], "name": "VE_NAN_PROC_DISABLE"},  array
10158     {"bits": [5, 5], "name": "XTRA_DEBUG_REG_SEL"},  array
10159     {"bits": [28, 28], "name": "ECO_SPARE3"},  array
10160     {"bits": [29, 29], "name": "ECO_SPARE2"},  array
10161     {"bits": [30, 30], "name": "ECO_SPARE1"},  array
10162     {"bits": [31, 31], "name": "ECO_SPARE0"}  array
10167     {"bits": [0, 31], "name": "DATA_REGISTER"}  array
10172     {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},  array
10173     {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},  array
10174     {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},  array
10175     {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},  array
10176     {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},  array
10177     {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},  array
10178     {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},  array
10179     {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},  array
10180     {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},  array
10181     {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},  array
10182     {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},  array
10183     {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},  array
10184     {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},  array
10185     {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},  array
10186     {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},  array
10187     {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}  array
10192     {"bits": [0, 31], "name": "VPORT_XOFFSET"}  array
10197     {"bits": [0, 31], "name": "VPORT_XSCALE"}  array
10202     {"bits": [0, 31], "name": "VPORT_YOFFSET"}  array
10207     {"bits": [0, 31], "name": "VPORT_YSCALE"}  array
10212     {"bits": [0, 31], "name": "VPORT_ZOFFSET"}  array
10217     {"bits": [0, 31], "name": "VPORT_ZSCALE"}  array
10222     {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},  array
10223     {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},  array
10224     {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},  array
10225     {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},  array
10226     {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},  array
10227     {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},  array
10228     {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},  array
10229     {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},  array
10230     {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},  array
10231     {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},  array
10232     {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},  array
10233     {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},  array
10234     {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},  array
10235     {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},  array
10236     {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},  array
10237     {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},  array
10238     {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},  array
10239     {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},  array
10240     {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},  array
10241     {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},  array
10242     {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},  array
10243     {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},  array
10244     {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},  array
10245     {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},  array
10246     {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},  array
10247     {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}  array
10252     {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},  array
10253     {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},  array
10254     {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},  array
10255     {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},  array
10256     {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},  array
10257     {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},  array
10258     {"bits": [8, 8], "name": "VTX_XY_FMT"},  array
10259     {"bits": [9, 9], "name": "VTX_Z_FMT"},  array
10260     {"bits": [10, 10], "name": "VTX_W0_FMT"},  array
10261     {"bits": [11, 11], "name": "PERFCOUNTER_REF"}  array
10266     {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},  array
10267     {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},  array
10268     {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},  array
10269     {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},  array
10270     {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}  array
10275     {"bits": [0, 15], "name": "AA_MASK_X0Y0"},  array
10276     {"bits": [16, 31], "name": "AA_MASK_X1Y0"}  array
10281     {"bits": [0, 15], "name": "AA_MASK_X0Y1"},  array
10282     {"bits": [16, 31], "name": "AA_MASK_X1Y1"}  array
10287     {"bits": [0, 3], "name": "S0_X"},  array
10288     {"bits": [4, 7], "name": "S0_Y"},  array
10289     {"bits": [8, 11], "name": "S1_X"},  array
10290     {"bits": [12, 15], "name": "S1_Y"},  array
10291     {"bits": [16, 19], "name": "S2_X"},  array
10292     {"bits": [20, 23], "name": "S2_Y"},  array
10293     {"bits": [24, 27], "name": "S3_X"},  array
10294     {"bits": [28, 31], "name": "S3_Y"}  array
10299     {"bits": [0, 3], "name": "S4_X"},  array
10300     {"bits": [4, 7], "name": "S4_Y"},  array
10301     {"bits": [8, 11], "name": "S5_X"},  array
10302     {"bits": [12, 15], "name": "S5_Y"},  array
10303     {"bits": [16, 19], "name": "S6_X"},  array
10304     {"bits": [20, 23], "name": "S6_Y"},  array
10305     {"bits": [24, 27], "name": "S7_X"},  array
10306     {"bits": [28, 31], "name": "S7_Y"}  array
10311     {"bits": [0, 3], "name": "S8_X"},  array
10312     {"bits": [4, 7], "name": "S8_Y"},  array
10313     {"bits": [8, 11], "name": "S9_X"},  array
10314     {"bits": [12, 15], "name": "S9_Y"},  array
10315     {"bits": [16, 19], "name": "S10_X"},  array
10316     {"bits": [20, 23], "name": "S10_Y"},  array
10317     {"bits": [24, 27], "name": "S11_X"},  array
10318     {"bits": [28, 31], "name": "S11_Y"}  array
10323     {"bits": [0, 3], "name": "S12_X"},  array
10324     {"bits": [4, 7], "name": "S12_Y"},  array
10325     {"bits": [8, 11], "name": "S13_X"},  array
10326     {"bits": [12, 15], "name": "S13_Y"},  array
10327     {"bits": [16, 19], "name": "S14_X"},  array
10328     {"bits": [20, 23], "name": "S14_Y"},  array
10329     {"bits": [24, 27], "name": "S15_X"},  array
10330     {"bits": [28, 31], "name": "S15_Y"}  array
10335     {"bits": [0, 3], "name": "DISTANCE_0"},  array
10336     {"bits": [4, 7], "name": "DISTANCE_1"},  array
10337     {"bits": [8, 11], "name": "DISTANCE_2"},  array
10338     {"bits": [12, 15], "name": "DISTANCE_3"},  array
10339     {"bits": [16, 19], "name": "DISTANCE_4"},  array
10340     {"bits": [20, 23], "name": "DISTANCE_5"},  array
10341     {"bits": [24, 27], "name": "DISTANCE_6"},  array
10342     {"bits": [28, 31], "name": "DISTANCE_7"}  array
10347     {"bits": [0, 3], "name": "DISTANCE_8"},  array
10348     {"bits": [4, 7], "name": "DISTANCE_9"},  array
10349     {"bits": [8, 11], "name": "DISTANCE_10"},  array
10350     {"bits": [12, 15], "name": "DISTANCE_11"},  array
10351     {"bits": [16, 19], "name": "DISTANCE_12"},  array
10352     {"bits": [20, 23], "name": "DISTANCE_13"},  array
10353     {"bits": [24, 27], "name": "DISTANCE_14"},  array
10354     {"bits": [28, 31], "name": "DISTANCE_15"}  array
10359     {"bits": [0, 14], "name": "BR_X"},  array
10360     {"bits": [16, 30], "name": "BR_Y"}  array
10365     {"bits": [0, 14], "name": "TL_X"},  array
10366     {"bits": [16, 30], "name": "TL_Y"}  array
10371     {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}  array
10376     {"bits": [0, 5], "name": "SC_DEBUG_INDX"}  array
10381     {"bits": [0, 3], "name": "ER_TRI"},  array
10382     {"bits": [4, 7], "name": "ER_POINT"},  array
10383     {"bits": [8, 11], "name": "ER_RECT"},  array
10384     {"bits": [12, 17], "name": "ER_LINE_LR"},  array
10385     {"bits": [18, 23], "name": "ER_LINE_RL"},  array
10386     {"bits": [24, 27], "name": "ER_LINE_TB"},  array
10387     {"bits": [28, 31], "name": "ER_LINE_BT"}  array
10392     {"bits": [0, 0], "name": "ENABLE_PA_SC_OUT_OF_ORDER"},  array
10393     {"bits": [1, 1], "name": "DISABLE_SC_DB_TILE_FIX"},  array
10394     {"bits": [2, 2], "name": "DISABLE_AA_MASK_FULL_FIX"},  array
10395     {"bits": [3, 3], "name": "ENABLE_1XMSAA_SAMPLE_LOCATIONS"},  array
10396     {"bits": [4, 4], "name": "ENABLE_1XMSAA_SAMPLE_LOC_CENTROID"},  array
10397     {"bits": [5, 5], "name": "DISABLE_SCISSOR_FIX"},  array
10398     {"bits": [6, 7], "name": "DISABLE_PW_BUBBLE_COLLAPSE"},  array
10399     {"bits": [8, 8], "name": "SEND_UNLIT_STILES_TO_PACKER"},  array
10400     {"bits": [9, 9], "name": "DISABLE_DUALGRAD_PERF_OPTIMIZATION"},  array
10401     {"bits": [10, 10], "name": "DISABLE_SC_PROCESS_RESET_PRIM"},  array
10402     {"bits": [11, 11], "name": "DISABLE_SC_PROCESS_RESET_SUPERTILE"},  array
10403     {"bits": [12, 12], "name": "DISABLE_SC_PROCESS_RESET_TILE"},  array
10404     {"bits": [13, 13], "name": "DISABLE_PA_SC_GUIDANCE"},  array
10405     {"bits": [14, 14], "name": "DISABLE_EOV_ALL_CTRL_ONLY_COMBINATIONS"},  array
10406     {"bits": [15, 15], "name": "ENABLE_MULTICYCLE_BUBBLE_FREEZE"},  array
10407     {"bits": [16, 16], "name": "DISABLE_OUT_OF_ORDER_PA_SC_GUIDANCE"},  array
10408     {"bits": [17, 17], "name": "ENABLE_OUT_OF_ORDER_POLY_MODE"},  array
10409     {"bits": [18, 18], "name": "DISABLE_OUT_OF_ORDER_EOP_SYNC_NULL_PRIMS_LAST"},  array
10410     {"bits": [19, 19], "name": "DISABLE_OUT_OF_ORDER_THRESHOLD_SWITCHING"},  array
10411     {"bits": [20, 20], "name": "ENABLE_OUT_OF_ORDER_THRESHOLD_SWITCH_AT_EOPG_ONLY"},  array
10412     {"bits": [21, 21], "name": "DISABLE_OUT_OF_ORDER_DESIRED_FIFO_EMPTY_SWITCHING"},  array
10413     {"bits": [22, 22], "name": "DISABLE_OUT_OF_ORDER_SELECTED_FIFO_EMPTY_SWITCHING"},  array
10414     {"bits": [23, 23], "name": "DISABLE_OUT_OF_ORDER_EMPTY_SWITCHING_HYSTERYSIS"},  array
10415     {"bits": [24, 24], "name": "ENABLE_OUT_OF_ORDER_DESIRED_FIFO_IS_NEXT_FEID"},  array
10416     {"bits": [30, 30], "name": "ECO_SPARE1"},  array
10417     {"bits": [31, 31], "name": "ECO_SPARE0"}  array
10422     {"bits": [0, 7], "name": "DEPTH"}  array
10427     {"bits": [0, 5], "name": "SC_FRONTEND_PRIM_FIFO_SIZE"},  array
10428     {"bits": [6, 14], "name": "SC_BACKEND_PRIM_FIFO_SIZE"},  array
10429     {"bits": [15, 20], "name": "SC_HIZ_TILE_FIFO_SIZE"},  array
10430     {"bits": [23, 31], "name": "SC_EARLYZ_TILE_FIFO_SIZE"}  array
10435     {"bits": [0, 15], "name": "FORCE_EOV_MAX_CLK_CNT"},  array
10436     {"bits": [16, 31], "name": "FORCE_EOV_MAX_REZ_CNT"}  array
10441     {"bits": [0, 14], "name": "TL_X"},  array
10442     {"bits": [16, 30], "name": "TL_Y"},  array
10443     {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}  array
10448     {"bits": [0, 5], "name": "SC_DB_TILE_IF_FIFO_SIZE"},  array
10449     {"bits": [6, 11], "name": "SC_DB_QUAD_IF_FIFO_SIZE"},  array
10450     {"bits": [12, 17], "name": "SC_SPI_IF_FIFO_SIZE"},  array
10451     {"bits": [18, 23], "name": "SC_BCI_IF_FIFO_SIZE"}  array
10456     {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},  array
10457     {"bits": [10, 10], "name": "LAST_PIXEL"},  array
10458     {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},  array
10459     {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}  array
10464     {"bits": [0, 15], "name": "LINE_PATTERN"},  array
10465     {"bits": [16, 23], "name": "REPEAT_COUNT"},  array
10466     {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},  array
10467     {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}  array
10472     {"bits": [0, 3], "name": "CURRENT_PTR"},  array
10473     {"bits": [8, 15], "name": "CURRENT_COUNT"}  array
10478     {"bits": [0, 0], "name": "MSAA_ENABLE"},  array
10479     {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},  array
10480     {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},  array
10481     {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}  array
10486     {"bits": [0, 0], "name": "WALK_SIZE"},  array
10487     {"bits": [1, 1], "name": "WALK_ALIGNMENT"},  array
10488     {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},  array
10489     {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},  array
10490     {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},  array
10491     {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},  array
10492     {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},  array
10493     {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},  array
10494     {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},  array
10495     {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},  array
10496     {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},  array
10497     {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},  array
10498     {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},  array
10499     {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},  array
10500     {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},  array
10501     {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},  array
10502     {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},  array
10503     {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},  array
10504     {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},  array
10505     {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},  array
10506     {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},  array
10507     {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},  array
10508     {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},  array
10509     {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}  array
10514     {"bits": [0, 8], "name": "PERF_SEL"},  array
10515     {"bits": [10, 19], "name": "PERF_SEL1"},  array
10516     {"bits": [20, 23], "name": "CNTR_MODE"}  array
10521     {"bits": [0, 8], "name": "PERF_SEL"}  array
10526     {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},  array
10527     {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},  array
10528     {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},  array
10529     {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},  array
10530     {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},  array
10531     {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},  array
10532     {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},  array
10533     {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},  array
10534     {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},  array
10535     {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},  array
10536     {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},  array
10537     {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},  array
10538     {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},  array
10539     {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},  array
10540     {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}  array
10545     {"bits": [0, 15], "name": "BR_X"},  array
10546     {"bits": [16, 31], "name": "BR_Y"}  array
10551     {"bits": [0, 15], "name": "TL_X"},  array
10552     {"bits": [16, 31], "name": "TL_Y"}  array
10557     {"bits": [0, 31], "name": "VPORT_ZMAX"}  array
10562     {"bits": [0, 31], "name": "VPORT_ZMIN"}  array
10567     {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},  array
10568     {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}  array
10573     {"bits": [31, 31], "name": "SU_BUSY"}  array
10578     {"bits": [0, 4], "name": "SU_DEBUG_INDX"}  array
10583     {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},  array
10584     {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}  array
10589     {"bits": [0, 15], "name": "WIDTH"}  array
10594     {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},  array
10595     {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},  array
10596     {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},  array
10597     {"bits": [4, 4], "name": "DIAMOND_ADJUST"}  array
10602     {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"}  array
10607     {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}  array
10612     {"bits": [0, 15], "name": "PERFCOUNTER_HI"}  array
10617     {"bits": [0, 7], "name": "PERF_SEL"},  array
10618     {"bits": [10, 19], "name": "PERF_SEL1"},  array
10619     {"bits": [20, 23], "name": "CNTR_MODE"}  array
10624     {"bits": [0, 7], "name": "PERF_SEL"},  array
10625     {"bits": [20, 23], "name": "CNTR_MODE"}  array
10630     {"bits": [0, 15], "name": "MIN_SIZE"},  array
10631     {"bits": [16, 31], "name": "MAX_SIZE"}  array
10636     {"bits": [0, 15], "name": "HEIGHT"},  array
10637     {"bits": [16, 31], "name": "WIDTH"}  array
10642     {"bits": [0, 31], "name": "OFFSET"}  array
10647     {"bits": [0, 31], "name": "SCALE"}  array
10652     {"bits": [0, 31], "name": "CLAMP"}  array
10657     {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},  array
10658     {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}  array
10663     {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},  array
10664     {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},  array
10665     {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},  array
10666     {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},  array
10667     {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},  array
10668     {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},  array
10669     {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},  array
10670     {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},  array
10671     {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},  array
10672     {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},  array
10673     {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}  array
10678     {"bits": [0, 0], "name": "CULL_FRONT"},  array
10679     {"bits": [1, 1], "name": "CULL_BACK"},  array
10680     {"bits": [2, 2], "name": "FACE"},  array
10681     {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},  array
10682 …{"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_P…  array
10683 …{"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_P…  array
10684     {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},  array
10685     {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},  array
10686     {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},  array
10687     {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},  array
10688     {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},  array
10689     {"bits": [20, 20], "name": "PERSP_CORR_DIS"},  array
10690     {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}  array
10695     {"bits": [0, 0], "name": "PIX_CENTER"},  array
10696     {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},  array
10697     {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}  array
10702     {"bits": [0, 31], "name": "OBSOLETE_ADDR"}  array
10707     {"bits": [0, 7], "name": "OBSOLETE_UMSK"},  array
10708     {"bits": [16, 17], "name": "OBSOLETE_SWAP"}  array
10713     {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},  array
10714     {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},  array
10715     {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},  array
10716     {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},  array
10717     {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},  array
10718     {"bits": [20, 20], "name": "POS_FLOAT_ULC"},  array
10719     {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}  array
10724     {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},  array
10725     {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},  array
10726     {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},  array
10727     {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},  array
10728     {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},  array
10729     {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}  array
10734     {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},  array
10735     {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},  array
10736     {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},  array
10737     {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},  array
10738     {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},  array
10739     {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},  array
10740     {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}  array
10745     {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},  array
10746     {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},  array
10747     {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},  array
10748     {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},  array
10749     {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},  array
10750     {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},  array
10751     {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},  array
10752     {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},  array
10753     {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},  array
10754     {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},  array
10755     {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},  array
10756     {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},  array
10757     {"bits": [12, 12], "name": "FRONT_FACE_ENA"},  array
10758     {"bits": [13, 13], "name": "ANCILLARY_ENA"},  array
10759     {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},  array
10760     {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}  array
10765     {"bits": [0, 5], "name": "OFFSET"},  array
10766     {"bits": [8, 9], "name": "DEFAULT_VAL"},  array
10767     {"bits": [10, 10], "name": "FLAT_SHADE"},  array
10768     {"bits": [13, 16], "name": "CYL_WRAP"},  array
10769     {"bits": [17, 17], "name": "PT_SPRITE_TEX"},  array
10770     {"bits": [18, 18], "name": "DUP"}  array
10775     {"bits": [0, 5], "name": "OFFSET"},  array
10776     {"bits": [8, 9], "name": "DEFAULT_VAL"},  array
10777     {"bits": [10, 10], "name": "FLAT_SHADE"},  array
10778     {"bits": [18, 18], "name": "DUP"}  array
10783     {"bits": [0, 5], "name": "NUM_INTERP"},  array
10784     {"bits": [6, 6], "name": "PARAM_GEN"},  array
10785     {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}  array
10790     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},  array
10791     {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},  array
10792     {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},  array
10793     {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},  array
10794     {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},  array
10795     {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},  array
10796     {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},  array
10797     {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}  array
10802     {"bits": [0, 7], "name": "MEM_BASE"}  array
10807     {"bits": [0, 31], "name": "MEM_BASE"}  array
10812     {"bits": [0, 5], "name": "VGPRS"},  array
10813     {"bits": [6, 9], "name": "SGPRS"},  array
10814     {"bits": [10, 11], "name": "PRIORITY"},  array
10815     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
10816     {"bits": [20, 20], "name": "PRIV"},  array
10817     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
10818     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
10819     {"bits": [23, 23], "name": "IEEE_MODE"},  array
10820     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},  array
10821     {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},  array
10822     {"bits": [27, 29], "name": "CACHE_CTL"},  array
10823     {"bits": [30, 30], "name": "CDBG_USER"}  array
10828     {"bits": [0, 5], "name": "VGPRS"},  array
10829     {"bits": [6, 9], "name": "SGPRS"},  array
10830     {"bits": [10, 11], "name": "PRIORITY"},  array
10831     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
10832     {"bits": [20, 20], "name": "PRIV"},  array
10833     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
10834     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
10835     {"bits": [23, 23], "name": "IEEE_MODE"},  array
10836     {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},  array
10837     {"bits": [25, 27], "name": "CACHE_CTL"},  array
10838     {"bits": [28, 28], "name": "CDBG_USER"}  array
10843     {"bits": [0, 5], "name": "VGPRS"},  array
10844     {"bits": [6, 9], "name": "SGPRS"},  array
10845     {"bits": [10, 11], "name": "PRIORITY"},  array
10846     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
10847     {"bits": [20, 20], "name": "PRIV"},  array
10848     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
10849     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
10850     {"bits": [23, 23], "name": "IEEE_MODE"},  array
10851     {"bits": [24, 26], "name": "CACHE_CTL"},  array
10852     {"bits": [27, 27], "name": "CDBG_USER"}  array
10857     {"bits": [0, 5], "name": "VGPRS"},  array
10858     {"bits": [6, 9], "name": "SGPRS"},  array
10859     {"bits": [10, 11], "name": "PRIORITY"},  array
10860     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
10861     {"bits": [20, 20], "name": "PRIV"},  array
10862     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
10863     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
10864     {"bits": [23, 23], "name": "IEEE_MODE"},  array
10865     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},  array
10866     {"bits": [26, 28], "name": "CACHE_CTL"},  array
10867     {"bits": [29, 29], "name": "CDBG_USER"}  array
10872     {"bits": [0, 5], "name": "VGPRS"},  array
10873     {"bits": [6, 9], "name": "SGPRS"},  array
10874     {"bits": [10, 11], "name": "PRIORITY"},  array
10875     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},  array
10876     {"bits": [20, 20], "name": "PRIV"},  array
10877     {"bits": [21, 21], "name": "DX10_CLAMP"},  array
10878     {"bits": [22, 22], "name": "DEBUG_MODE"},  array
10879     {"bits": [23, 23], "name": "IEEE_MODE"},  array
10880     {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},  array
10881     {"bits": [25, 27], "name": "CACHE_CTL"},  array
10882     {"bits": [28, 28], "name": "CDBG_USER"}  array
10887     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10888     {"bits": [1, 5], "name": "USER_SGPR"},  array
10889     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10890     {"bits": [7, 7], "name": "OC_LDS_EN"},  array
10891     {"bits": [8, 14], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},  array
10892     {"bits": [20, 28], "name": "LDS_SIZE"}  array
10897     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10898     {"bits": [1, 5], "name": "USER_SGPR"},  array
10899     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10900     {"bits": [7, 13], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
10905     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10906     {"bits": [1, 5], "name": "USER_SGPR"},  array
10907     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10908     {"bits": [7, 7], "name": "OC_LDS_EN"},  array
10909     {"bits": [8, 8], "name": "TG_SIZE_EN"},  array
10910     {"bits": [9, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
10915     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10916     {"bits": [1, 5], "name": "USER_SGPR"},  array
10917     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10918     {"bits": [7, 15], "name": "LDS_SIZE"},  array
10919     {"bits": [16, 22], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
10924     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10925     {"bits": [1, 5], "name": "USER_SGPR"},  array
10926     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10927     {"bits": [7, 7], "name": "WAVE_CNT_EN"},  array
10928     {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},  array
10929     {"bits": [16, 22], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
10934     {"bits": [0, 0], "name": "SCRATCH_EN"},  array
10935     {"bits": [1, 5], "name": "USER_SGPR"},  array
10936     {"bits": [6, 6], "name": "TRAP_PRESENT"},  array
10937     {"bits": [7, 7], "name": "OC_LDS_EN"},  array
10938     {"bits": [8, 8], "name": "SO_BASE0_EN"},  array
10939     {"bits": [9, 9], "name": "SO_BASE1_EN"},  array
10940     {"bits": [10, 10], "name": "SO_BASE2_EN"},  array
10941     {"bits": [11, 11], "name": "SO_BASE3_EN"},  array
10942     {"bits": [12, 12], "name": "SO_EN"},  array
10943     {"bits": [13, 19], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}  array
10948     {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},  array
10949     {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},  array
10950     {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},  array
10951     {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}  array
10956     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}  array
10961     {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},  array
10962     {"bits": [6, 6], "name": "VS_HALF_PACK"}  array
10967     {"bits": [0, 0], "name": "INST_INVALIDATE"},  array
10968     {"bits": [1, 1], "name": "DATA_INVALIDATE"},  array
10969     {"bits": [2, 2], "name": "INVALIDATE_VOLATILE"}  array
10974     {"bits": [0, 1], "name": "INST_CACHE_SIZE"},  array
10975     {"bits": [2, 3], "name": "DATA_CACHE_SIZE"},  array
10976     {"bits": [4, 5], "name": "MISS_FIFO_DEPTH"},  array
10977     {"bits": [6, 6], "name": "HIT_FIFO_DEPTH"},  array
10978     {"bits": [7, 7], "name": "FORCE_ALWAYS_MISS"},  array
10979     {"bits": [8, 8], "name": "FORCE_IN_ORDER"},  array
10980     {"bits": [9, 9], "name": "IDENTITY_HASH_BANK"},  array
10981     {"bits": [10, 10], "name": "IDENTITY_HASH_SET"},  array
10982     {"bits": [11, 11], "name": "PER_VMID_INV_DISABLE"}  array
10987     {"bits": [0, 7], "name": "INST_SEC"},  array
10988     {"bits": [8, 15], "name": "INST_DED"},  array
10989     {"bits": [16, 23], "name": "DATA_SEC"},  array
10990     {"bits": [24, 31], "name": "DATA_DED"}  array
10995     {"bits": [0, 15], "name": "FORCE_CU_ON_SH0"},  array
10996     {"bits": [16, 31], "name": "FORCE_CU_ON_SH1"}  array
11001     {"bits": [0, 31], "name": "BASE_ADDRESS"}  array
11006     {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},  array
11007     {"bits": [16, 29], "name": "STRIDE"},  array
11008     {"bits": [30, 30], "name": "CACHE_SWIZZLE"},  array
11009     {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}  array
11014     {"bits": [0, 31], "name": "NUM_RECORDS"}  array
11019     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},  array
11020     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},  array
11021     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},  array
11022     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},  array
11023     {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},  array
11024     {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},  array
11025     {"bits": [19, 20], "name": "ELEMENT_SIZE"},  array
11026     {"bits": [21, 22], "name": "INDEX_STRIDE"},  array
11027     {"bits": [23, 23], "name": "ADD_TID_ENABLE"},  array
11028     {"bits": [24, 24], "name": "ATC"},  array
11029     {"bits": [25, 25], "name": "HASH_ENABLE"},  array
11030     {"bits": [26, 26], "name": "HEAP"},  array
11031     {"bits": [27, 29], "name": "MTYPE"},  array
11032     {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}  array
11037     {"bits": [0, 7], "name": "UNUSED"},  array
11038     {"bits": [8, 8], "name": "DEBUG_EN"},  array
11039     {"bits": [9, 9], "name": "DISABLE_SCA_BYPASS"},  array
11040     {"bits": [10, 10], "name": "DISABLE_IB_DEP_CHECK"},  array
11041     {"bits": [11, 11], "name": "ENABLE_SOFT_CLAUSE"},  array
11042     {"bits": [12, 12], "name": "EARLY_TA_DONE_DISABLE"},  array
11043     {"bits": [13, 13], "name": "DUA_FLAT_LOCK_ENABLE"},  array
11044     {"bits": [14, 14], "name": "DUA_LDS_BYPASS_DISABLE"},  array
11045     {"bits": [15, 15], "name": "DUA_FLAT_LDS_PINGPONG_DISABLE"}  array
11050     {"bits": [0, 0], "name": "BUSY"},  array
11051     {"bits": [1, 1], "name": "INTERRUPT_MSG_BUSY"},  array
11052     {"bits": [4, 15], "name": "WAVE_LEVEL_SH0"},  array
11053     {"bits": [16, 27], "name": "WAVE_LEVEL_SH1"}  array
11058     {"bits": [0, 5], "name": "LDS_DED"},  array
11059     {"bits": [8, 12], "name": "SGPR_DED"},  array
11060     {"bits": [16, 24], "name": "VGPR_DED"}  array
11065     {"bits": [0, 3], "name": "WAVE_ID"},  array
11066     {"bits": [4, 5], "name": "SIMD_ID"},  array
11067     {"bits": [6, 8], "name": "SOURCE"},  array
11068     {"bits": [9, 12], "name": "VM_ID"}  array
11073     {"bits": [0, 3], "name": "INTERRUPT_FIFO_SIZE"},  array
11074     {"bits": [8, 11], "name": "TTRACE_FIFO_SIZE"},  array
11075     {"bits": [16, 17], "name": "EXPORT_BUF_SIZE"},  array
11076     {"bits": [18, 19], "name": "VMEM_DATA_FIFO_SIZE"}  array
11081     {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},  array
11082     {"bits": [8, 19], "name": "MIN_LOD"},  array
11083     {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},  array
11084     {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},  array
11085     {"bits": [30, 31], "name": "MTYPE"}  array
11090     {"bits": [0, 13], "name": "WIDTH"},  array
11091     {"bits": [14, 27], "name": "HEIGHT"},  array
11092     {"bits": [28, 30], "name": "PERF_MOD"},  array
11093     {"bits": [31, 31], "name": "INTERLACED"}  array
11098     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},  array
11099     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},  array
11100     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},  array
11101     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},  array
11102     {"bits": [12, 15], "name": "BASE_LEVEL"},  array
11103     {"bits": [16, 19], "name": "LAST_LEVEL"},  array
11104     {"bits": [20, 24], "name": "TILING_INDEX"},  array
11105     {"bits": [25, 25], "name": "POW2_PAD"},  array
11106     {"bits": [26, 26], "name": "MTYPE"},  array
11107     {"bits": [27, 27], "name": "ATC"},  array
11108     {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}  array
11113     {"bits": [0, 12], "name": "DEPTH"},  array
11114     {"bits": [13, 26], "name": "PITCH"}  array
11119     {"bits": [0, 12], "name": "BASE_ARRAY"},  array
11120     {"bits": [13, 25], "name": "LAST_ARRAY"}  array
11125     {"bits": [0, 11], "name": "MIN_LOD_WARN"},  array
11126     {"bits": [12, 19], "name": "COUNTER_BANK_ID"},  array
11127     {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},  array
11128     {"bits": [21, 31], "name": "UNUNSED"}  array
11133     {"bits": [0, 31], "name": "UNUNSED"}  array
11138     {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},  array
11139     {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},  array
11140     {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},  array
11141     {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},  array
11142     {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},  array
11143     {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},  array
11144     {"bits": [16, 18], "name": "ANISO_THRESHOLD"},  array
11145     {"bits": [19, 19], "name": "MC_COORD_TRUNC"},  array
11146     {"bits": [20, 20], "name": "FORCE_DEGAMMA"},  array
11147     {"bits": [21, 26], "name": "ANISO_BIAS"},  array
11148     {"bits": [27, 27], "name": "TRUNC_COORD"},  array
11149     {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},  array
11150     {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"}  array
11155     {"bits": [0, 11], "name": "MIN_LOD"},  array
11156     {"bits": [12, 23], "name": "MAX_LOD"},  array
11157     {"bits": [24, 27], "name": "PERF_MIP"},  array
11158     {"bits": [28, 31], "name": "PERF_Z"}  array
11163     {"bits": [0, 13], "name": "LOD_BIAS"},  array
11164     {"bits": [14, 19], "name": "LOD_BIAS_SEC"},  array
11165     {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},  array
11166     {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},  array
11167     {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},  array
11168     {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},  array
11169     {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},  array
11170     {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},  array
11171     {"bits": [30, 30], "name": "FILTER_PREC_FIX"}  array
11176     {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},  array
11177     {"bits": [29, 29], "name": "UPGRADED_DEPTH"},  array
11178     {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}  array
11183     {"bits": [0, 3], "name": "WAVE_ID"},  array
11184     {"bits": [4, 5], "name": "SIMD_ID"},  array
11185     {"bits": [6, 11], "name": "THREAD_ID"},  array
11186     {"bits": [12, 12], "name": "AUTO_INCR"},  array
11187     {"bits": [13, 13], "name": "FORCE_READ"},  array
11188     {"bits": [14, 14], "name": "READ_TIMEOUT"},  array
11189     {"bits": [15, 15], "name": "UNINDEXED"},  array
11190     {"bits": [16, 31], "name": "INDEX"}  array
11195     {"bits": [0, 0], "name": "THREAD_TRACE"},  array
11196     {"bits": [1, 1], "name": "WLT"},  array
11197     {"bits": [2, 2], "name": "THREAD_TRACE_BUF_FULL"},  array
11198     {"bits": [3, 3], "name": "REG_TIMESTAMP"},  array
11199     {"bits": [4, 4], "name": "CMD_TIMESTAMP"},  array
11200     {"bits": [5, 5], "name": "HOST_CMD_OVERFLOW"},  array
11201     {"bits": [6, 6], "name": "HOST_REG_OVERFLOW"},  array
11202     {"bits": [7, 7], "name": "IMMED_OVERFLOW"},  array
11203     {"bits": [25, 25], "name": "SE_ID"},  array
11204     {"bits": [26, 27], "name": "ENCODING"}  array
11209     {"bits": [0, 0], "name": "START"},  array
11210     {"bits": [1, 1], "name": "LOAD"},  array
11211     {"bits": [2, 2], "name": "CLEAR"}  array
11216     {"bits": [0, 8], "name": "PERF_SEL"},  array
11217     {"bits": [12, 15], "name": "SQC_BANK_MASK"},  array
11218     {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},  array
11219     {"bits": [20, 23], "name": "SPM_MODE"},  array
11220     {"bits": [24, 27], "name": "SIMD_MASK"},  array
11221     {"bits": [28, 31], "name": "PERF_MODE"}  array
11226     {"bits": [0, 0], "name": "PS_EN"},  array
11227     {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},  array
11228     {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},  array
11229     {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},  array
11230     {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},  array
11231     {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},  array
11232     {"bits": [6, 6], "name": "CS_EN"},  array
11233     {"bits": [8, 12], "name": "CNTR_RATE"},  array
11234     {"bits": [13, 13], "name": "DISABLE_FLUSH"}  array
11239     {"bits": [0, 13], "name": "MIN_POWER"},  array
11240     {"bits": [16, 29], "name": "MAX_POWER"},  array
11241     {"bits": [30, 31], "name": "PHASE_OFFSET"}  array
11246     {"bits": [0, 13], "name": "MAX_POWER_DELTA"},  array
11247     {"bits": [16, 25], "name": "SHORT_TERM_INTERVAL_SIZE"},  array
11248     {"bits": [27, 30], "name": "LONG_TERM_INTERVAL_RATIO"},  array
11249     {"bits": [31, 31], "name": "USE_REF_CLOCK"}  array
11254     {"bits": [0, 6], "name": "RET"},  array
11255     {"bits": [7, 9], "name": "RUI"},  array
11256     {"bits": [10, 20], "name": "RNG"}  array
11261     {"bits": [0, 5], "name": "SRBM_CREDITS"},  array
11262     {"bits": [8, 11], "name": "CMD_CREDITS"},  array
11263     {"bits": [28, 28], "name": "REG_BUSY"},  array
11264     {"bits": [29, 29], "name": "SRBM_OVERFLOW"},  array
11265     {"bits": [30, 30], "name": "IMMED_OVERFLOW"},  array
11266     {"bits": [31, 31], "name": "CMD_OVERFLOW"}  array
11271     {"bits": [0, 5], "name": "LDS_SEC"},  array
11272     {"bits": [8, 12], "name": "SGPR_SEC"},  array
11273     {"bits": [16, 24], "name": "VGPR_SEC"}  array
11278     {"bits": [0, 31], "name": "ADDR"}  array
11283     {"bits": [0, 31], "name": "CNTR"}  array
11288     {"bits": [31, 31], "name": "RESET_BUFFER"}  array
11293     {"bits": [0, 2], "name": "HIWATER"}  array
11298     {"bits": [0, 4], "name": "CU_SEL"},  array
11299     {"bits": [5, 5], "name": "SH_SEL"},  array
11300     {"bits": [7, 7], "name": "REG_STALL_EN"},  array
11301     {"bits": [12, 13], "name": "VM_ID_MASK"},  array
11302     {"bits": [14, 14], "name": "SPI_STALL_EN"},  array
11303     {"bits": [15, 15], "name": "SQ_STALL_EN"},  array
11304     {"bits": [16, 31], "name": "RANDOM_SEED"},  array
11305     {"bits": [16, 31], "name": "RANDOM_SEED"}  array
11310     {"bits": [0, 2], "name": "MASK_PS"},  array
11311     {"bits": [3, 5], "name": "MASK_VS"},  array
11312     {"bits": [6, 8], "name": "MASK_GS"},  array
11313     {"bits": [9, 11], "name": "MASK_ES"},  array
11314     {"bits": [12, 14], "name": "MASK_HS"},  array
11315     {"bits": [15, 17], "name": "MASK_LS"},  array
11316     {"bits": [18, 20], "name": "MASK_CS"},  array
11317     {"bits": [21, 22], "name": "MODE"},  array
11318     {"bits": [23, 24], "name": "CAPTURE_MODE"},  array
11319     {"bits": [25, 25], "name": "AUTOFLUSH_EN"},  array
11320     {"bits": [26, 26], "name": "PRIV"},  array
11321     {"bits": [27, 28], "name": "ISSUE_MASK"},  array
11322     {"bits": [29, 29], "name": "TEST_MODE"},  array
11323     {"bits": [30, 30], "name": "INTERRUPT_EN"},  array
11324     {"bits": [31, 31], "name": "WRAP"}  array
11329     {"bits": [0, 15], "name": "SH0_MASK"},  array
11330     {"bits": [16, 31], "name": "SH1_MASK"}  array
11335     {"bits": [0, 21], "name": "SIZE"}  array
11340     {"bits": [0, 2], "name": "FINISH_PENDING"},  array
11341     {"bits": [16, 18], "name": "FINISH_DONE"},  array
11342     {"bits": [29, 29], "name": "NEW_BUF"},  array
11343     {"bits": [30, 30], "name": "BUSY"},  array
11344     {"bits": [31, 31], "name": "FULL"}  array
11349     {"bits": [0, 15], "name": "TOKEN_MASK"},  array
11350     {"bits": [16, 23], "name": "REG_MASK"},  array
11351     {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}  array
11356     {"bits": [0, 29], "name": "WPTR"},  array
11357     {"bits": [30, 31], "name": "READ_OFFSET"}  array
11362     {"bits": [0, 31], "name": "TIME"}  array
11367     {"bits": [0, 31], "name": "EXEC_HI"}  array
11372     {"bits": [0, 31], "name": "EXEC_LO"}  array
11377     {"bits": [0, 5], "name": "VGPR_BASE"},  array
11378     {"bits": [8, 13], "name": "VGPR_SIZE"},  array
11379     {"bits": [16, 21], "name": "SGPR_BASE"},  array
11380     {"bits": [24, 27], "name": "SGPR_SIZE"}  array
11385     {"bits": [0, 3], "name": "WAVE_ID"},  array
11386     {"bits": [4, 5], "name": "SIMD_ID"},  array
11387     {"bits": [6, 7], "name": "PIPE_ID"},  array
11388     {"bits": [8, 11], "name": "CU_ID"},  array
11389     {"bits": [12, 12], "name": "SH_ID"},  array
11390     {"bits": [13, 13], "name": "SE_ID"},  array
11391     {"bits": [16, 19], "name": "TG_ID"},  array
11392     {"bits": [20, 23], "name": "VM_ID"},  array
11393     {"bits": [24, 26], "name": "QUEUE_ID"},  array
11394     {"bits": [27, 29], "name": "STATE_ID"},  array
11395     {"bits": [30, 31], "name": "ME_ID"}  array
11400     {"bits": [0, 2], "name": "IBUF_ST"},  array
11401     {"bits": [3, 3], "name": "PC_INVALID"},  array
11402     {"bits": [4, 4], "name": "NEED_NEXT_DW"},  array
11403     {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},  array
11404     {"bits": [8, 9], "name": "IBUF_RPTR"},  array
11405     {"bits": [10, 11], "name": "IBUF_WPTR"},  array
11406     {"bits": [16, 18], "name": "INST_STR_ST"},  array
11407     {"bits": [19, 21], "name": "MISC_CNT"},  array
11408     {"bits": [22, 23], "name": "ECC_ST"},  array
11409     {"bits": [24, 24], "name": "IS_HYB"},  array
11410     {"bits": [25, 26], "name": "HYB_CNT"},  array
11411     {"bits": [27, 27], "name": "KILL"},  array
11412     {"bits": [28, 28], "name": "NEED_KILL_IFETCH"}  array
11417     {"bits": [0, 3], "name": "VM_CNT"},  array
11418     {"bits": [4, 6], "name": "EXP_CNT"},  array
11419     {"bits": [8, 12], "name": "LGKM_CNT"},  array
11420     {"bits": [13, 15], "name": "VALU_CNT"}  array
11425     {"bits": [0, 31], "name": "INST_DW0"}  array
11430     {"bits": [0, 31], "name": "INST_DW1"}  array
11435     {"bits": [0, 7], "name": "LDS_BASE"},  array
11436     {"bits": [12, 20], "name": "LDS_SIZE"}  array
11441     {"bits": [0, 31], "name": "M0"}  array
11446     {"bits": [0, 3], "name": "FP_ROUND"},  array
11447     {"bits": [4, 7], "name": "FP_DENORM"},  array
11448     {"bits": [8, 8], "name": "DX10_CLAMP"},  array
11449     {"bits": [9, 9], "name": "IEEE"},  array
11450     {"bits": [10, 10], "name": "LOD_CLAMPED"},  array
11451     {"bits": [11, 11], "name": "DEBUG_EN"},  array
11452     {"bits": [12, 18], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},  array
11453     {"bits": [28, 28], "name": "VSKIP"},  array
11454     {"bits": [29, 31], "name": "CSP"}  array
11459     {"bits": [0, 7], "name": "PC_HI"}  array
11464     {"bits": [0, 31], "name": "PC_LO"}  array
11469     {"bits": [0, 0], "name": "SCC"},  array
11470     {"bits": [1, 2], "name": "SPI_PRIO"},  array
11471     {"bits": [3, 4], "name": "WAVE_PRIO"},  array
11472     {"bits": [5, 5], "name": "PRIV"},  array
11473     {"bits": [6, 6], "name": "TRAP_EN"},  array
11474     {"bits": [7, 7], "name": "TTRACE_EN"},  array
11475     {"bits": [8, 8], "name": "EXPORT_RDY"},  array
11476     {"bits": [9, 9], "name": "EXECZ"},  array
11477     {"bits": [10, 10], "name": "VCCZ"},  array
11478     {"bits": [11, 11], "name": "IN_TG"},  array
11479     {"bits": [12, 12], "name": "IN_BARRIER"},  array
11480     {"bits": [13, 13], "name": "HALT"},  array
11481     {"bits": [14, 14], "name": "TRAP"},  array
11482     {"bits": [15, 15], "name": "TTRACE_CU_EN"},  array
11483     {"bits": [16, 16], "name": "VALID"},  array
11484     {"bits": [17, 17], "name": "ECC_ERR"},  array
11485     {"bits": [18, 18], "name": "SKIP_EXPORT"},  array
11486     {"bits": [19, 19], "name": "PERF_EN"},  array
11487     {"bits": [20, 20], "name": "COND_DBG_USER"},  array
11488     {"bits": [21, 21], "name": "COND_DBG_SYS"},  array
11489     {"bits": [22, 22], "name": "DATA_ATC"},  array
11490     {"bits": [23, 23], "name": "INST_ATC"},  array
11491     {"bits": [24, 26], "name": "DISPATCH_CACHE_CTRL"},  array
11492     {"bits": [27, 27], "name": "MUST_EXPORT"}  array
11497     {"bits": [0, 7], "name": "ADDR_HI"}  array
11502     {"bits": [0, 31], "name": "ADDR_LO"}  array
11507     {"bits": [0, 6], "enum_ref": "EXCP_EN", "name": "EXCP"},  array
11508     {"bits": [16, 21], "name": "EXCP_CYCLE"},  array
11509     {"bits": [29, 31], "name": "DP_RATE"}  array
11514     {"bits": [0, 31], "name": "DATA"}  array
11519     {"bits": [0, 31], "name": "ADDRESS"}  array
11524     {"bits": [0, 1], "name": "CACHE_INVALIDATION"},  array
11525     {"bits": [5, 5], "name": "VS_NO_EXTRA_BUFFER"},  array
11526     {"bits": [6, 7], "name": "AUTO_INVLD_EN"},  array
11527     {"bits": [9, 9], "name": "USE_GS_DONE"},  array
11528     {"bits": [11, 11], "name": "DIS_RANGE_FULL_INVLD"},  array
11529     {"bits": [12, 12], "name": "GS_LATE_ALLOC_EN"},  array
11530     {"bits": [13, 13], "name": "STREAMOUT_FULL_FLUSH"},  array
11531     {"bits": [16, 20], "name": "ES_LIMIT"}  array
11536     {"bits": [0, 0], "name": "VGT_BUSY"},  array
11537     {"bits": [1, 1], "name": "VGT_OUT_INDX_BUSY"},  array
11538     {"bits": [2, 2], "name": "VGT_OUT_BUSY"},  array
11539     {"bits": [3, 3], "name": "VGT_PT_BUSY"},  array
11540     {"bits": [4, 4], "name": "VGT_TE_BUSY"},  array
11541     {"bits": [5, 5], "name": "VGT_VR_BUSY"},  array
11542     {"bits": [6, 6], "name": "VGT_PI_BUSY"},  array
11543     {"bits": [7, 7], "name": "VGT_GS_BUSY"},  array
11544     {"bits": [8, 8], "name": "VGT_HS_BUSY"},  array
11545     {"bits": [9, 9], "name": "VGT_TE11_BUSY"}  array
11550     {"bits": [0, 5], "name": "VGT_DEBUG_INDX"},  array
11551     {"bits": [6, 6], "name": "VGT_DEBUG_SEL_BUS_B"}  array
11556     {"bits": [0, 31], "name": "BASE_ADDR"}  array
11561     {"bits": [0, 7], "name": "BASE_ADDR"}  array
11566     {"bits": [0, 8], "name": "DMA_DATA_FIFO_DEPTH"}  array
11571     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},  array
11572     {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},  array
11573     {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},  array
11574     {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},  array
11575     {"bits": [8, 8], "name": "ATC"},  array
11576     {"bits": [9, 9], "name": "NOT_EOP"},  array
11577     {"bits": [10, 10], "name": "REQ_PATH"}  array
11582     {"bits": [0, 31], "name": "MAX_SIZE"}  array
11587     {"bits": [0, 31], "name": "NUM_INSTANCES"}  array
11592     {"bits": [0, 5], "name": "DMA_REQ_FIFO_DEPTH"}  array
11597     {"bits": [0, 31], "name": "NUM_INDICES"}  array
11602     {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},  array
11603     {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},  array
11604     {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},  array
11605     {"bits": [5, 5], "name": "NOT_EOP"},  array
11606     {"bits": [6, 6], "name": "USE_OPAQUE"}  array
11611     {"bits": [0, 5], "name": "DRAW_INIT_FIFO_DEPTH"}  array
11616     {"bits": [0, 14], "name": "ITEMSIZE"}  array
11621     {"bits": [0, 31], "name": "MEM_SIZE"}  array
11626     {"bits": [0, 10], "name": "ES_PER_GS"}  array
11631     {"bits": [0, 27], "name": "ADDRESS_LOW"}  array
11636     {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},  array
11637     {"bits": [18, 26], "name": "ADDRESS_HI"},  array
11638     {"bits": [27, 27], "name": "EXTENDED_EVENT"}  array
11643     {"bits": [0, 6], "name": "VS_DEALLOC_TBL_DEPTH"},  array
11644     {"bits": [7, 7], "name": "RESERVED_0"},  array
11645     {"bits": [8, 21], "name": "CLIPP_FIFO_DEPTH"},  array
11646     {"bits": [22, 31], "name": "RESERVED_1"}  array
11651     {"bits": [0, 3], "name": "DECR"}  array
11656     {"bits": [0, 3], "name": "FIRST_DECR"}  array
11661     {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},  array
11662     {"bits": [14, 14], "name": "RETAIN_ORDER"},  array
11663     {"bits": [15, 15], "name": "RETAIN_QUADS"},  array
11664     {"bits": [16, 18], "name": "PRIM_ORDER"}  array
11669     {"bits": [0, 0], "name": "COMP_X_EN"},  array
11670     {"bits": [1, 1], "name": "COMP_Y_EN"},  array
11671     {"bits": [2, 2], "name": "COMP_Z_EN"},  array
11672     {"bits": [3, 3], "name": "COMP_W_EN"},  array
11673     {"bits": [8, 15], "name": "STRIDE"},  array
11674     {"bits": [16, 23], "name": "SHIFT"}  array
11679     {"bits": [0, 3], "name": "X_CONV"},  array
11680     {"bits": [4, 7], "name": "X_OFFSET"},  array
11681     {"bits": [8, 11], "name": "Y_CONV"},  array
11682     {"bits": [12, 15], "name": "Y_OFFSET"},  array
11683     {"bits": [16, 19], "name": "Z_CONV"},  array
11684     {"bits": [20, 23], "name": "Z_OFFSET"},  array
11685     {"bits": [24, 27], "name": "W_CONV"},  array
11686     {"bits": [28, 31], "name": "W_OFFSET"}  array
11691     {"bits": [0, 14], "name": "OFFSET"}  array
11696     {"bits": [0, 0], "name": "ENABLE"},  array
11697     {"bits": [2, 8], "name": "CNT"}  array
11702     {"bits": [0, 10], "name": "MAX_VERT_OUT"}  array
11707     {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},  array
11708     {"bits": [3, 3], "name": "RESERVED_0"},  array
11709     {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},  array
11710     {"bits": [6, 10], "name": "RESERVED_1"},  array
11711     {"bits": [11, 11], "name": "GS_C_PACK_EN"},  array
11712     {"bits": [12, 12], "name": "RESERVED_2"},  array
11713     {"bits": [13, 13], "name": "ES_PASSTHRU"},  array
11714     {"bits": [14, 14], "name": "COMPUTE_MODE"},  array
11715     {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"},  array
11716     {"bits": [16, 16], "name": "ELEMENT_INFO_EN"},  array
11717     {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},  array
11718     {"bits": [18, 18], "name": "SUPPRESS_CUTS"},  array
11719     {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},  array
11720     {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},  array
11721     {"bits": [21, 22], "name": "ONCHIP"}  array
11726     {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},  array
11727     {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},  array
11728     {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},  array
11729     {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},  array
11730     {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}  array
11735     {"bits": [0, 10], "name": "GS_PER_ES"}  array
11740     {"bits": [0, 3], "name": "GS_PER_VS"}  array
11745     {"bits": [0, 4], "name": "VERT_REUSE"}  array
11750     {"bits": [0, 1], "name": "TESS_MODE"}  array
11755     {"bits": [0, 31], "name": "MAX_TESS"}  array
11760     {"bits": [0, 31], "name": "MIN_TESS"}  array
11765     {"bits": [0, 7], "name": "REUSE_DEPTH"}  array
11770     {"bits": [0, 6], "name": "OFFCHIP_BUFFERING"},  array
11771 …{"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANUL…  array
11776     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}  array
11781     {"bits": [0, 31], "name": "INDX_OFFSET"}  array
11786     {"bits": [0, 31], "name": "STEP_RATE"}  array
11791     {"bits": [0, 2], "name": "SRC_STATE_ID"},  array
11792     {"bits": [16, 18], "name": "DST_STATE_ID"}  array
11797     {"bits": [0, 7], "name": "NUM_PATCHES"},  array
11798     {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},  array
11799     {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}  array
11804     {"bits": [0, 31], "name": "MAX_INDX"}  array
11809     {"bits": [0, 1], "name": "MC_TIME_STAMP_RES"}  array
11814     {"bits": [0, 31], "name": "MIN_INDX"}  array
11819     {"bits": [0, 0], "name": "RESET_EN"}  array
11824     {"bits": [0, 31], "name": "RESET_INDX"}  array
11829     {"bits": [0, 2], "name": "PATH_SELECT"}  array
11834     {"bits": [0, 6], "name": "DEALLOC_DIST"}  array
11839     {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}  array
11844     {"bits": [0, 0], "name": "PRIMITIVEID_EN"},  array
11845     {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}  array
11850     {"bits": [0, 31], "name": "VALUE"}  array
11855     {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}  array
11860     {"bits": [0, 0], "name": "REUSE_OFF"}  array
11865     {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},  array
11866     {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},  array
11867     {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},  array
11868     {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},  array
11869     {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},  array
11870     {"bits": [8, 8], "name": "DYNAMIC_HS"}  array
11875     {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},  array
11876     {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},  array
11877     {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},  array
11878     {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}  array
11883     {"bits": [0, 0], "name": "STREAMOUT_0_EN"},  array
11884     {"bits": [1, 1], "name": "STREAMOUT_1_EN"},  array
11885     {"bits": [2, 2], "name": "STREAMOUT_2_EN"},  array
11886     {"bits": [3, 3], "name": "STREAMOUT_3_EN"},  array
11887     {"bits": [4, 6], "name": "RAST_STREAM"},  array
11888     {"bits": [8, 11], "name": "RAST_STREAM_MASK"},  array
11889     {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}  array
11894     {"bits": [0, 8], "name": "VERTEX_STRIDE"}  array
11899     {"bits": [0, 9], "name": "STRIDE"}  array
11904     {"bits": [0, 0], "name": "DUAL_CORE_EN"},  array
11905     {"bits": [1, 6], "name": "MAX_LS_HS_THDGRP"},  array
11906     {"bits": [7, 7], "name": "ADC_EVENT_FILTER_DISABLE"}  array
11911     {"bits": [0, 31], "name": "BASE"}  array
11916     {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},  array
11917     {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},  array
11918     {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},  array
11919     {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},  array
11920     {"bits": [9, 9], "name": "DEPRECATED"},  array
11921     {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},  array
11922     {"bits": [14, 14], "name": "DISABLE_DONUTS"},  array
11923     {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}  array
11928     {"bits": [0, 15], "name": "SIZE"}  array
11933     {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}  array
11938     {"bits": [0, 0], "name": "VTX_CNT_EN"}  array
11943     {"bits": [0, 9], "name": "PRIM_COUNT"}  array