Lines Matching defs:bits
11137 {"bits": [0, 7], "name": "PERF_SEL"}, array
11138 {"bits": [8, 15], "name": "PERF_SEL_END"}, array
11139 {"bits": [24, 27], "name": "PERF_MODE"}, array
11140 {"bits": [28, 28], "name": "ENABLE"}, array
11141 {"bits": [29, 29], "name": "CLEAR"} array
11146 {"bits": [0, 15], "name": "COUNTER_HI"}, array
11147 {"bits": [16, 31], "name": "COMPARE_VALUE"} array
11152 {"bits": [0, 31], "name": "COUNTER_LO"} array
11157 {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"}, array
11158 {"bits": [8, 15], "name": "START_TRIGGER"}, array
11159 {"bits": [16, 23], "name": "STOP_TRIGGER"}, array
11160 {"bits": [24, 24], "name": "ENABLE_ANY"}, array
11161 {"bits": [25, 25], "name": "CLEAR_ALL"}, array
11162 {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"} array
11167 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"}, array
11168 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"}, array
11169 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"}, array
11170 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"}, array
11171 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"}, array
11172 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"}, array
11173 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"}, array
11174 {"bits": [30, 30], "name": "ENABLE"}, array
11175 {"bits": [31, 31], "name": "DISABLE_ROP3"} array
11180 {"bits": [0, 31], "name": "BLEND_ALPHA"} array
11185 {"bits": [0, 31], "name": "BLEND_BLUE"} array
11190 {"bits": [0, 31], "name": "BLEND_GREEN"} array
11195 {"bits": [0, 31], "name": "BLEND_RED"} array
11200 {"bits": [0, 10], "name": "MIP0_DEPTH"}, array
11201 {"bits": [11, 11], "name": "META_LINEAR"}, array
11202 {"bits": [12, 14], "name": "NUM_SAMPLES"}, array
11203 {"bits": [15, 16], "name": "NUM_FRAGMENTS"}, array
11204 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}, array
11205 {"bits": [18, 22], "name": "COLOR_SW_MODE"}, array
11206 {"bits": [23, 27], "name": "FMASK_SW_MODE"}, array
11207 {"bits": [28, 29], "name": "RESOURCE_TYPE"}, array
11208 {"bits": [30, 30], "name": "RB_ALIGNED"}, array
11209 {"bits": [31, 31], "name": "PIPE_ALIGNED"} array
11214 {"bits": [0, 13], "name": "MIP0_HEIGHT"}, array
11215 {"bits": [14, 27], "name": "MIP0_WIDTH"}, array
11216 {"bits": [28, 31], "name": "MAX_MIP"} array
11221 {"bits": [0, 7], "name": "BASE_256B"} array
11226 {"bits": [0, 31], "name": "CLEAR_WORD0"} array
11231 {"bits": [0, 31], "name": "CLEAR_WORD1"} array
11236 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, array
11237 {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"}, array
11238 …{"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNC… array
11239 …{"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPR… array
11240 {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"}, array
11241 {"bits": [7, 8], "name": "COLOR_TRANSFORM"}, array
11242 {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"}, array
11243 {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"}, array
11244 {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}, array
11245 {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"}, array
11246 {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"} array
11251 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"}, array
11252 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"}, array
11253 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"}, array
11254 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"}, array
11255 {"bits": [13, 13], "name": "FAST_CLEAR"}, array
11256 {"bits": [14, 14], "name": "COMPRESSION"}, array
11257 {"bits": [15, 15], "name": "BLEND_CLAMP"}, array
11258 {"bits": [16, 16], "name": "BLEND_BYPASS"}, array
11259 {"bits": [17, 17], "name": "SIMPLE_FLOAT"}, array
11260 {"bits": [18, 18], "name": "ROUND_MODE"}, array
11261 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"}, array
11262 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"}, array
11263 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}, array
11264 {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"}, array
11265 {"bits": [28, 28], "name": "DCC_ENABLE"}, array
11266 {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"} array
11271 {"bits": [0, 10], "name": "SLICE_START"}, array
11272 {"bits": [13, 23], "name": "SLICE_MAX"}, array
11273 {"bits": [24, 27], "name": "MIP_LEVEL"} array
11278 {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"}, array
11279 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"}, array
11280 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"}, array
11281 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"} array
11286 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, array
11287 {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"}, array
11288 {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}, array
11289 {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"}, array
11290 {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"}, array
11291 {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"}, array
11292 {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"}, array
11293 {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"}, array
11294 {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"} array
11299 {"bits": [0, 8], "name": "PERF_SEL"}, array
11300 {"bits": [10, 18], "name": "PERF_SEL1"}, array
11301 {"bits": [20, 23], "name": "CNTR_MODE"}, array
11302 {"bits": [24, 27], "name": "PERF_MODE1"}, array
11303 {"bits": [28, 31], "name": "PERF_MODE"} array
11308 {"bits": [0, 8], "name": "PERF_SEL2"}, array
11309 {"bits": [10, 18], "name": "PERF_SEL3"}, array
11310 {"bits": [24, 27], "name": "PERF_MODE3"}, array
11311 {"bits": [28, 31], "name": "PERF_MODE2"} array
11316 {"bits": [0, 8], "name": "PERF_SEL"}, array
11317 {"bits": [28, 31], "name": "PERF_MODE"} array
11322 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"}, array
11323 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"}, array
11324 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"}, array
11325 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"}, array
11326 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"}, array
11327 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"}, array
11328 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"}, array
11329 {"bits": [13, 15], "name": "MRT_FILTER_SEL"}, array
11330 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"}, array
11331 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"}, array
11332 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"}, array
11333 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"} array
11338 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"}, array
11339 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"}, array
11340 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"}, array
11341 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"}, array
11342 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"}, array
11343 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"}, array
11344 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"}, array
11345 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"} array
11350 {"bits": [0, 3], "name": "TARGET0_ENABLE"}, array
11351 {"bits": [4, 7], "name": "TARGET1_ENABLE"}, array
11352 {"bits": [8, 11], "name": "TARGET2_ENABLE"}, array
11353 {"bits": [12, 15], "name": "TARGET3_ENABLE"}, array
11354 {"bits": [16, 19], "name": "TARGET4_ENABLE"}, array
11355 {"bits": [20, 23], "name": "TARGET5_ENABLE"}, array
11356 {"bits": [24, 27], "name": "TARGET6_ENABLE"}, array
11357 {"bits": [28, 31], "name": "TARGET7_ENABLE"} array
11362 {"bits": [0, 31], "name": "DEST_BASE_256B"} array
11367 {"bits": [0, 7], "name": "DEST_BASE_HI_256B"} array
11372 {"bits": [0, 31], "name": "SIZE"} array
11377 {"bits": [0, 31], "name": "DISPATCH_ID"} array
11382 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"}, array
11383 {"bits": [1, 1], "name": "PARTIAL_TG_EN"}, array
11384 {"bits": [2, 2], "name": "FORCE_START_AT_000"}, array
11385 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"}, array
11386 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"}, array
11387 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"}, array
11388 {"bits": [6, 6], "name": "ORDER_MODE"}, array
11389 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"}, array
11390 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"}, array
11391 {"bits": [12, 12], "name": "RESERVED"}, array
11392 {"bits": [14, 14], "name": "RESTORE"} array
11397 {"bits": [0, 1], "name": "SEND_SEID"}, array
11398 {"bits": [2, 2], "name": "RESERVED2"}, array
11399 {"bits": [3, 3], "name": "RESERVED3"}, array
11400 {"bits": [4, 4], "name": "RESERVED4"}, array
11401 {"bits": [5, 16], "name": "WAVE_ID_BASE"} array
11406 {"bits": [0, 15], "name": "NUM_THREAD_FULL"}, array
11407 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"} array
11412 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"} array
11417 {"bits": [0, 7], "name": "DATA"} array
11422 {"bits": [0, 5], "name": "VGPRS"}, array
11423 {"bits": [6, 9], "name": "SGPRS"}, array
11424 {"bits": [10, 11], "name": "PRIORITY"}, array
11425 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
11426 {"bits": [20, 20], "name": "PRIV"}, array
11427 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
11428 {"bits": [22, 22], "name": "DEBUG_MODE"}, array
11429 {"bits": [23, 23], "name": "IEEE_MODE"}, array
11430 {"bits": [24, 24], "name": "BULKY"}, array
11431 {"bits": [25, 25], "name": "CDBG_USER"}, array
11432 {"bits": [26, 26], "name": "FP16_OVFL"} array
11437 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
11438 {"bits": [1, 5], "name": "USER_SGPR"}, array
11439 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
11440 {"bits": [7, 7], "name": "TGID_X_EN"}, array
11441 {"bits": [8, 8], "name": "TGID_Y_EN"}, array
11442 {"bits": [9, 9], "name": "TGID_Z_EN"}, array
11443 {"bits": [10, 10], "name": "TG_SIZE_EN"}, array
11444 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"}, array
11445 {"bits": [13, 14], "name": "EXCP_EN_MSB"}, array
11446 {"bits": [15, 23], "name": "LDS_SIZE"}, array
11447 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
11448 {"bits": [31, 31], "name": "SKIP_USGPR0"} array
11453 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"} array
11458 {"bits": [0, 29], "name": "PAYLOAD"}, array
11459 {"bits": [30, 30], "name": "IS_EVENT"}, array
11460 {"bits": [31, 31], "name": "IS_STATE"} array
11465 {"bits": [0, 9], "name": "WAVES_PER_SH"}, array
11466 {"bits": [12, 15], "name": "TG_PER_CU"}, array
11467 {"bits": [16, 21], "name": "LOCK_THRESHOLD"}, array
11468 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"}, array
11469 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"}, array
11470 {"bits": [24, 26], "name": "CU_GROUP_COUNT"}, array
11471 {"bits": [27, 30], "name": "SIMD_DISABLE"} array
11476 {"bits": [0, 31], "name": "RESTART"} array
11481 {"bits": [0, 31], "name": "CHECKSUM"} array
11486 {"bits": [0, 31], "name": "START"} array
11491 {"bits": [0, 15], "name": "SH0_CU_EN"}, array
11492 {"bits": [16, 31], "name": "SH1_CU_EN"} array
11497 {"bits": [0, 31], "name": "THREADGROUP_ID"} array
11502 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"} array
11507 {"bits": [0, 11], "name": "WAVES"}, array
11508 {"bits": [12, 24], "name": "WAVESIZE"} array
11513 {"bits": [0, 3], "name": "DATA"} array
11518 {"bits": [0, 15], "name": "ADDR"} array
11523 {"bits": [0, 31], "name": "ADDR"} array
11528 {"bits": [0, 2], "name": "INDEX"}, array
11529 {"bits": [30, 30], "name": "CLEAR"}, array
11530 {"bits": [31, 31], "name": "ENABLE"} array
11535 {"bits": [0, 3], "name": "INDEX"}, array
11536 {"bits": [30, 30], "name": "CLEAR"}, array
11537 {"bits": [31, 31], "name": "ENABLE"} array
11542 {"bits": [0, 2], "name": "INDEX"}, array
11543 {"bits": [30, 30], "name": "ALWAYS"}, array
11544 {"bits": [31, 31], "name": "ENABLE"} array
11549 {"bits": [0, 4], "name": "INDEX"}, array
11550 {"bits": [30, 30], "name": "CLEAR"}, array
11551 {"bits": [31, 31], "name": "ENABLE"} array
11556 {"bits": [0, 9], "name": "CNTR_SEL2"}, array
11557 {"bits": [10, 19], "name": "CNTR_SEL3"}, array
11558 {"bits": [24, 27], "name": "CNTR_MODE3"}, array
11559 {"bits": [28, 31], "name": "CNTR_MODE2"} array
11564 {"bits": [0, 31], "name": "PERFCOUNTER_HI"} array
11569 {"bits": [0, 31], "name": "PERFCOUNTER_LO"} array
11574 {"bits": [0, 9], "name": "CNTR_SEL0"}, array
11575 {"bits": [10, 19], "name": "CNTR_SEL1"}, array
11576 {"bits": [20, 23], "name": "SPM_MODE"}, array
11577 {"bits": [24, 27], "name": "CNTR_MODE1"}, array
11578 {"bits": [28, 31], "name": "CNTR_MODE0"} array
11583 {"bits": [0, 4], "name": "INDEX"}, array
11584 {"bits": [30, 30], "name": "ALWAYS"}, array
11585 {"bits": [31, 31], "name": "ENABLE"} array
11590 {"bits": [0, 15], "name": "MEM_ADDR_HI"}, array
11591 {"bits": [16, 16], "name": "CS_PS_SEL"}, array
11592 {"bits": [25, 25], "name": "CACHE_POLICY"}, array
11593 {"bits": [29, 31], "name": "COMMAND"} array
11598 {"bits": [2, 31], "name": "MEM_ADDR_LO"} array
11603 {"bits": [0, 31], "name": "LAST_FENCE"} array
11608 {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"} array
11613 {"bits": [0, 15], "name": "IB1_BASE_HI"} array
11618 {"bits": [2, 31], "name": "IB1_BASE_LO"} array
11623 {"bits": [0, 19], "name": "IB1_BUFSZ"} array
11628 {"bits": [0, 19], "name": "IB1_CMD_REQSZ"} array
11633 {"bits": [0, 15], "name": "IB2_BASE_HI"} array
11638 {"bits": [2, 31], "name": "IB2_BASE_LO"} array
11643 {"bits": [0, 19], "name": "IB2_BUFSZ"} array
11648 {"bits": [0, 19], "name": "IB2_CMD_REQSZ"} array
11653 {"bits": [0, 15], "name": "INIT_BASE_HI"} array
11658 {"bits": [5, 31], "name": "INIT_BASE_LO"} array
11663 {"bits": [0, 11], "name": "INIT_BUFSZ"} array
11668 {"bits": [0, 11], "name": "INIT_CMD_REQSZ"} array
11673 {"bits": [0, 31], "name": "COHER_BASE_256B"} array
11678 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"} array
11683 {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"}, array
11684 {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"}, array
11685 {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"}, array
11686 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"}, array
11687 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"}, array
11688 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"}, array
11689 {"bits": [23, 23], "name": "TC_ACTION_ENA"}, array
11690 {"bits": [25, 25], "name": "CB_ACTION_ENA"}, array
11691 {"bits": [26, 26], "name": "DB_ACTION_ENA"}, array
11692 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"}, array
11693 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"}, array
11694 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}, array
11695 {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"} array
11700 {"bits": [0, 31], "name": "COHER_SIZE_256B"} array
11705 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"} array
11710 {"bits": [0, 5], "name": "START_DELAY_COUNT"} array
11715 {"bits": [24, 25], "name": "MEID"}, array
11716 {"bits": [31, 31], "name": "STATUS"} array
11721 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"}, array
11722 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"}, array
11723 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"}, array
11724 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"}, array
11725 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"}, array
11726 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"}, array
11727 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"}, array
11728 {"bits": [7, 7], "name": "MEC1_TC_BUSY"}, array
11729 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"}, array
11730 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"}, array
11731 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"}, array
11732 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"}, array
11733 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"}, array
11734 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"}, array
11735 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"}, array
11736 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"}, array
11737 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"}, array
11738 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"}, array
11739 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"}, array
11740 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"}, array
11741 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"}, array
11742 {"bits": [23, 23], "name": "MEC2_TC_BUSY"}, array
11743 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"}, array
11744 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"}, array
11745 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"}, array
11746 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"}, array
11747 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"}, array
11748 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"} array
11753 {"bits": [0, 5], "name": "FREE_COUNT"} array
11758 {"bits": [0, 3], "name": "COUNT"} array
11763 {"bits": [0, 31], "name": "SCRATCH_DATA"} array
11768 {"bits": [0, 8], "name": "SCRATCH_INDEX"} array
11773 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"}, array
11774 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"}, array
11775 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"}, array
11776 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"}, array
11777 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"}, array
11778 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"}, array
11779 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"}, array
11780 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"}, array
11781 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"}, array
11782 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"}, array
11783 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"}, array
11784 {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"}, array
11785 {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"}, array
11786 {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"} array
11791 {"bits": [0, 0], "name": "MEC1_BUSY"}, array
11792 {"bits": [1, 1], "name": "MEC2_BUSY"}, array
11793 {"bits": [2, 2], "name": "DC0_BUSY"}, array
11794 {"bits": [3, 3], "name": "DC1_BUSY"}, array
11795 {"bits": [4, 4], "name": "RCIU1_BUSY"}, array
11796 {"bits": [5, 5], "name": "RCIU2_BUSY"}, array
11797 {"bits": [6, 6], "name": "ROQ1_BUSY"}, array
11798 {"bits": [7, 7], "name": "ROQ2_BUSY"}, array
11799 {"bits": [10, 10], "name": "TCIU_BUSY"}, array
11800 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"}, array
11801 {"bits": [12, 12], "name": "QU_BUSY"}, array
11802 {"bits": [13, 13], "name": "UTCL2IU_BUSY"}, array
11803 {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"}, array
11804 {"bits": [29, 29], "name": "CPG_CPC_BUSY"}, array
11805 {"bits": [30, 30], "name": "CPF_CPC_BUSY"}, array
11806 {"bits": [31, 31], "name": "CPC_BUSY"} array
11811 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"}, array
11812 {"bits": [1, 1], "name": "CSF_RING_BUSY"}, array
11813 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"}, array
11814 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"}, array
11815 {"bits": [4, 4], "name": "CSF_STATE_BUSY"}, array
11816 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"}, array
11817 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"}, array
11818 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"}, array
11819 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"}, array
11820 {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"}, array
11821 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"}, array
11822 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"}, array
11823 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"}, array
11824 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"}, array
11825 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"}, array
11826 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"}, array
11827 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"}, array
11828 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"}, array
11829 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"}, array
11830 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"}, array
11831 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"}, array
11832 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"}, array
11833 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"}, array
11834 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"}, array
11835 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"}, array
11836 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"}, array
11837 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"}, array
11838 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"}, array
11839 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"}, array
11840 {"bits": [30, 30], "name": "HQD_PQ_BUSY"}, array
11841 {"bits": [31, 31], "name": "HQD_IB_BUSY"} array
11846 {"bits": [0, 2], "name": "FREE_COUNT"} array
11851 {"bits": [0, 0], "name": "RING_FETCHING_DATA"}, array
11852 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"}, array
11853 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"}, array
11854 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"}, array
11855 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"}, array
11856 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"}, array
11857 {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"}, array
11858 {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"}, array
11859 {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"}, array
11860 {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"}, array
11861 {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"} array
11866 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"}, array
11867 {"bits": [1, 1], "name": "CSF_BUSY"}, array
11868 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"}, array
11869 {"bits": [5, 5], "name": "ROQ_RING_BUSY"}, array
11870 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"}, array
11871 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"}, array
11872 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"}, array
11873 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"}, array
11874 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"}, array
11875 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"}, array
11876 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"}, array
11877 {"bits": [13, 13], "name": "INTERRUPT_BUSY"}, array
11878 {"bits": [14, 14], "name": "TCIU_BUSY"}, array
11879 {"bits": [15, 15], "name": "HQD_BUSY"}, array
11880 {"bits": [16, 16], "name": "PRT_BUSY"}, array
11881 {"bits": [17, 17], "name": "UTCL2IU_BUSY"}, array
11882 {"bits": [26, 26], "name": "CPF_GFX_BUSY"}, array
11883 {"bits": [27, 27], "name": "CPF_CMP_BUSY"}, array
11884 {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"}, array
11885 {"bits": [30, 30], "name": "CPC_CPF_BUSY"}, array
11886 {"bits": [31, 31], "name": "CPF_BUSY"} array
11891 {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"}, array
11892 {"bits": [4, 5], "name": "MIN_AVAILSZ"}, array
11893 {"bits": [16, 19], "name": "BUFFER_DEPTH"}, array
11894 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"}, array
11895 {"bits": [29, 29], "name": "PIO_FIFO_FULL"}, array
11896 {"bits": [30, 31], "name": "PIO_COUNT"} array
11901 {"bits": [0, 25], "name": "BYTE_COUNT"}, array
11902 {"bits": [26, 26], "name": "SAS"}, array
11903 {"bits": [27, 27], "name": "DAS"}, array
11904 {"bits": [28, 28], "name": "SAIC"}, array
11905 {"bits": [29, 29], "name": "DAIC"}, array
11906 {"bits": [30, 30], "name": "RAW_WAIT"}, array
11907 {"bits": [31, 31], "name": "DIS_WC"} array
11912 {"bits": [0, 31], "name": "DST_ADDR"} array
11917 {"bits": [0, 15], "name": "DST_ADDR_HI"} array
11922 {"bits": [0, 31], "name": "SRC_ADDR"} array
11927 {"bits": [0, 15], "name": "SRC_ADDR_HI"} array
11932 {"bits": [10, 10], "name": "MEMLOG_CLEAR"}, array
11933 {"bits": [13, 13], "name": "SRC_CACHE_POLICY"}, array
11934 {"bits": [20, 21], "name": "DST_SELECT"}, array
11935 {"bits": [25, 25], "name": "DST_CACHE_POLICY"}, array
11936 {"bits": [29, 30], "name": "SRC_SELECT"} array
11941 {"bits": [0, 25], "name": "DMA_READ_TAG"}, array
11942 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"} array
11947 {"bits": [0, 31], "name": "OBJECT"} array
11952 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"}, array
11953 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"}, array
11954 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"}, array
11955 {"bits": [8, 8], "name": "MODE"} array
11960 {"bits": [0, 31], "name": "WINDOW_HI"} array
11965 {"bits": [0, 15], "name": "MIN"}, array
11966 {"bits": [16, 31], "name": "MAX"} array
11971 {"bits": [0, 31], "name": "WINDOW_MASK_HI"} array
11976 {"bits": [0, 15], "name": "ADDR_HI"} array
11981 {"bits": [2, 31], "name": "ADDR_LO"} array
11986 {"bits": [0, 31], "name": "CNTX_ID"} array
11991 {"bits": [16, 17], "name": "DST_SEL"}, array
11992 {"bits": [24, 26], "name": "INT_SEL"}, array
11993 {"bits": [29, 31], "name": "DATA_SEL"} array
11998 {"bits": [0, 31], "name": "DATA_HI"} array
12003 {"bits": [0, 31], "name": "DATA_LO"} array
12008 {"bits": [0, 6], "name": "WBINV_TC_OP"}, array
12009 {"bits": [12, 17], "name": "WBINV_ACTION_ENA"}, array
12010 {"bits": [25, 25], "name": "CACHE_POLICY"}, array
12011 {"bits": [28, 28], "name": "EXECUTE"} array
12016 {"bits": [0, 31], "name": "LAST_FENCE_HI"} array
12021 {"bits": [0, 31], "name": "LAST_FENCE_LO"} array
12026 {"bits": [0, 19], "name": "IB1_OFFSET"} array
12031 {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"} array
12036 {"bits": [0, 19], "name": "IB1_PREAMBLE_END"} array
12041 {"bits": [0, 19], "name": "IB2_OFFSET"} array
12046 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"} array
12051 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"} array
12056 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"} array
12061 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"}, array
12062 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"}, array
12063 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"}, array
12064 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"}, array
12065 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"}, array
12066 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"}, array
12067 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"}, array
12068 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"}, array
12069 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"}, array
12070 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"}, array
12071 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"}, array
12072 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"}, array
12073 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"} array
12078 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"}, array
12079 {"bits": [31, 31], "name": "STATUS"} array
12084 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"}, array
12085 {"bits": [22, 22], "name": "CACHE_POLICY"} array
12090 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"} array
12095 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"}, array
12096 {"bits": [22, 22], "name": "CACHE_POLICY"} array
12101 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"} array
12106 {"bits": [0, 31], "name": "ME_MC_WDATA_HI"} array
12111 {"bits": [0, 31], "name": "ME_MC_WDATA_LO"} array
12116 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"} array
12121 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"} array
12126 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"} array
12131 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"} array
12136 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"} array
12141 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"} array
12146 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"} array
12151 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"} array
12156 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"} array
12161 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"} array
12166 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"} array
12171 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"} array
12176 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"} array
12181 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"} array
12186 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"} array
12191 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"} array
12196 {"bits": [0, 31], "name": "CINVOC_COUNT_HI"} array
12201 {"bits": [0, 31], "name": "CINVOC_COUNT_LO"} array
12206 {"bits": [0, 31], "name": "CPRIM_COUNT_HI"} array
12211 {"bits": [0, 31], "name": "CPRIM_COUNT_LO"} array
12216 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, array
12217 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"}, array
12218 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"}, array
12219 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} array
12224 {"bits": [31, 31], "name": "PERFMON_ENABLE"} array
12229 {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"} array
12234 {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"} array
12239 {"bits": [0, 1], "name": "STATUS"} array
12244 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"} array
12249 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"} array
12254 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"} array
12259 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"} array
12264 {"bits": [0, 7], "name": "IB_EN"} array
12269 {"bits": [0, 0], "name": "CONFIG_REG_EN"}, array
12270 {"bits": [1, 1], "name": "CNTX_REG_EN"}, array
12271 {"bits": [16, 16], "name": "SH_GFX_REG_EN"}, array
12272 {"bits": [24, 24], "name": "SH_CS_REG_EN"} array
12277 {"bits": [0, 31], "name": "ADDR_LO"} array
12282 {"bits": [0, 1], "name": "PIPE_ID"} array
12287 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"} array
12292 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"} array
12297 {"bits": [25, 25], "name": "CACHE_POLICY"} array
12302 {"bits": [0, 0], "name": "NOT_VISIBLE"} array
12307 {"bits": [0, 19], "name": "RB_OFFSET"} array
12312 {"bits": [0, 0], "name": "Z_PASS_ACITVE"}, array
12313 {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"}, array
12314 {"bits": [2, 2], "name": "PIPELINE_ACTIVE"}, array
12315 {"bits": [3, 3], "name": "STIPPLE_ACTIVE"}, array
12316 {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"}, array
12317 {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"}, array
12318 {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"}, array
12319 {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"} array
12324 {"bits": [0, 7], "name": "SCRATCH_INDEX"} array
12329 {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"} array
12334 {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"} array
12339 {"bits": [0, 31], "name": "OBSOLETE"} array
12344 {"bits": [0, 31], "name": "SEM_WAIT_TIMER"} array
12349 {"bits": [0, 15], "name": "SEM_ADDR_HI"}, array
12350 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"}, array
12351 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"}, array
12352 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"}, array
12353 {"bits": [29, 31], "name": "SEM_SELECT"} array
12358 {"bits": [0, 1], "name": "SEM_ADDR_SWAP"}, array
12359 {"bits": [3, 31], "name": "SEM_ADDR_LO"} array
12364 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"} array
12369 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"} array
12374 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"} array
12379 {"bits": [0, 15], "name": "ST_BASE_HI"} array
12384 {"bits": [2, 31], "name": "ST_BASE_LO"} array
12389 {"bits": [0, 19], "name": "ST_BUFSZ"} array
12394 {"bits": [0, 19], "name": "ST_CMD_REQSZ"} array
12399 {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"} array
12404 {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"} array
12409 {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"} array
12414 {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"} array
12419 {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"} array
12424 {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"} array
12429 {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"} array
12434 {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"} array
12439 {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"} array
12444 {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"} array
12449 {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"} array
12454 {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"} array
12459 {"bits": [0, 31], "name": "IAVERT_COUNT_HI"} array
12464 {"bits": [0, 31], "name": "IAVERT_COUNT_LO"} array
12469 {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"} array
12474 {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"} array
12479 {"bits": [0, 3], "name": "VMID"} array
12484 {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"} array
12489 {"bits": [0, 2], "name": "SRC_STATE_ID"} array
12494 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"}, array
12495 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"}, array
12496 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"}, array
12497 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"}, array
12498 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"}, array
12499 {"bits": [16, 16], "name": "OFFSET_ROUND"} array
12504 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"}, array
12505 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"}, array
12506 {"bits": [4, 6], "name": "SAMPLE_RATE"}, array
12507 {"bits": [8, 11], "name": "ZPASS_ENABLE"}, array
12508 {"bits": [12, 15], "name": "ZFAIL_ENABLE"}, array
12509 {"bits": [16, 19], "name": "SFAIL_ENABLE"}, array
12510 {"bits": [20, 23], "name": "DBFAIL_ENABLE"}, array
12511 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"}, array
12512 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"} array
12517 {"bits": [0, 31], "name": "MAX"} array
12522 {"bits": [0, 31], "name": "MIN"} array
12527 {"bits": [0, 31], "name": "DEPTH_CLEAR"} array
12532 {"bits": [0, 0], "name": "STENCIL_ENABLE"}, array
12533 {"bits": [1, 1], "name": "Z_ENABLE"}, array
12534 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"}, array
12535 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"}, array
12536 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"}, array
12537 {"bits": [7, 7], "name": "BACKFACE_ENABLE"}, array
12538 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"}, array
12539 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"}, array
12540 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"}, array
12541 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"} array
12546 {"bits": [0, 13], "name": "X_MAX"}, array
12547 {"bits": [16, 29], "name": "Y_MAX"} array
12552 {"bits": [0, 10], "name": "SLICE_START"}, array
12553 {"bits": [13, 23], "name": "SLICE_MAX"}, array
12554 {"bits": [24, 24], "name": "Z_READ_ONLY"}, array
12555 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}, array
12556 {"bits": [26, 29], "name": "MIPID"} array
12561 {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"}, array
12562 {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"}, array
12563 {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"} array
12568 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"}, array
12569 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"}, array
12570 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"}, array
12571 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"}, array
12572 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"}, array
12573 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"}, array
12574 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"}, array
12575 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"}, array
12576 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"}, array
12577 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"}, array
12578 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"}, array
12579 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"} array
12584 {"bits": [0, 31], "name": "BASE_256B"} array
12589 {"bits": [0, 7], "name": "BASE_HI"} array
12594 {"bits": [1, 1], "name": "FULL_CACHE"}, array
12595 {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"}, array
12596 {"bits": [3, 3], "name": "PRELOAD"}, array
12597 {"bits": [4, 9], "name": "PREFETCH_WIDTH"}, array
12598 {"bits": [10, 15], "name": "PREFETCH_HEIGHT"}, array
12599 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}, array
12600 {"bits": [18, 18], "name": "PIPE_ALIGNED"}, array
12601 {"bits": [19, 19], "name": "RB_ALIGNED"} array
12606 {"bits": [0, 30], "name": "COUNT_HI"} array
12611 {"bits": [0, 31], "name": "COUNT_LOW"} array
12616 {"bits": [0, 7], "name": "START_X"}, array
12617 {"bits": [8, 15], "name": "START_Y"}, array
12618 {"bits": [16, 23], "name": "MAX_X"}, array
12619 {"bits": [24, 31], "name": "MAX_Y"} array
12624 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"}, array
12625 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"}, array
12626 {"bits": [2, 2], "name": "DEPTH_COPY"}, array
12627 {"bits": [3, 3], "name": "STENCIL_COPY"}, array
12628 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"}, array
12629 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"}, array
12630 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"}, array
12631 {"bits": [7, 7], "name": "COPY_CENTROID"}, array
12632 {"bits": [8, 11], "name": "COPY_SAMPLE"}, array
12633 {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"} array
12638 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"}, array
12639 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"}, array
12640 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"}, array
12641 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"}, array
12642 {"bits": [7, 7], "name": "FAST_Z_DISABLE"}, array
12643 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"}, array
12644 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"}, array
12645 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"}, array
12646 {"bits": [11, 11], "name": "FORCE_Z_READ"}, array
12647 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"}, array
12648 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"}, array
12649 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"}, array
12650 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"}, array
12651 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"}, array
12652 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"}, array
12653 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"}, array
12654 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"}, array
12655 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"}, array
12656 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"}, array
12657 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"}, array
12658 {"bits": [29, 29], "name": "FORCE_Z_VALID"}, array
12659 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"}, array
12660 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"} array
12665 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"}, array
12666 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"}, array
12667 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"}, array
12668 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"}, array
12669 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"}, array
12670 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"}, array
12671 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"}, array
12672 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"}, array
12673 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"}, array
12674 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"}, array
12675 {"bits": [15, 17], "name": "HIS_SFUNC_FF"}, array
12676 {"bits": [18, 20], "name": "HIS_SFUNC_BF"}, array
12677 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"}, array
12678 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"}, array
12679 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}, array
12680 {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"} array
12685 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"}, array
12686 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"}, array
12687 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"}, array
12688 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"}, array
12689 {"bits": [6, 6], "name": "KILL_ENABLE"}, array
12690 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"}, array
12691 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"}, array
12692 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"}, array
12693 {"bits": [10, 10], "name": "EXEC_ON_NOOP"}, array
12694 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"}, array
12695 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"}, array
12696 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}, array
12697 {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"}, array
12698 {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"}, array
12699 {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"}, array
12700 {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"} array
12705 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"}, array
12706 {"bits": [4, 11], "name": "COMPAREVALUE0"}, array
12707 {"bits": [12, 19], "name": "COMPAREMASK0"}, array
12708 {"bits": [24, 24], "name": "ENABLE0"} array
12713 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"}, array
12714 {"bits": [4, 11], "name": "COMPAREVALUE1"}, array
12715 {"bits": [12, 19], "name": "COMPAREMASK1"}, array
12716 {"bits": [24, 24], "name": "ENABLE1"} array
12721 {"bits": [0, 7], "name": "STENCILTESTVAL"}, array
12722 {"bits": [8, 15], "name": "STENCILMASK"}, array
12723 {"bits": [16, 23], "name": "STENCILWRITEMASK"}, array
12724 {"bits": [24, 31], "name": "STENCILOPVAL"} array
12729 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"}, array
12730 {"bits": [8, 15], "name": "STENCILMASK_BF"}, array
12731 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"}, array
12732 {"bits": [24, 31], "name": "STENCILOPVAL_BF"} array
12737 {"bits": [0, 7], "name": "CLEAR"} array
12742 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"}, array
12743 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"}, array
12744 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"}, array
12745 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"}, array
12746 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"}, array
12747 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"} array
12752 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"}, array
12753 {"bits": [4, 8], "name": "SW_MODE"}, array
12754 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, array
12755 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, array
12756 {"bits": [15, 15], "name": "ITERATE_FLUSH"}, array
12757 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, array
12758 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"}, array
12759 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"} array
12764 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"}, array
12765 {"bits": [2, 3], "name": "NUM_SAMPLES"}, array
12766 {"bits": [4, 8], "name": "SW_MODE"}, array
12767 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, array
12768 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, array
12769 {"bits": [15, 15], "name": "ITERATE_FLUSH"}, array
12770 {"bits": [16, 19], "name": "MAXMIP"}, array
12771 {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"}, array
12772 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, array
12773 {"bits": [28, 28], "name": "READ_SIZE"}, array
12774 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"}, array
12775 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}, array
12776 {"bits": [31, 31], "name": "ZRANGE_PRECISION"} array
12781 {"bits": [0, 15], "name": "EPITCH"} array
12786 {"bits": [0, 2], "name": "NUM_PIPES"}, array
12787 {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"}, array
12788 {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"}, array
12789 {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"}, array
12790 {"bits": [12, 14], "enum_ref": "NumBanks", "name": "NUM_BANKS"}, array
12791 {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"}, array
12792 {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"}, array
12793 {"bits": [21, 23], "name": "NUM_GPUS"}, array
12794 {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"}, array
12795 {"bits": [26, 27], "name": "NUM_RB_PER_SE"}, array
12796 {"bits": [28, 29], "name": "ROW_SIZE"}, array
12797 {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}, array
12798 {"bits": [31, 31], "name": "SE_ENABLE"} array
12803 {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"}, array
12804 {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"}, array
12805 {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"}, array
12806 {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"} array
12811 {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"}, array
12812 {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"}, array
12813 {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"}, array
12814 {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"}, array
12815 {"bits": [25, 26], "name": "SAMPLE_SPLIT"} array
12820 {"bits": [0, 15], "name": "BASE"}, array
12821 {"bits": [16, 31], "name": "UNUSED"} array
12826 {"bits": [0, 5], "name": "AINC"}, array
12827 {"bits": [6, 7], "name": "UNUSED1"}, array
12828 {"bits": [8, 9], "name": "DMODE"}, array
12829 {"bits": [10, 31], "name": "UNUSED2"} array
12834 {"bits": [0, 0], "name": "COMPLETE"}, array
12835 {"bits": [1, 31], "name": "UNUSED"} array
12840 {"bits": [0, 31], "name": "DST"} array
12845 {"bits": [0, 7], "name": "OFFSET0"}, array
12846 {"bits": [8, 31], "name": "UNUSED"} array
12851 {"bits": [0, 7], "name": "OFFSET1"}, array
12852 {"bits": [8, 31], "name": "UNUSED"} array
12857 {"bits": [0, 7], "name": "OP"}, array
12858 {"bits": [8, 31], "name": "UNUSED"} array
12863 {"bits": [0, 15], "name": "SIZE"}, array
12864 {"bits": [16, 31], "name": "UNUSED"} array
12869 {"bits": [0, 0], "name": "FLAG"}, array
12870 {"bits": [1, 12], "name": "COUNTER"}, array
12871 {"bits": [13, 13], "name": "TYPE"}, array
12872 {"bits": [14, 14], "name": "DED"}, array
12873 {"bits": [15, 15], "name": "RELEASE_ALL"}, array
12874 {"bits": [16, 27], "name": "HEAD_QUEUE"}, array
12875 {"bits": [28, 28], "name": "HEAD_VALID"}, array
12876 {"bits": [29, 29], "name": "HEAD_FLAG"}, array
12877 {"bits": [30, 30], "name": "HALTED"}, array
12878 {"bits": [31, 31], "name": "UNUSED1"} array
12883 {"bits": [0, 15], "name": "RESOURCE_CNT"}, array
12884 {"bits": [16, 31], "name": "UNUSED"} array
12889 {"bits": [0, 5], "name": "INDEX"}, array
12890 {"bits": [6, 31], "name": "UNUSED"} array
12895 {"bits": [0, 15], "name": "DS_ADDRESS"}, array
12896 {"bits": [16, 19], "name": "CRAWLER"}, array
12897 {"bits": [20, 21], "name": "CRAWLER_TYPE"}, array
12898 {"bits": [22, 29], "name": "UNUSED"}, array
12899 {"bits": [30, 30], "name": "NO_ALLOC"}, array
12900 {"bits": [31, 31], "name": "ENABLE"} array
12905 {"bits": [0, 3], "name": "INDEX"}, array
12906 {"bits": [4, 31], "name": "UNUSED"} array
12911 {"bits": [0, 31], "name": "SPACE_AVAILABLE"} array
12916 {"bits": [0, 30], "name": "VALUE"}, array
12917 {"bits": [31, 31], "name": "INCDEC"} array
12922 {"bits": [0, 31], "name": "RING_SIZE"} array
12927 {"bits": [0, 31], "name": "READ_ADDR"} array
12932 {"bits": [0, 31], "name": "BURST_ADDR"} array
12937 {"bits": [0, 31], "name": "BURST_COUNT"} array
12942 {"bits": [0, 31], "name": "BURST_DATA"} array
12947 {"bits": [0, 31], "name": "READ_DATA"} array
12952 {"bits": [0, 31], "name": "WRITE_COMPLETE"} array
12957 {"bits": [0, 31], "name": "WRITE_ADDR"} array
12962 {"bits": [0, 31], "name": "WRITE_DATA"} array
12967 {"bits": [0, 7], "name": "INSTANCE_INDEX"}, array
12968 {"bits": [8, 15], "name": "SH_INDEX"}, array
12969 {"bits": [16, 23], "name": "SE_INDEX"}, array
12970 {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"}, array
12971 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"}, array
12972 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"} array
12977 {"bits": [0, 5], "name": "PERF_SEL"}, array
12978 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, array
12979 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, array
12980 {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"}, array
12981 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"}, array
12982 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"}, array
12983 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"}, array
12984 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"}, array
12985 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"}, array
12986 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"}, array
12987 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"}, array
12988 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"}, array
12989 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"}, array
12990 {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"}, array
12991 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"}, array
12992 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"}, array
12993 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"}, array
12994 {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"}, array
12995 {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}, array
12996 {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"}, array
12997 {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"}, array
12998 {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"} array
13003 {"bits": [0, 5], "name": "PERF_SEL"}, array
13004 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, array
13005 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, array
13006 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"}, array
13007 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"}, array
13008 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"}, array
13009 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"}, array
13010 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"}, array
13011 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"}, array
13012 {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"}, array
13013 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"}, array
13014 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}, array
13015 {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"} array
13020 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"}, array
13021 {"bits": [5, 5], "name": "RSMU_RQ_PENDING"}, array
13022 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"}, array
13023 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"}, array
13024 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"}, array
13025 {"bits": [12, 12], "name": "DB_CLEAN"}, array
13026 {"bits": [13, 13], "name": "CB_CLEAN"}, array
13027 {"bits": [14, 14], "name": "TA_BUSY"}, array
13028 {"bits": [15, 15], "name": "GDS_BUSY"}, array
13029 {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"}, array
13030 {"bits": [17, 17], "name": "VGT_BUSY"}, array
13031 {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"}, array
13032 {"bits": [19, 19], "name": "IA_BUSY"}, array
13033 {"bits": [20, 20], "name": "SX_BUSY"}, array
13034 {"bits": [21, 21], "name": "WD_BUSY"}, array
13035 {"bits": [22, 22], "name": "SPI_BUSY"}, array
13036 {"bits": [23, 23], "name": "BCI_BUSY"}, array
13037 {"bits": [24, 24], "name": "SC_BUSY"}, array
13038 {"bits": [25, 25], "name": "PA_BUSY"}, array
13039 {"bits": [26, 26], "name": "DB_BUSY"}, array
13040 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"}, array
13041 {"bits": [29, 29], "name": "CP_BUSY"}, array
13042 {"bits": [30, 30], "name": "CB_BUSY"}, array
13043 {"bits": [31, 31], "name": "GUI_ACTIVE"} array
13048 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"}, array
13049 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"}, array
13050 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"}, array
13051 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"}, array
13052 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"}, array
13053 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"}, array
13054 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"}, array
13055 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"}, array
13056 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"}, array
13057 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"}, array
13058 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"}, array
13059 {"bits": [14, 14], "name": "RLC_RQ_PENDING"}, array
13060 {"bits": [15, 15], "name": "UTCL2_BUSY"}, array
13061 {"bits": [16, 16], "name": "EA_BUSY"}, array
13062 {"bits": [17, 17], "name": "RMI_BUSY"}, array
13063 {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"}, array
13064 {"bits": [19, 19], "name": "CPF_RQ_PENDING"}, array
13065 {"bits": [20, 20], "name": "EA_LINK_BUSY"}, array
13066 {"bits": [24, 24], "name": "RLC_BUSY"}, array
13067 {"bits": [25, 25], "name": "TC_BUSY"}, array
13068 {"bits": [26, 26], "name": "TCC_CC_RESIDENT"}, array
13069 {"bits": [28, 28], "name": "CPF_BUSY"}, array
13070 {"bits": [29, 29], "name": "CPC_BUSY"}, array
13071 {"bits": [30, 30], "name": "CPG_BUSY"}, array
13072 {"bits": [31, 31], "name": "CPAXI_BUSY"} array
13077 {"bits": [1, 1], "name": "DB_CLEAN"}, array
13078 {"bits": [2, 2], "name": "CB_CLEAN"}, array
13079 {"bits": [21, 21], "name": "RMI_BUSY"}, array
13080 {"bits": [22, 22], "name": "BCI_BUSY"}, array
13081 {"bits": [23, 23], "name": "VGT_BUSY"}, array
13082 {"bits": [24, 24], "name": "PA_BUSY"}, array
13083 {"bits": [25, 25], "name": "TA_BUSY"}, array
13084 {"bits": [26, 26], "name": "SX_BUSY"}, array
13085 {"bits": [27, 27], "name": "SPI_BUSY"}, array
13086 {"bits": [29, 29], "name": "SC_BUSY"}, array
13087 {"bits": [30, 30], "name": "DB_BUSY"}, array
13088 {"bits": [31, 31], "name": "CB_BUSY"} array
13093 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, array
13094 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, array
13095 {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, array
13096 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, array
13097 {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, array
13098 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}, array
13099 {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"}, array
13100 {"bits": [22, 22], "name": "EN_INST_OPT_ADV"}, array
13101 {"bits": [23, 23], "name": "HW_USE_ONLY"} array
13106 {"bits": [0, 9], "name": "PERF_SEL"}, array
13107 {"bits": [10, 19], "name": "PERF_SEL1"}, array
13108 {"bits": [20, 23], "name": "CNTR_MODE"}, array
13109 {"bits": [24, 27], "name": "PERF_MODE1"}, array
13110 {"bits": [28, 31], "name": "PERF_MODE"} array
13115 {"bits": [0, 9], "name": "PERF_SEL2"}, array
13116 {"bits": [10, 19], "name": "PERF_SEL3"}, array
13117 {"bits": [24, 27], "name": "PERF_MODE3"}, array
13118 {"bits": [28, 31], "name": "PERF_MODE2"} array
13123 {"bits": [0, 0], "name": "UCP_ENA_0"}, array
13124 {"bits": [1, 1], "name": "UCP_ENA_1"}, array
13125 {"bits": [2, 2], "name": "UCP_ENA_2"}, array
13126 {"bits": [3, 3], "name": "UCP_ENA_3"}, array
13127 {"bits": [4, 4], "name": "UCP_ENA_4"}, array
13128 {"bits": [5, 5], "name": "UCP_ENA_5"}, array
13129 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"}, array
13130 {"bits": [14, 15], "name": "PS_UCP_MODE"}, array
13131 {"bits": [16, 16], "name": "CLIP_DISABLE"}, array
13132 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"}, array
13133 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"}, array
13134 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"}, array
13135 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"}, array
13136 {"bits": [21, 21], "name": "VTX_KILL_OR"}, array
13137 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"}, array
13138 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"}, array
13139 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"}, array
13140 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"}, array
13141 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}, array
13142 {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"} array
13147 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"}, array
13148 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"}, array
13149 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"}, array
13150 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"}, array
13151 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"}, array
13152 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"}, array
13153 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"}, array
13154 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"}, array
13155 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"}, array
13156 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"}, array
13157 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"}, array
13158 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"}, array
13159 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"}, array
13160 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"}, array
13161 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"}, array
13162 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"} array
13167 {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"}, array
13168 {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"} array
13173 {"bits": [0, 0], "name": "OBJ_ID_SEL"}, array
13174 {"bits": [1, 1], "name": "ADD_PIPED_PRIM_ID"}, array
13175 {"bits": [2, 2], "name": "EN_32BIT_OBJPRIMID"} array
13180 {"bits": [0, 31], "name": "DATA_REGISTER"} array
13185 {"bits": [0, 31], "name": "VPORT_XOFFSET"} array
13190 {"bits": [0, 31], "name": "VPORT_XSCALE"} array
13195 {"bits": [0, 31], "name": "VPORT_YOFFSET"} array
13200 {"bits": [0, 31], "name": "VPORT_YSCALE"} array
13205 {"bits": [0, 31], "name": "VPORT_ZOFFSET"} array
13210 {"bits": [0, 31], "name": "VPORT_ZSCALE"} array
13215 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"}, array
13216 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"}, array
13217 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"}, array
13218 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"}, array
13219 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"}, array
13220 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"}, array
13221 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"}, array
13222 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"}, array
13223 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"}, array
13224 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"}, array
13225 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"}, array
13226 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"}, array
13227 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"}, array
13228 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"}, array
13229 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"}, array
13230 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"}, array
13231 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"}, array
13232 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"}, array
13233 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"}, array
13234 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"}, array
13235 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"}, array
13236 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"}, array
13237 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"}, array
13238 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"}, array
13239 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"}, array
13240 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}, array
13241 {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}, array
13242 {"bits": [27, 27], "name": "USE_VTX_SHD_OBJPRIM_ID"} array
13247 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"}, array
13248 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"}, array
13249 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"}, array
13250 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"}, array
13251 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"}, array
13252 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"}, array
13253 {"bits": [8, 8], "name": "VTX_XY_FMT"}, array
13254 {"bits": [9, 9], "name": "VTX_Z_FMT"}, array
13255 {"bits": [10, 10], "name": "VTX_W0_FMT"}, array
13256 {"bits": [11, 11], "name": "PERFCOUNTER_REF"} array
13261 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"}, array
13262 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"}, array
13263 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"}, array
13264 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"}, array
13265 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}, array
13266 {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"} array
13271 {"bits": [0, 15], "name": "AA_MASK_X0Y0"}, array
13272 {"bits": [16, 31], "name": "AA_MASK_X1Y0"} array
13277 {"bits": [0, 15], "name": "AA_MASK_X0Y1"}, array
13278 {"bits": [16, 31], "name": "AA_MASK_X1Y1"} array
13283 {"bits": [0, 3], "name": "S0_X"}, array
13284 {"bits": [4, 7], "name": "S0_Y"}, array
13285 {"bits": [8, 11], "name": "S1_X"}, array
13286 {"bits": [12, 15], "name": "S1_Y"}, array
13287 {"bits": [16, 19], "name": "S2_X"}, array
13288 {"bits": [20, 23], "name": "S2_Y"}, array
13289 {"bits": [24, 27], "name": "S3_X"}, array
13290 {"bits": [28, 31], "name": "S3_Y"} array
13295 {"bits": [0, 3], "name": "S4_X"}, array
13296 {"bits": [4, 7], "name": "S4_Y"}, array
13297 {"bits": [8, 11], "name": "S5_X"}, array
13298 {"bits": [12, 15], "name": "S5_Y"}, array
13299 {"bits": [16, 19], "name": "S6_X"}, array
13300 {"bits": [20, 23], "name": "S6_Y"}, array
13301 {"bits": [24, 27], "name": "S7_X"}, array
13302 {"bits": [28, 31], "name": "S7_Y"} array
13307 {"bits": [0, 3], "name": "S8_X"}, array
13308 {"bits": [4, 7], "name": "S8_Y"}, array
13309 {"bits": [8, 11], "name": "S9_X"}, array
13310 {"bits": [12, 15], "name": "S9_Y"}, array
13311 {"bits": [16, 19], "name": "S10_X"}, array
13312 {"bits": [20, 23], "name": "S10_Y"}, array
13313 {"bits": [24, 27], "name": "S11_X"}, array
13314 {"bits": [28, 31], "name": "S11_Y"} array
13319 {"bits": [0, 3], "name": "S12_X"}, array
13320 {"bits": [4, 7], "name": "S12_Y"}, array
13321 {"bits": [8, 11], "name": "S13_X"}, array
13322 {"bits": [12, 15], "name": "S13_Y"}, array
13323 {"bits": [16, 19], "name": "S14_X"}, array
13324 {"bits": [20, 23], "name": "S14_Y"}, array
13325 {"bits": [24, 27], "name": "S15_X"}, array
13326 {"bits": [28, 31], "name": "S15_Y"} array
13331 {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"}, array
13332 {"bits": [2, 2], "name": "BIN_SIZE_X"}, array
13333 {"bits": [3, 3], "name": "BIN_SIZE_Y"}, array
13334 {"bits": [4, 6], "name": "BIN_SIZE_X_EXTEND"}, array
13335 {"bits": [7, 9], "name": "BIN_SIZE_Y_EXTEND"}, array
13336 {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"}, array
13337 {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"}, array
13338 {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"}, array
13339 {"bits": [19, 26], "name": "FPOVS_PER_BATCH"}, array
13340 {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"}, array
13341 {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"} array
13346 {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"}, array
13347 {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"} array
13352 {"bits": [0, 3], "name": "DISTANCE_0"}, array
13353 {"bits": [4, 7], "name": "DISTANCE_1"}, array
13354 {"bits": [8, 11], "name": "DISTANCE_2"}, array
13355 {"bits": [12, 15], "name": "DISTANCE_3"}, array
13356 {"bits": [16, 19], "name": "DISTANCE_4"}, array
13357 {"bits": [20, 23], "name": "DISTANCE_5"}, array
13358 {"bits": [24, 27], "name": "DISTANCE_6"}, array
13359 {"bits": [28, 31], "name": "DISTANCE_7"} array
13364 {"bits": [0, 3], "name": "DISTANCE_8"}, array
13365 {"bits": [4, 7], "name": "DISTANCE_9"}, array
13366 {"bits": [8, 11], "name": "DISTANCE_10"}, array
13367 {"bits": [12, 15], "name": "DISTANCE_11"}, array
13368 {"bits": [16, 19], "name": "DISTANCE_12"}, array
13369 {"bits": [20, 23], "name": "DISTANCE_13"}, array
13370 {"bits": [24, 27], "name": "DISTANCE_14"}, array
13371 {"bits": [28, 31], "name": "DISTANCE_15"} array
13376 {"bits": [0, 14], "name": "TL_X"}, array
13377 {"bits": [16, 30], "name": "TL_Y"} array
13382 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"} array
13387 {"bits": [0, 0], "name": "OVER_RAST_ENABLE"}, array
13388 {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"}, array
13389 {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"}, array
13390 {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"}, array
13391 {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"}, array
13392 {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"}, array
13393 {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"}, array
13394 {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"}, array
13395 {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"}, array
13396 {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"}, array
13397 {"bits": [16, 17], "name": "UNCERTAINTY_REGION_MODE"}, array
13398 {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"}, array
13399 {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"}, array
13400 {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"}, array
13401 {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"}, array
13402 {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"}, array
13403 {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"}, array
13404 {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"} array
13409 {"bits": [0, 3], "name": "ER_TRI"}, array
13410 {"bits": [4, 7], "name": "ER_POINT"}, array
13411 {"bits": [8, 11], "name": "ER_RECT"}, array
13412 {"bits": [12, 17], "name": "ER_LINE_LR"}, array
13413 {"bits": [18, 23], "name": "ER_LINE_RL"}, array
13414 {"bits": [24, 27], "name": "ER_LINE_TB"}, array
13415 {"bits": [28, 31], "name": "ER_LINE_BT"} array
13420 {"bits": [0, 7], "name": "TOP_QTR"}, array
13421 {"bits": [8, 15], "name": "TOP_HALF"}, array
13422 {"bits": [16, 23], "name": "BOT_HALF"}, array
13423 {"bits": [24, 31], "name": "BOT_QTR"} array
13428 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"}, array
13429 {"bits": [10, 10], "name": "LAST_PIXEL"}, array
13430 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"}, array
13431 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}, array
13432 {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"} array
13437 {"bits": [0, 15], "name": "LINE_PATTERN"}, array
13438 {"bits": [16, 23], "name": "REPEAT_COUNT"}, array
13439 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"}, array
13440 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"} array
13445 {"bits": [0, 3], "name": "CURRENT_PTR"}, array
13446 {"bits": [8, 15], "name": "CURRENT_COUNT"} array
13451 {"bits": [0, 0], "name": "MSAA_ENABLE"}, array
13452 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"}, array
13453 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"}, array
13454 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}, array
13455 {"bits": [4, 4], "name": "SCALE_LINE_WIDTH_PAD"}, array
13456 {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"}, array
13457 {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"} array
13462 {"bits": [0, 0], "name": "WALK_SIZE"}, array
13463 {"bits": [1, 1], "name": "WALK_ALIGNMENT"}, array
13464 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"}, array
13465 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"}, array
13466 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"}, array
13467 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"}, array
13468 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"}, array
13469 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"}, array
13470 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"}, array
13471 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"}, array
13472 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"}, array
13473 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"}, array
13474 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"}, array
13475 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"}, array
13476 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"}, array
13477 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"}, array
13478 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"}, array
13479 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"}, array
13480 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"}, array
13481 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"}, array
13482 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"}, array
13483 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"}, array
13484 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"}, array
13485 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"} array
13490 {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"} array
13495 {"bits": [0, 13], "name": "X_COORD"} array
13500 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"}, array
13501 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"} array
13506 {"bits": [0, 15], "name": "COUNT"} array
13511 {"bits": [0, 13], "name": "Y_COORD"} array
13516 {"bits": [0, 9], "name": "PERF_SEL"} array
13521 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"}, array
13522 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"}, array
13523 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"}, array
13524 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"}, array
13525 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"}, array
13526 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"}, array
13527 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"}, array
13528 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"}, array
13529 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"}, array
13530 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"}, array
13531 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"}, array
13532 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"}, array
13533 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"}, array
13534 {"bits": [26, 28], "enum_ref": "SeXsel", "name": "SE_XSEL"}, array
13535 {"bits": [29, 31], "enum_ref": "SeYsel", "name": "SE_YSEL"} array
13540 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"}, array
13541 {"bits": [2, 4], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"}, array
13542 {"bits": [5, 7], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"} array
13547 {"bits": [0, 7], "name": "LEFT_QTR"}, array
13548 {"bits": [8, 15], "name": "LEFT_HALF"}, array
13549 {"bits": [16, 23], "name": "RIGHT_HALF"}, array
13550 {"bits": [24, 31], "name": "RIGHT_QTR"} array
13555 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"}, array
13556 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"} array
13561 {"bits": [0, 15], "name": "X"}, array
13562 {"bits": [16, 31], "name": "Y"} array
13567 {"bits": [0, 15], "name": "BR_X"}, array
13568 {"bits": [16, 31], "name": "BR_Y"} array
13573 {"bits": [0, 15], "name": "TL_X"}, array
13574 {"bits": [16, 31], "name": "TL_Y"} array
13579 {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"}, array
13580 {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"}, array
13581 {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"} array
13586 {"bits": [0, 0], "name": "ENABLE"}, array
13587 {"bits": [1, 2], "name": "NUM_SE"}, array
13588 {"bits": [5, 6], "name": "NUM_RB_PER_SE"} array
13593 {"bits": [0, 31], "name": "VPORT_ZMAX"} array
13598 {"bits": [0, 31], "name": "VPORT_ZMIN"} array
13603 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"}, array
13604 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"} array
13609 {"bits": [0, 14], "name": "BR_X"}, array
13610 {"bits": [16, 30], "name": "BR_Y"} array
13615 {"bits": [0, 14], "name": "TL_X"}, array
13616 {"bits": [16, 30], "name": "TL_Y"}, array
13617 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"} array
13622 {"bits": [0, 31], "name": "STEREO_X_OFFSET"} array
13627 {"bits": [0, 0], "name": "EN_STEREO"}, array
13628 {"bits": [1, 4], "name": "STEREO_MODE"}, array
13629 {"bits": [5, 7], "name": "RT_SLICE_MODE"}, array
13630 {"bits": [8, 9], "name": "RT_SLICE_OFFSET"}, array
13631 {"bits": [10, 12], "name": "VP_ID_MODE"}, array
13632 {"bits": [13, 16], "name": "VP_ID_OFFSET"} array
13637 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"}, array
13638 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"} array
13643 {"bits": [0, 15], "name": "WIDTH"} array
13648 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"}, array
13649 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"}, array
13650 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"}, array
13651 {"bits": [4, 4], "name": "DIAMOND_ADJUST"} array
13656 {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"} array
13661 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"} array
13666 {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"}, array
13667 {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"}, array
13668 {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"}, array
13669 {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"}, array
13670 {"bits": [4, 4], "name": "USE_PROVOKING_ZW"} array
13675 {"bits": [0, 15], "name": "PERFCOUNTER_HI"} array
13680 {"bits": [0, 9], "name": "PERF_SEL"}, array
13681 {"bits": [20, 23], "name": "CNTR_MODE"}, array
13682 {"bits": [28, 31], "name": "PERF_MODE"} array
13687 {"bits": [0, 15], "name": "MIN_SIZE"}, array
13688 {"bits": [16, 31], "name": "MAX_SIZE"} array
13693 {"bits": [0, 15], "name": "HEIGHT"}, array
13694 {"bits": [16, 31], "name": "WIDTH"} array
13699 {"bits": [0, 31], "name": "CLAMP"} array
13704 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"}, array
13705 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"} array
13710 {"bits": [0, 31], "name": "SCALE"} array
13715 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"}, array
13716 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"}, array
13717 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"}, array
13718 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"}, array
13719 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"}, array
13720 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"}, array
13721 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"}, array
13722 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"}, array
13723 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"}, array
13724 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"}, array
13725 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"} array
13730 {"bits": [0, 0], "name": "CULL_FRONT"}, array
13731 {"bits": [1, 1], "name": "CULL_BACK"}, array
13732 {"bits": [2, 2], "name": "FACE"}, array
13733 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"}, array
13734 …{"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_P… array
13735 …{"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_P… array
13736 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"}, array
13737 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"}, array
13738 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"}, array
13739 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"}, array
13740 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"}, array
13741 {"bits": [20, 20], "name": "PERSP_CORR_DIS"}, array
13742 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}, array
13743 {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"}, array
13744 {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"} array
13749 {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"}, array
13750 {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"}, array
13751 {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"}, array
13752 {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"}, array
13753 {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"}, array
13754 {"bits": [6, 6], "name": "SC_1XMSAA_COMPATIBLE_DISABLE"} array
13759 {"bits": [0, 0], "name": "PIX_CENTER"}, array
13760 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"}, array
13761 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"} array
13766 {"bits": [0, 3], "name": "FEATURE_SEL"}, array
13767 {"bits": [4, 7], "name": "SE_INDEX"}, array
13768 {"bits": [8, 11], "name": "SH_INDEX"}, array
13769 {"bits": [12, 15], "name": "CU_INDEX"}, array
13770 {"bits": [16, 17], "name": "EVENT_SEL"}, array
13771 {"bits": [18, 19], "name": "UNUSED"}, array
13772 {"bits": [20, 20], "name": "ENABLE"}, array
13773 {"bits": [21, 31], "name": "RESERVED"} array
13778 {"bits": [0, 0], "name": "ENABLE"}, array
13779 {"bits": [1, 1], "name": "MODE_SELECT"}, array
13780 {"bits": [2, 2], "name": "RESET"}, array
13781 {"bits": [3, 31], "name": "RESERVED"} array
13786 {"bits": [0, 3], "name": "VFID"}, array
13787 {"bits": [4, 5], "name": "CNT_ID"}, array
13788 {"bits": [6, 31], "name": "RESERVED"} array
13793 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"} array
13798 {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"} array
13803 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, array
13804 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} array
13809 {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"}, array
13810 {"bits": [8, 31], "name": "RESERVED"} array
13815 {"bits": [0, 11], "name": "RESERVED1"}, array
13816 {"bits": [12, 13], "name": "PERFMON_RING_MODE"}, array
13817 {"bits": [14, 15], "name": "RESERVED"}, array
13818 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"} array
13823 {"bits": [0, 15], "name": "RING_BASE_HI"}, array
13824 {"bits": [16, 31], "name": "RESERVED"} array
13829 {"bits": [0, 31], "name": "RING_BASE_LO"} array
13834 {"bits": [0, 31], "name": "RING_BASE_SIZE"} array
13839 {"bits": [0, 7], "name": "PERFMON_MAX_SAMPLE_DELAY"}, array
13840 {"bits": [8, 31], "name": "RESERVED"} array
13845 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, array
13846 {"bits": [8, 10], "name": "RESERVED1"}, array
13847 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"}, array
13848 {"bits": [16, 20], "name": "SE0_NUM_LINE"}, array
13849 {"bits": [21, 25], "name": "SE1_NUM_LINE"}, array
13850 {"bits": [26, 30], "name": "SE2_NUM_LINE"}, array
13851 {"bits": [31, 31], "name": "RESERVED"} array
13856 {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"} array
13861 {"bits": [0, 31], "name": "NUM_SEGMENT_THRESHOLD"} array
13866 {"bits": [0, 31], "name": "PERFMON_SEL_ADDR"} array
13871 {"bits": [0, 31], "name": "PERFMON_SEL_DATA"} array
13876 {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"}, array
13877 {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"}, array
13878 {"bits": [4, 5], "name": "TC_PERF_EN_SEL"}, array
13879 {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"}, array
13880 {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"}, array
13881 {"bits": [10, 13], "name": "PERF_COUNTER_CID"}, array
13882 {"bits": [14, 18], "name": "PERF_COUNTER_VMID"}, array
13883 {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"}, array
13884 {"bits": [25, 25], "name": "PERF_SOFT_RESET"}, array
13885 {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"} array
13890 {"bits": [0, 31], "name": "OBSOLETE_ADDR"} array
13895 {"bits": [0, 31], "name": "SCRATCH_REG0"} array
13900 {"bits": [0, 31], "name": "SCRATCH_REG1"} array
13905 {"bits": [0, 31], "name": "SCRATCH_REG2"} array
13910 {"bits": [0, 31], "name": "SCRATCH_REG3"} array
13915 {"bits": [0, 31], "name": "SCRATCH_REG4"} array
13920 {"bits": [0, 31], "name": "SCRATCH_REG5"} array
13925 {"bits": [0, 31], "name": "SCRATCH_REG6"} array
13930 {"bits": [0, 31], "name": "SCRATCH_REG7"} array
13935 {"bits": [0, 7], "name": "OBSOLETE_UMSK"}, array
13936 {"bits": [16, 17], "name": "OBSOLETE_SWAP"} array
13941 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"}, array
13942 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"}, array
13943 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"}, array
13944 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"}, array
13945 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"}, array
13946 {"bits": [20, 20], "name": "POS_FLOAT_ULC"}, array
13947 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"} array
13952 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"}, array
13953 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"}, array
13954 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"}, array
13955 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"}, array
13956 {"bits": [26, 26], "name": "RSRC_MGMT_RESET"}, array
13957 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}, array
13958 {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"}, array
13959 {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"}, array
13960 {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"} array
13965 {"bits": [0, 3], "name": "VTX_DONE_DELAY"}, array
13966 {"bits": [4, 4], "name": "INTERP_ONE_PRIM_PER_ROW"}, array
13967 {"bits": [5, 5], "name": "BATON_RESET_DISABLE"}, array
13968 {"bits": [6, 6], "name": "PC_LIMIT_ENABLE"}, array
13969 {"bits": [7, 7], "name": "PC_LIMIT_STRICT"}, array
13970 {"bits": [8, 8], "name": "CRC_SIMD_ID_WADDR_DISABLE"}, array
13971 {"bits": [9, 9], "name": "LBPW_CU_CHK_MODE"}, array
13972 {"bits": [10, 13], "name": "LBPW_CU_CHK_CNT"}, array
13973 {"bits": [14, 14], "name": "CSC_PWR_SAVE_DISABLE"}, array
13974 {"bits": [15, 15], "name": "CSG_PWR_SAVE_DISABLE"}, array
13975 {"bits": [16, 31], "name": "PC_LIMIT_SIZE"} array
13980 {"bits": [0, 3], "name": "CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD"}, array
13981 {"bits": [4, 7], "name": "CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD"} array
13986 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"}, array
13987 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"}, array
13988 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"}, array
13989 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"}, array
13990 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"}, array
13991 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"}, array
13992 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"} array
13997 {"bits": [0, 7], "name": "PERF_SEL"} array
14002 {"bits": [0, 3], "name": "BIN0_MIN"}, array
14003 {"bits": [4, 7], "name": "BIN0_MAX"}, array
14004 {"bits": [8, 11], "name": "BIN1_MIN"}, array
14005 {"bits": [12, 15], "name": "BIN1_MAX"}, array
14006 {"bits": [16, 19], "name": "BIN2_MIN"}, array
14007 {"bits": [20, 23], "name": "BIN2_MAX"}, array
14008 {"bits": [24, 27], "name": "BIN3_MIN"}, array
14009 {"bits": [28, 31], "name": "BIN3_MAX"} array
14014 {"bits": [0, 5], "name": "OFFSET"}, array
14015 {"bits": [8, 9], "name": "DEFAULT_VAL"}, array
14016 {"bits": [10, 10], "name": "FLAT_SHADE"}, array
14017 {"bits": [13, 16], "name": "CYL_WRAP"}, array
14018 {"bits": [17, 17], "name": "PT_SPRITE_TEX"}, array
14019 {"bits": [18, 18], "name": "DUP"}, array
14020 {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, array
14021 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, array
14022 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, array
14023 {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"}, array
14024 {"bits": [24, 24], "name": "ATTR0_VALID"}, array
14025 {"bits": [25, 25], "name": "ATTR1_VALID"} array
14030 {"bits": [0, 5], "name": "OFFSET"}, array
14031 {"bits": [8, 9], "name": "DEFAULT_VAL"}, array
14032 {"bits": [10, 10], "name": "FLAT_SHADE"}, array
14033 {"bits": [18, 18], "name": "DUP"}, array
14034 {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, array
14035 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, array
14036 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, array
14037 {"bits": [24, 24], "name": "ATTR0_VALID"}, array
14038 {"bits": [25, 25], "name": "ATTR1_VALID"} array
14043 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"}, array
14044 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"}, array
14045 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"}, array
14046 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"}, array
14047 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"}, array
14048 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"}, array
14049 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"}, array
14050 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"}, array
14051 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"}, array
14052 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"}, array
14053 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"}, array
14054 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"}, array
14055 {"bits": [12, 12], "name": "FRONT_FACE_ENA"}, array
14056 {"bits": [13, 13], "name": "ANCILLARY_ENA"}, array
14057 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"}, array
14058 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"} array
14063 {"bits": [0, 5], "name": "NUM_INTERP"}, array
14064 {"bits": [6, 6], "name": "PARAM_GEN"}, array
14065 {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"}, array
14066 {"bits": [8, 8], "name": "LATE_PC_DEALLOC"}, array
14067 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"} array
14072 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"}, array
14073 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"}, array
14074 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"}, array
14075 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"}, array
14076 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"}, array
14077 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"}, array
14078 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"}, array
14079 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"} array
14084 {"bits": [0, 5], "name": "LIMIT"} array
14089 {"bits": [0, 7], "name": "MEM_BASE"} array
14094 {"bits": [0, 31], "name": "MEM_BASE"} array
14099 {"bits": [0, 5], "name": "VGPRS"}, array
14100 {"bits": [6, 9], "name": "SGPRS"}, array
14101 {"bits": [10, 11], "name": "PRIORITY"}, array
14102 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
14103 {"bits": [20, 20], "name": "PRIV"}, array
14104 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
14105 {"bits": [22, 22], "name": "DEBUG_MODE"}, array
14106 {"bits": [23, 23], "name": "IEEE_MODE"}, array
14107 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"}, array
14108 {"bits": [28, 28], "name": "CDBG_USER"}, array
14109 {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"}, array
14110 {"bits": [31, 31], "name": "FP16_OVFL"} array
14115 {"bits": [0, 5], "name": "VGPRS"}, array
14116 {"bits": [6, 9], "name": "SGPRS"}, array
14117 {"bits": [10, 11], "name": "PRIORITY"}, array
14118 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
14119 {"bits": [20, 20], "name": "PRIV"}, array
14120 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
14121 {"bits": [22, 22], "name": "DEBUG_MODE"}, array
14122 {"bits": [23, 23], "name": "IEEE_MODE"}, array
14123 {"bits": [27, 27], "name": "CDBG_USER"}, array
14124 {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"}, array
14125 {"bits": [30, 30], "name": "FP16_OVFL"} array
14130 {"bits": [0, 5], "name": "VGPRS"}, array
14131 {"bits": [6, 9], "name": "SGPRS"}, array
14132 {"bits": [10, 11], "name": "PRIORITY"}, array
14133 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
14134 {"bits": [20, 20], "name": "PRIV"}, array
14135 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
14136 {"bits": [22, 22], "name": "DEBUG_MODE"}, array
14137 {"bits": [23, 23], "name": "IEEE_MODE"}, array
14138 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"}, array
14139 {"bits": [28, 28], "name": "CDBG_USER"}, array
14140 {"bits": [29, 29], "name": "FP16_OVFL"} array
14145 {"bits": [0, 5], "name": "VGPRS"}, array
14146 {"bits": [6, 9], "name": "SGPRS"}, array
14147 {"bits": [10, 11], "name": "PRIORITY"}, array
14148 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, array
14149 {"bits": [20, 20], "name": "PRIV"}, array
14150 {"bits": [21, 21], "name": "DX10_CLAMP"}, array
14151 {"bits": [22, 22], "name": "DEBUG_MODE"}, array
14152 {"bits": [23, 23], "name": "IEEE_MODE"}, array
14153 {"bits": [24, 25], "name": "VGPR_COMP_CNT"}, array
14154 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"}, array
14155 {"bits": [30, 30], "name": "CDBG_USER"}, array
14156 {"bits": [31, 31], "name": "FP16_OVFL"} array
14161 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
14162 {"bits": [1, 5], "name": "USER_SGPR"}, array
14163 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
14164 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14165 {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"}, array
14166 {"bits": [18, 18], "name": "OC_LDS_EN"}, array
14167 {"bits": [19, 26], "name": "LDS_SIZE"}, array
14168 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
14169 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
14174 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
14175 {"bits": [1, 5], "name": "USER_SGPR"}, array
14176 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
14177 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14178 {"bits": [16, 17], "name": "VGPR_COMP_CNT"}, array
14179 {"bits": [18, 18], "name": "OC_LDS_EN"}, array
14180 {"bits": [19, 26], "name": "LDS_SIZE"}, array
14181 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
14182 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
14187 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
14188 {"bits": [1, 5], "name": "USER_SGPR"}, array
14189 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
14190 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14191 {"bits": [16, 24], "name": "LDS_SIZE"}, array
14192 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
14193 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
14198 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
14199 {"bits": [1, 5], "name": "USER_SGPR"}, array
14200 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
14201 {"bits": [7, 7], "name": "WAVE_CNT_EN"}, array
14202 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"}, array
14203 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14204 {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"}, array
14205 {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"}, array
14206 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
14207 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
14212 {"bits": [0, 0], "name": "SCRATCH_EN"}, array
14213 {"bits": [1, 5], "name": "USER_SGPR"}, array
14214 {"bits": [6, 6], "name": "TRAP_PRESENT"}, array
14215 {"bits": [7, 7], "name": "OC_LDS_EN"}, array
14216 {"bits": [8, 8], "name": "SO_BASE0_EN"}, array
14217 {"bits": [9, 9], "name": "SO_BASE1_EN"}, array
14218 {"bits": [10, 10], "name": "SO_BASE2_EN"}, array
14219 {"bits": [11, 11], "name": "SO_BASE3_EN"}, array
14220 {"bits": [12, 12], "name": "SO_EN"}, array
14221 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14222 {"bits": [22, 22], "name": "PC_BASE_EN"}, array
14223 {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}, array
14224 {"bits": [27, 27], "name": "SKIP_USGPR0"}, array
14225 {"bits": [28, 28], "name": "USER_SGPR_MSB"} array
14230 {"bits": [0, 5], "name": "WAVE_LIMIT"}, array
14231 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"}, array
14232 {"bits": [10, 13], "name": "SIMD_DISABLE"}, array
14233 {"bits": [16, 31], "name": "CU_EN"} array
14238 {"bits": [0, 15], "name": "CU_EN"}, array
14239 {"bits": [16, 21], "name": "WAVE_LIMIT"}, array
14240 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}, array
14241 {"bits": [26, 29], "name": "SIMD_DISABLE"} array
14246 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"}, array
14247 {"bits": [7, 13], "name": "SPI_SHADER_LATE_ALLOC_GS"} array
14252 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"} array
14257 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"}, array
14258 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"}, array
14259 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"}, array
14260 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"} array
14265 {"bits": [0, 31], "name": "DATA"} array
14270 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"} array
14275 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"}, array
14276 {"bits": [6, 6], "name": "VS_HALF_PACK"} array
14281 {"bits": [0, 1], "name": "PS_WAVE_GRAN"}, array
14282 {"bits": [2, 3], "name": "VS_WAVE_GRAN"}, array
14283 {"bits": [4, 5], "name": "GS_WAVE_GRAN"}, array
14284 {"bits": [6, 7], "name": "HS_WAVE_GRAN"} array
14289 {"bits": [0, 0], "name": "TARGET_INST"}, array
14290 {"bits": [1, 1], "name": "TARGET_DATA"}, array
14291 {"bits": [2, 2], "name": "INVALIDATE"}, array
14292 {"bits": [3, 3], "name": "WRITEBACK"}, array
14293 {"bits": [4, 4], "name": "VOL"}, array
14294 {"bits": [16, 16], "name": "COMPLETE"} array
14299 {"bits": [0, 0], "name": "DWB"}, array
14300 {"bits": [1, 1], "name": "DIRTY"} array
14305 {"bits": [0, 31], "name": "BASE_ADDRESS"} array
14310 {"bits": [0, 15], "name": "BASE_ADDRESS_HI"}, array
14311 {"bits": [16, 29], "name": "STRIDE"}, array
14312 {"bits": [30, 30], "name": "CACHE_SWIZZLE"}, array
14313 {"bits": [31, 31], "name": "SWIZZLE_ENABLE"} array
14318 {"bits": [0, 31], "name": "NUM_RECORDS"} array
14323 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"}, array
14324 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"}, array
14325 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"}, array
14326 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"}, array
14327 {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"}, array
14328 {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"}, array
14329 {"bits": [19, 19], "name": "USER_VM_ENABLE"}, array
14330 {"bits": [20, 20], "name": "USER_VM_MODE"}, array
14331 {"bits": [21, 22], "name": "INDEX_STRIDE"}, array
14332 {"bits": [23, 23], "name": "ADD_TID_ENABLE"}, array
14333 {"bits": [27, 27], "name": "NV"}, array
14334 {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"} array
14339 {"bits": [0, 7], "name": "BASE_ADDRESS_HI"}, array
14340 {"bits": [8, 19], "name": "MIN_LOD"}, array
14341 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"}, array
14342 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT_STENCIL", "name": "DATA_FORMAT_STENCIL"}, array
14343 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"}, array
14344 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT_FMASK", "name": "NUM_FORMAT_FMASK"}, array
14345 {"bits": [30, 30], "name": "NV"}, array
14346 {"bits": [31, 31], "name": "META_DIRECT"} array
14351 {"bits": [0, 13], "name": "WIDTH"}, array
14352 {"bits": [14, 27], "name": "HEIGHT"}, array
14353 {"bits": [28, 30], "name": "PERF_MOD"} array
14358 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"}, array
14359 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"}, array
14360 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"}, array
14361 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"}, array
14362 {"bits": [12, 15], "name": "BASE_LEVEL"}, array
14363 {"bits": [16, 19], "name": "LAST_LEVEL"}, array
14364 {"bits": [20, 24], "name": "SW_MODE"}, array
14365 {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"} array
14370 {"bits": [0, 12], "name": "DEPTH"}, array
14371 {"bits": [13, 28], "name": "PITCH"}, array
14372 {"bits": [29, 31], "enum_ref": "SQ_IMG_RSRC_WORD4__BC_SWIZZLE", "name": "BC_SWIZZLE"} array
14377 {"bits": [0, 12], "name": "BASE_ARRAY"}, array
14378 {"bits": [13, 16], "name": "ARRAY_PITCH"}, array
14379 {"bits": [17, 24], "name": "META_DATA_ADDRESS"}, array
14380 {"bits": [25, 25], "name": "META_LINEAR"}, array
14381 {"bits": [26, 26], "name": "META_PIPE_ALIGNED"}, array
14382 {"bits": [27, 27], "name": "META_RB_ALIGNED"}, array
14383 {"bits": [28, 31], "name": "MAX_MIP"} array
14388 {"bits": [0, 11], "name": "MIN_LOD_WARN"}, array
14389 {"bits": [12, 19], "name": "COUNTER_BANK_ID"}, array
14390 {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"}, array
14391 {"bits": [21, 21], "name": "COMPRESSION_EN"}, array
14392 {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"}, array
14393 {"bits": [23, 23], "name": "COLOR_TRANSFORM"}, array
14394 {"bits": [24, 27], "name": "LOST_ALPHA_BITS"}, array
14395 {"bits": [28, 31], "name": "LOST_COLOR_BITS"} array
14400 {"bits": [0, 31], "name": "META_DATA_ADDRESS"} array
14405 {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"}, array
14406 {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"}, array
14407 {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"}, array
14408 {"bits": [9, 11], "name": "MAX_ANISO_RATIO"}, array
14409 {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"}, array
14410 {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"}, array
14411 {"bits": [16, 18], "name": "ANISO_THRESHOLD"}, array
14412 {"bits": [19, 19], "name": "MC_COORD_TRUNC"}, array
14413 {"bits": [20, 20], "name": "FORCE_DEGAMMA"}, array
14414 {"bits": [21, 26], "name": "ANISO_BIAS"}, array
14415 {"bits": [27, 27], "name": "TRUNC_COORD"}, array
14416 {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"}, array
14417 {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"}, array
14418 {"bits": [31, 31], "name": "COMPAT_MODE"} array
14423 {"bits": [0, 11], "name": "MIN_LOD"}, array
14424 {"bits": [12, 23], "name": "MAX_LOD"}, array
14425 {"bits": [24, 27], "name": "PERF_MIP"}, array
14426 {"bits": [28, 31], "name": "PERF_Z"} array
14431 {"bits": [0, 13], "name": "LOD_BIAS"}, array
14432 {"bits": [14, 19], "name": "LOD_BIAS_SEC"}, array
14433 {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"}, array
14434 {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"}, array
14435 {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"}, array
14436 {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"}, array
14437 {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"}, array
14438 {"bits": [29, 29], "name": "BLEND_ZERO_PRT"}, array
14439 {"bits": [30, 30], "name": "FILTER_PREC_FIX"}, array
14440 {"bits": [31, 31], "name": "ANISO_OVERRIDE"} array
14445 {"bits": [0, 11], "name": "BORDER_COLOR_PTR"}, array
14446 {"bits": [12, 12], "name": "SKIP_DEGAMMA"}, array
14447 {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"} array
14452 {"bits": [0, 8], "name": "PERF_SEL"}, array
14453 {"bits": [12, 15], "name": "SQC_BANK_MASK"}, array
14454 {"bits": [16, 19], "name": "SQC_CLIENT_MASK"}, array
14455 {"bits": [20, 23], "name": "SPM_MODE"}, array
14456 {"bits": [24, 27], "name": "SIMD_MASK"}, array
14457 {"bits": [28, 31], "name": "PERF_MODE"} array
14462 {"bits": [0, 0], "name": "PS_EN"}, array
14463 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, array
14464 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, array
14465 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, array
14466 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, array
14467 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, array
14468 {"bits": [6, 6], "name": "CS_EN"}, array
14469 {"bits": [8, 12], "name": "CNTR_RATE"}, array
14470 {"bits": [13, 13], "name": "DISABLE_FLUSH"} array
14475 {"bits": [0, 0], "name": "FORCE_EN"} array
14480 {"bits": [0, 3], "name": "ADDR_HI"} array
14485 {"bits": [0, 31], "name": "CNTR"} array
14490 {"bits": [31, 31], "name": "RESET_BUFFER"} array
14495 {"bits": [0, 2], "name": "HIWATER"} array
14500 {"bits": [0, 4], "name": "CU_SEL"}, array
14501 {"bits": [5, 5], "name": "SH_SEL"}, array
14502 {"bits": [7, 7], "name": "REG_STALL_EN"}, array
14503 {"bits": [8, 11], "name": "SIMD_EN"}, array
14504 {"bits": [12, 13], "name": "VM_ID_MASK"}, array
14505 {"bits": [14, 14], "name": "SPI_STALL_EN"}, array
14506 {"bits": [15, 15], "name": "SQ_STALL_EN"} array
14511 {"bits": [0, 2], "name": "MASK_PS"}, array
14512 {"bits": [3, 5], "name": "MASK_VS"}, array
14513 {"bits": [6, 8], "name": "MASK_GS"}, array
14514 {"bits": [9, 11], "name": "MASK_ES"}, array
14515 {"bits": [12, 14], "name": "MASK_HS"}, array
14516 {"bits": [15, 17], "name": "MASK_LS"}, array
14517 {"bits": [18, 20], "name": "MASK_CS"}, array
14518 {"bits": [21, 22], "name": "MODE"}, array
14519 {"bits": [23, 24], "name": "CAPTURE_MODE"}, array
14520 {"bits": [25, 25], "name": "AUTOFLUSH_EN"}, array
14521 {"bits": [26, 26], "name": "TC_PERF_EN"}, array
14522 {"bits": [27, 28], "name": "ISSUE_MASK"}, array
14523 {"bits": [29, 29], "name": "TEST_MODE"}, array
14524 {"bits": [30, 30], "name": "INTERRUPT_EN"}, array
14525 {"bits": [31, 31], "name": "WRAP"} array
14530 {"bits": [0, 15], "name": "SH0_MASK"}, array
14531 {"bits": [16, 31], "name": "SH1_MASK"} array
14536 {"bits": [0, 21], "name": "SIZE"} array
14541 {"bits": [0, 9], "name": "FINISH_PENDING"}, array
14542 {"bits": [16, 25], "name": "FINISH_DONE"}, array
14543 {"bits": [28, 28], "name": "UTC_ERROR"}, array
14544 {"bits": [29, 29], "name": "NEW_BUF"}, array
14545 {"bits": [30, 30], "name": "BUSY"}, array
14546 {"bits": [31, 31], "name": "FULL"} array
14551 {"bits": [0, 15], "name": "TOKEN_MASK"}, array
14552 {"bits": [16, 23], "name": "REG_MASK"}, array
14553 {"bits": [24, 24], "name": "REG_DROP_ON_STALL"} array
14558 {"bits": [0, 31], "name": "INST_MASK"} array
14563 {"bits": [0, 29], "name": "WPTR"}, array
14564 {"bits": [30, 31], "name": "READ_OFFSET"} array
14569 {"bits": [0, 31], "name": "EXEC_HI"} array
14574 {"bits": [0, 31], "name": "EXEC_LO"} array
14579 {"bits": [0, 31], "name": "UNUSED"} array
14584 {"bits": [0, 5], "name": "VGPR_BASE"}, array
14585 {"bits": [8, 13], "name": "VGPR_SIZE"}, array
14586 {"bits": [16, 21], "name": "SGPR_BASE"}, array
14587 {"bits": [24, 27], "name": "SGPR_SIZE"} array
14592 {"bits": [0, 3], "name": "WAVE_ID"}, array
14593 {"bits": [4, 5], "name": "SIMD_ID"}, array
14594 {"bits": [6, 7], "name": "PIPE_ID"}, array
14595 {"bits": [8, 11], "name": "CU_ID"}, array
14596 {"bits": [12, 12], "name": "SH_ID"}, array
14597 {"bits": [13, 14], "name": "SE_ID"}, array
14598 {"bits": [16, 19], "name": "TG_ID"}, array
14599 {"bits": [20, 23], "name": "VM_ID"}, array
14600 {"bits": [24, 26], "name": "QUEUE_ID"}, array
14601 {"bits": [27, 29], "name": "STATE_ID"}, array
14602 {"bits": [30, 31], "name": "ME_ID"} array
14607 {"bits": [0, 2], "name": "IBUF_ST"}, array
14608 {"bits": [3, 3], "name": "PC_INVALID"}, array
14609 {"bits": [4, 4], "name": "NEED_NEXT_DW"}, array
14610 {"bits": [5, 7], "name": "NO_PREFETCH_CNT"}, array
14611 {"bits": [8, 9], "name": "IBUF_RPTR"}, array
14612 {"bits": [10, 11], "name": "IBUF_WPTR"}, array
14613 {"bits": [16, 19], "name": "INST_STR_ST"}, array
14614 {"bits": [24, 25], "name": "ECC_ST"}, array
14615 {"bits": [26, 26], "name": "IS_HYB"}, array
14616 {"bits": [27, 28], "name": "HYB_CNT"}, array
14617 {"bits": [29, 29], "name": "KILL"}, array
14618 {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}, array
14619 {"bits": [31, 31], "name": "NO_PREFETCH_CNT_HI"} array
14624 {"bits": [0, 0], "name": "IXNACK"}, array
14625 {"bits": [1, 1], "name": "XNACK"}, array
14626 {"bits": [2, 2], "name": "TA_NEED_RESET"}, array
14627 {"bits": [4, 8], "name": "XCNT"}, array
14628 {"bits": [11, 15], "name": "QCNT"}, array
14629 {"bits": [18, 22], "name": "RCNT"}, array
14630 {"bits": [25, 31], "name": "MISC_CNT"} array
14635 {"bits": [0, 3], "name": "VM_CNT"}, array
14636 {"bits": [4, 6], "name": "EXP_CNT"}, array
14637 {"bits": [8, 11], "name": "LGKM_CNT"}, array
14638 {"bits": [12, 14], "name": "VALU_CNT"}, array
14639 {"bits": [15, 15], "name": "FIRST_REPLAY"}, array
14640 {"bits": [16, 20], "name": "RCNT"}, array
14641 {"bits": [22, 23], "name": "VM_CNT_HI"} array
14646 {"bits": [0, 31], "name": "INST_DW0"} array
14651 {"bits": [0, 31], "name": "INST_DW1"} array
14656 {"bits": [0, 7], "name": "LDS_BASE"}, array
14657 {"bits": [12, 20], "name": "LDS_SIZE"} array
14662 {"bits": [0, 31], "name": "M0"} array
14667 {"bits": [0, 3], "name": "FP_ROUND"}, array
14668 {"bits": [4, 7], "name": "FP_DENORM"}, array
14669 {"bits": [8, 8], "name": "DX10_CLAMP"}, array
14670 {"bits": [9, 9], "name": "IEEE"}, array
14671 {"bits": [10, 10], "name": "LOD_CLAMPED"}, array
14672 {"bits": [11, 11], "name": "DEBUG_EN"}, array
14673 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, array
14674 {"bits": [23, 23], "name": "FP16_OVFL"}, array
14675 {"bits": [24, 24], "name": "POPS_PACKER0"}, array
14676 {"bits": [25, 25], "name": "POPS_PACKER1"}, array
14677 {"bits": [26, 26], "name": "DISABLE_PERF"}, array
14678 {"bits": [27, 27], "name": "GPR_IDX_EN"}, array
14679 {"bits": [28, 28], "name": "VSKIP"}, array
14680 {"bits": [29, 31], "name": "CSP"} array
14685 {"bits": [0, 15], "name": "PC_HI"} array
14690 {"bits": [0, 31], "name": "PC_LO"} array
14695 {"bits": [0, 0], "name": "SCC"}, array
14696 {"bits": [1, 2], "name": "SPI_PRIO"}, array
14697 {"bits": [3, 4], "name": "USER_PRIO"}, array
14698 {"bits": [5, 5], "name": "PRIV"}, array
14699 {"bits": [6, 6], "name": "TRAP_EN"}, array
14700 {"bits": [7, 7], "name": "TTRACE_EN"}, array
14701 {"bits": [8, 8], "name": "EXPORT_RDY"}, array
14702 {"bits": [9, 9], "name": "EXECZ"}, array
14703 {"bits": [10, 10], "name": "VCCZ"}, array
14704 {"bits": [11, 11], "name": "IN_TG"}, array
14705 {"bits": [12, 12], "name": "IN_BARRIER"}, array
14706 {"bits": [13, 13], "name": "HALT"}, array
14707 {"bits": [14, 14], "name": "TRAP"}, array
14708 {"bits": [15, 15], "name": "TTRACE_CU_EN"}, array
14709 {"bits": [16, 16], "name": "VALID"}, array
14710 {"bits": [17, 17], "name": "ECC_ERR"}, array
14711 {"bits": [18, 18], "name": "SKIP_EXPORT"}, array
14712 {"bits": [19, 19], "name": "PERF_EN"}, array
14713 {"bits": [20, 20], "name": "COND_DBG_USER"}, array
14714 {"bits": [21, 21], "name": "COND_DBG_SYS"}, array
14715 {"bits": [22, 22], "name": "ALLOW_REPLAY"}, array
14716 {"bits": [23, 23], "name": "FATAL_HALT"}, array
14717 {"bits": [27, 27], "name": "MUST_EXPORT"} array
14722 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"}, array
14723 {"bits": [10, 10], "name": "SAVECTX"}, array
14724 {"bits": [11, 11], "name": "ILLEGAL_INST"}, array
14725 {"bits": [12, 14], "name": "EXCP_HI"}, array
14726 {"bits": [16, 21], "name": "EXCP_CYCLE"}, array
14727 {"bits": [28, 28], "name": "XNACK_ERROR"}, array
14728 {"bits": [29, 31], "name": "DP_RATE"} array
14733 {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"}, array
14734 {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"}, array
14735 {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"}, array
14736 {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"}, array
14737 {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"}, array
14738 {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"}, array
14739 {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"}, array
14740 {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"}, array
14741 {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"}, array
14742 {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"}, array
14743 {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"}, array
14744 {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"}, array
14745 {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"}, array
14746 {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"}, array
14747 {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"}, array
14748 {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"}, array
14749 {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"} array
14754 {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"}, array
14755 {"bits": [4, 7], "name": "MRT1_EPSILON"}, array
14756 {"bits": [8, 11], "name": "MRT2_EPSILON"}, array
14757 {"bits": [12, 15], "name": "MRT3_EPSILON"}, array
14758 {"bits": [16, 19], "name": "MRT4_EPSILON"}, array
14759 {"bits": [20, 23], "name": "MRT5_EPSILON"}, array
14760 {"bits": [24, 27], "name": "MRT6_EPSILON"}, array
14761 {"bits": [28, 31], "name": "MRT7_EPSILON"} array
14766 {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"}, array
14767 {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"}, array
14768 {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"}, array
14769 {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"}, array
14770 {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"}, array
14771 {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"} array
14776 {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"}, array
14777 {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"}, array
14778 {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"}, array
14779 {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"}, array
14780 {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"}, array
14781 {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"}, array
14782 {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"}, array
14783 {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"} array
14788 {"bits": [0, 31], "name": "ADDRESS"} array
14793 {"bits": [0, 7], "name": "ADDRESS"} array
14798 {"bits": [0, 7], "name": "PERF_SEL"}, array
14799 {"bits": [10, 17], "name": "PERF_SEL1"}, array
14800 {"bits": [20, 23], "name": "CNTR_MODE"}, array
14801 {"bits": [24, 27], "name": "PERF_MODE1"}, array
14802 {"bits": [28, 31], "name": "PERF_MODE"} array
14807 {"bits": [0, 7], "name": "PERF_SEL2"}, array
14808 {"bits": [10, 17], "name": "PERF_SEL3"}, array
14809 {"bits": [24, 27], "name": "PERF_MODE3"}, array
14810 {"bits": [28, 31], "name": "PERF_MODE2"} array
14815 {"bits": [0, 7], "name": "PERF_SEL"}, array
14816 {"bits": [20, 23], "name": "CNTR_MODE"}, array
14817 {"bits": [28, 31], "name": "PERF_MODE"} array
14822 {"bits": [0, 9], "name": "PERF_SEL2"}, array
14823 {"bits": [10, 19], "name": "PERF_SEL3"}, array
14824 {"bits": [24, 27], "name": "PERF_MODE2"}, array
14825 {"bits": [28, 31], "name": "PERF_MODE3"} array
14830 {"bits": [0, 31], "name": "MATCH_INDEX"} array
14835 {"bits": [0, 31], "name": "BASE_ADDR"} array
14840 {"bits": [0, 15], "name": "BASE_ADDR"} array
14845 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, array
14846 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"}, array
14847 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"}, array
14848 {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, array
14849 {"bits": [8, 8], "name": "PRIMGEN_EN"}, array
14850 {"bits": [9, 9], "name": "NOT_EOP"}, array
14851 {"bits": [10, 10], "name": "REQ_PATH"} array
14856 {"bits": [0, 31], "name": "MAX_SIZE"} array
14861 {"bits": [0, 31], "name": "NUM_INSTANCES"} array
14866 {"bits": [0, 31], "name": "NUM_INDICES"} array
14871 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"}, array
14872 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"}, array
14873 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"}, array
14874 {"bits": [5, 5], "name": "NOT_EOP"}, array
14875 {"bits": [6, 6], "name": "USE_OPAQUE"}, array
14876 {"bits": [7, 7], "name": "UNROLLED_INST"}, array
14877 {"bits": [8, 8], "name": "GRBM_SKEW_NO_DEC"}, array
14878 {"bits": [29, 31], "name": "REG_RT_INDEX"} array
14883 {"bits": [0, 0], "name": "OBJPRIM_ID_EN"}, array
14884 {"bits": [1, 1], "name": "EN_REG_RT_INDEX"}, array
14885 {"bits": [2, 2], "name": "EN_PIPELINE_PRIMID"}, array
14886 {"bits": [3, 3], "name": "OBJECT_ID_INST_EN"} array
14891 {"bits": [0, 31], "name": "MISC"} array
14896 {"bits": [0, 14], "name": "ITEMSIZE"} array
14901 {"bits": [0, 10], "name": "ES_PER_GS"} array
14906 {"bits": [0, 27], "name": "ADDRESS_LOW"} array
14911 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"}, array
14912 {"bits": [10, 26], "name": "ADDRESS_HI"}, array
14913 {"bits": [27, 27], "name": "EXTENDED_EVENT"} array
14918 {"bits": [0, 3], "name": "DECR"} array
14923 {"bits": [0, 3], "name": "FIRST_DECR"} array
14928 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}, array
14929 {"bits": [14, 14], "name": "RETAIN_ORDER"}, array
14930 {"bits": [15, 15], "name": "RETAIN_QUADS"}, array
14931 {"bits": [16, 18], "name": "PRIM_ORDER"} array
14936 {"bits": [0, 0], "name": "COMP_X_EN"}, array
14937 {"bits": [1, 1], "name": "COMP_Y_EN"}, array
14938 {"bits": [2, 2], "name": "COMP_Z_EN"}, array
14939 {"bits": [3, 3], "name": "COMP_W_EN"}, array
14940 {"bits": [8, 15], "name": "STRIDE"}, array
14941 {"bits": [16, 23], "name": "SHIFT"} array
14946 {"bits": [0, 3], "name": "X_CONV"}, array
14947 {"bits": [4, 7], "name": "X_OFFSET"}, array
14948 {"bits": [8, 11], "name": "Y_CONV"}, array
14949 {"bits": [12, 15], "name": "Y_OFFSET"}, array
14950 {"bits": [16, 19], "name": "Z_CONV"}, array
14951 {"bits": [20, 23], "name": "Z_OFFSET"}, array
14952 {"bits": [24, 27], "name": "W_CONV"}, array
14953 {"bits": [28, 31], "name": "W_OFFSET"} array
14958 {"bits": [0, 14], "name": "OFFSET"} array
14963 {"bits": [0, 31], "name": "MEM_SIZE"} array
14968 {"bits": [0, 0], "name": "ENABLE"}, array
14969 {"bits": [2, 8], "name": "CNT"} array
14974 {"bits": [0, 15], "name": "MAX_PRIMS_PER_SUBGROUP"} array
14979 {"bits": [0, 10], "name": "MAX_VERT_OUT"} array
14984 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"}, array
14985 {"bits": [3, 3], "name": "RESERVED_0"}, array
14986 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"}, array
14987 {"bits": [6, 10], "name": "RESERVED_1"}, array
14988 {"bits": [11, 11], "name": "GS_C_PACK_EN"}, array
14989 {"bits": [12, 12], "name": "RESERVED_2"}, array
14990 {"bits": [13, 13], "name": "ES_PASSTHRU"}, array
14991 {"bits": [14, 14], "name": "RESERVED_3"}, array
14992 {"bits": [15, 15], "name": "RESERVED_4"}, array
14993 {"bits": [16, 16], "name": "RESERVED_5"}, array
14994 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"}, array
14995 {"bits": [18, 18], "name": "SUPPRESS_CUTS"}, array
14996 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"}, array
14997 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"}, array
14998 {"bits": [21, 22], "name": "ONCHIP"} array
15003 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"}, array
15004 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}, array
15005 {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"} array
15010 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"}, array
15011 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"}, array
15012 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"}, array
15013 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"}, array
15014 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"} array
15019 {"bits": [0, 10], "name": "GS_PER_ES"} array
15024 {"bits": [0, 3], "name": "GS_PER_VS"} array
15029 {"bits": [0, 1], "name": "TESS_MODE"} array
15034 {"bits": [0, 31], "name": "MAX_TESS"} array
15039 {"bits": [0, 31], "name": "MIN_TESS"} array
15044 {"bits": [0, 7], "name": "REUSE_DEPTH"} array
15049 {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"}, array
15050 …{"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANUL… array
15055 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, array
15056 {"bits": [8, 8], "name": "PRIMGEN_EN"} array
15061 {"bits": [0, 31], "name": "INDX_OFFSET"} array
15066 {"bits": [0, 31], "name": "INSTANCE_BASE_ID"} array
15071 {"bits": [0, 31], "name": "STEP_RATE"} array
15076 {"bits": [0, 7], "name": "NUM_PATCHES"}, array
15077 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"}, array
15078 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"} array
15083 {"bits": [0, 31], "name": "MAX_INDX"} array
15088 {"bits": [0, 31], "name": "MIN_INDX"} array
15093 {"bits": [0, 0], "name": "RESET_EN"}, array
15094 {"bits": [1, 1], "name": "MATCH_ALL_BITS"} array
15099 {"bits": [0, 31], "name": "RESET_INDX"} array
15104 {"bits": [0, 2], "name": "PATH_SELECT"} array
15109 {"bits": [0, 6], "name": "DEALLOC_DIST"} array
15114 {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"} array
15119 {"bits": [0, 0], "name": "PRIMITIVEID_EN"}, array
15120 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}, array
15121 {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"} array
15126 {"bits": [0, 31], "name": "VALUE"} array
15131 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"} array
15136 {"bits": [0, 0], "name": "REUSE_OFF"} array
15141 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, array
15142 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, array
15143 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, array
15144 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, array
15145 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, array
15146 {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"}, array
15147 {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"}, array
15148 {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"}, array
15149 {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}, array
15150 {"bits": [13, 13], "name": "PRIMGEN_EN"}, array
15151 {"bits": [14, 14], "name": "ORDERED_ID_MODE"}, array
15152 {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"}, array
15153 {"bits": [19, 20], "name": "GS_FAST_LAUNCH"} array
15158 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"}, array
15159 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"}, array
15160 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"}, array
15161 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"} array
15166 {"bits": [0, 31], "name": "OFFSET"} array
15171 {"bits": [0, 0], "name": "STREAMOUT_0_EN"}, array
15172 {"bits": [1, 1], "name": "STREAMOUT_1_EN"}, array
15173 {"bits": [2, 2], "name": "STREAMOUT_2_EN"}, array
15174 {"bits": [3, 3], "name": "STREAMOUT_3_EN"}, array
15175 {"bits": [4, 6], "name": "RAST_STREAM"}, array
15176 {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"}, array
15177 {"bits": [8, 11], "name": "RAST_STREAM_MASK"}, array
15178 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"} array
15183 {"bits": [0, 8], "name": "VERTEX_STRIDE"} array
15188 {"bits": [0, 9], "name": "STRIDE"} array
15193 {"bits": [0, 7], "name": "ACCUM_ISOLINE"}, array
15194 {"bits": [8, 15], "name": "ACCUM_TRI"}, array
15195 {"bits": [16, 23], "name": "ACCUM_QUAD"}, array
15196 {"bits": [24, 28], "name": "DONUT_SPLIT"}, array
15197 {"bits": [29, 31], "name": "TRAP_SPLIT"} array
15202 {"bits": [0, 31], "name": "BASE"} array
15207 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"}, array
15208 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"}, array
15209 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"}, array
15210 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"}, array
15211 {"bits": [9, 9], "name": "DEPRECATED"}, array
15212 {"bits": [14, 14], "name": "DISABLE_DONUTS"}, array
15213 {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, array
15214 {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"} array
15219 {"bits": [0, 15], "name": "SIZE"} array
15224 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"} array
15229 {"bits": [0, 0], "name": "VTX_CNT_EN"} array
15234 {"bits": [0, 7], "name": "PERF_SEL"}, array
15235 {"bits": [28, 31], "name": "PERF_MODE"} array