Lines Matching refs:pipeline
155 v3dv_destroy_pipeline(struct v3dv_pipeline *pipeline, in v3dv_destroy_pipeline() argument
159 if (!pipeline) in v3dv_destroy_pipeline()
165 destroy_pipeline_stage(device, pipeline->vs, pAllocator); in v3dv_destroy_pipeline()
166 destroy_pipeline_stage(device, pipeline->vs_bin, pAllocator); in v3dv_destroy_pipeline()
167 destroy_pipeline_stage(device, pipeline->fs, pAllocator); in v3dv_destroy_pipeline()
168 destroy_pipeline_stage(device, pipeline->cs, pAllocator); in v3dv_destroy_pipeline()
170 if (pipeline->spill.bo) { in v3dv_destroy_pipeline()
171 assert(pipeline->spill.size_per_thread > 0); in v3dv_destroy_pipeline()
172 v3dv_bo_free(device, pipeline->spill.bo); in v3dv_destroy_pipeline()
175 if (pipeline->default_attribute_values) { in v3dv_destroy_pipeline()
176 v3dv_bo_free(device, pipeline->default_attribute_values); in v3dv_destroy_pipeline()
177 pipeline->default_attribute_values = NULL; in v3dv_destroy_pipeline()
180 if (pipeline->combined_index_map) in v3dv_destroy_pipeline()
181 _mesa_hash_table_destroy(pipeline->combined_index_map, NULL); in v3dv_destroy_pipeline()
183 if (pipeline->default_attribute_values) in v3dv_destroy_pipeline()
184 v3dv_bo_free(device, pipeline->default_attribute_values); in v3dv_destroy_pipeline()
186 vk_free2(&device->alloc, pAllocator, pipeline); in v3dv_destroy_pipeline()
195 V3DV_FROM_HANDLE(v3dv_pipeline, pipeline, _pipeline); in v3dv_DestroyPipeline()
197 if (!pipeline) in v3dv_DestroyPipeline()
200 v3dv_destroy_pipeline(pipeline, device, pAllocator); in v3dv_DestroyPipeline()
574 struct v3dv_pipeline *pipeline) in lower_load_push_constant() argument
585 struct v3dv_pipeline *pipeline, in lower_vulkan_resource_index() argument
604 &pipeline->ubo_map : &pipeline->ssbo_map; in lower_vulkan_resource_index()
638 pipeline_ensure_combined_index_map(struct v3dv_pipeline *pipeline) in pipeline_ensure_combined_index_map() argument
640 if (pipeline->combined_index_map == NULL) { in pipeline_ensure_combined_index_map()
641 pipeline->combined_index_map = in pipeline_ensure_combined_index_map()
643 pipeline->next_combined_index = 0; in pipeline_ensure_combined_index_map()
646 assert(pipeline->combined_index_map); in pipeline_ensure_combined_index_map()
648 return pipeline->combined_index_map; in pipeline_ensure_combined_index_map()
652 get_combined_index(struct v3dv_pipeline *pipeline, in get_combined_index() argument
656 struct hash_table *ht = pipeline_ensure_combined_index_map(pipeline); in get_combined_index()
663 uint32_t new_index = pipeline->next_combined_index; in get_combined_index()
664 pipeline->next_combined_index++; in get_combined_index()
666 pipeline->combined_index_to_key_map[new_index] = key; in get_combined_index()
667 _mesa_hash_table_insert(ht, &pipeline->combined_index_to_key_map[new_index], in get_combined_index()
675 struct v3dv_pipeline *pipeline, in lower_tex_src_to_offset() argument
745 &pipeline->sampler_map : &pipeline->texture_map, in lower_tex_src_to_offset()
760 struct v3dv_pipeline *pipeline, in lower_sampler() argument
767 lower_tex_src_to_offset(b, instr, texture_idx, pipeline, layout); in lower_sampler()
773 lower_tex_src_to_offset(b, instr, sampler_idx, pipeline, layout); in lower_sampler()
779 get_combined_index(pipeline, in lower_sampler()
793 struct v3dv_pipeline *pipeline, in lower_image_deref() argument
843 descriptor_map_add(&pipeline->texture_map, in lower_image_deref()
854 get_combined_index(pipeline, desc_index, V3DV_NO_SAMPLER_IDX); in lower_image_deref()
863 struct v3dv_pipeline *pipeline, in lower_intrinsic() argument
877 lower_load_push_constant(b, instr, pipeline); in lower_intrinsic()
878 pipeline->use_push_constants = true; in lower_intrinsic()
882 lower_vulkan_resource_index(b, instr, pipeline, layout); in lower_intrinsic()
910 lower_image_deref(b, instr, pipeline, layout); in lower_intrinsic()
920 struct v3dv_pipeline *pipeline, in lower_impl() argument
933 lower_sampler(&b, nir_instr_as_tex(instr), pipeline, layout); in lower_impl()
937 lower_intrinsic(&b, nir_instr_as_intrinsic(instr), pipeline, layout); in lower_impl()
950 struct v3dv_pipeline *pipeline, in lower_pipeline_layout_info() argument
957 progress |= lower_impl(function->impl, pipeline, layout); in lower_pipeline_layout_info()
1025 if (p_stage->pipeline->combined_index_map) { in pipeline_populate_v3d_key()
1026 hash_table_foreach(p_stage->pipeline->combined_index_map, entry) { in pipeline_populate_v3d_key()
1106 const bool rba = p_stage->pipeline->device->features.robustBufferAccess; in pipeline_populate_v3d_fs_key()
1142 p_stage->pipeline->sample_mask != (1 << V3D_MAX_SAMPLES) - 1; in pipeline_populate_v3d_fs_key()
1159 const struct v3dv_subpass *subpass = p_stage->pipeline->subpass; in pipeline_populate_v3d_fs_key()
1224 const bool rba = p_stage->pipeline->device->features.robustBufferAccess; in pipeline_populate_v3d_vs_key()
1248 struct v3dv_pipeline *pipeline = p_stage->pipeline; in pipeline_populate_v3d_vs_key() local
1249 struct v3dv_shader_variant *fs_variant = pipeline->fs->current_variant; in pipeline_populate_v3d_vs_key()
1281 struct v3dv_device *device = src->pipeline->device; in pipeline_stage_create_vs_bin()
1290 p_stage->pipeline = src->pipeline; in pipeline_stage_create_vs_bin()
1375 struct v3dv_pipeline *pipeline = p_stage->pipeline; in pipeline_hash_variant() local
1387 _mesa_sha1_update(&ctx, pipeline->vs->shader_sha1, in pipeline_hash_variant()
1388 sizeof(pipeline->vs->shader_sha1)); in pipeline_hash_variant()
1389 _mesa_sha1_update(&ctx, pipeline->fs->shader_sha1, in pipeline_hash_variant()
1390 sizeof(pipeline->fs->shader_sha1)); in pipeline_hash_variant()
1399 pipeline_check_spill_size(struct v3dv_pipeline *pipeline, in pipeline_check_spill_size() argument
1402 if (variant->prog_data.base->spill_size > pipeline->spill.size_per_thread) { in pipeline_check_spill_size()
1403 struct v3dv_device *device = pipeline->device; in pipeline_check_spill_size()
1412 if (pipeline->spill.bo) { in pipeline_check_spill_size()
1413 assert(pipeline->spill.size_per_thread > 0); in pipeline_check_spill_size()
1414 v3dv_bo_free(device, pipeline->spill.bo); in pipeline_check_spill_size()
1416 pipeline->spill.bo = in pipeline_check_spill_size()
1418 pipeline->spill.size_per_thread = variant->prog_data.base->spill_size; in pipeline_check_spill_size()
1509 struct v3dv_pipeline *pipeline = p_stage->pipeline; in v3dv_get_shader_variant() local
1510 struct v3dv_device *device = pipeline->device; in v3dv_get_shader_variant()
1515 v3dv_pipeline_cache_search_for_variant(pipeline, in v3dv_get_shader_variant()
1520 pipeline_check_spill_size(pipeline, variant); in v3dv_get_shader_variant()
1528 &pipeline->device->instance->physicalDevice; in v3dv_get_shader_variant()
1571 pipeline_check_spill_size(pipeline, variant); in v3dv_get_shader_variant()
1575 &pipeline->device->default_pipeline_cache; in v3dv_get_shader_variant()
1577 v3dv_pipeline_cache_upload_variant(pipeline, cache, variant); in v3dv_get_shader_variant()
1583 v3dv_pipeline_cache_upload_variant(pipeline, default_cache, variant); in v3dv_get_shader_variant()
1599 v3d_key_update_return_size(struct v3dv_pipeline *pipeline, in v3d_key_update_return_size() argument
1604 struct v3dv_descriptor_map *texture_map = &pipeline->texture_map; in v3d_key_update_return_size()
1637 if (!p_stage->pipeline->device->instance->default_pipeline_cache_enabled) { in pregenerate_shader_variants()
1645 v3d_key_update_return_size(p_stage->pipeline, key, 32); in pregenerate_shader_variants()
1654 v3dv_shader_variant_unref(p_stage->pipeline->device, variant_32); in pregenerate_shader_variants()
1751 pipeline_lower_nir(struct v3dv_pipeline *pipeline, in pipeline_lower_nir() argument
1758 NIR_PASS_V(p_stage->nir, lower_pipeline_layout_info, pipeline, layout); in pipeline_lower_nir()
1784 struct v3dv_pipeline *pipeline, in pipeline_stage_get_nir() argument
1789 nir = v3dv_pipeline_cache_search_for_nir(pipeline, cache, in pipeline_stage_get_nir()
1798 nir = shader_module_compile_to_nir(pipeline->device, p_stage); in pipeline_stage_get_nir()
1802 &pipeline->device->default_pipeline_cache; in pipeline_stage_get_nir()
1804 v3dv_pipeline_cache_upload_nir(pipeline, cache, nir, in pipeline_stage_get_nir()
1811 v3dv_pipeline_cache_upload_nir(pipeline, default_cache, nir, in pipeline_stage_get_nir()
1847 pipeline_compile_vertex_shader(struct v3dv_pipeline *pipeline, in pipeline_compile_vertex_shader() argument
1852 struct v3dv_pipeline_stage *p_stage = pipeline->vs; in pipeline_compile_vertex_shader()
1854 pipeline_lower_nir(pipeline, p_stage, pipeline->layout); in pipeline_compile_vertex_shader()
1858 assert(pipeline->fs); in pipeline_compile_vertex_shader()
1867 pipeline->vs_bin = pipeline_stage_create_vs_bin(pipeline->vs, pAllocator); in pipeline_compile_vertex_shader()
1868 if (pipeline->vs_bin == NULL) in pipeline_compile_vertex_shader()
1876 pipeline->vs->topology = vk_to_pipe_prim_type[ia_info->topology]; in pipeline_compile_vertex_shader()
1878 struct v3d_vs_key *key = &pipeline->vs->key.vs; in pipeline_compile_vertex_shader()
1879 pipeline_populate_v3d_vs_key(key, pCreateInfo, pipeline->vs); in pipeline_compile_vertex_shader()
1881 pipeline->vs->current_variant = in pipeline_compile_vertex_shader()
1882 pregenerate_shader_variants(pipeline->vs, cache, &key->base, sizeof(*key), in pipeline_compile_vertex_shader()
1887 key = &pipeline->vs_bin->key.vs; in pipeline_compile_vertex_shader()
1888 pipeline_populate_v3d_vs_key(key, pCreateInfo, pipeline->vs_bin); in pipeline_compile_vertex_shader()
1889 pipeline->vs_bin->current_variant = in pipeline_compile_vertex_shader()
1890 pregenerate_shader_variants(pipeline->vs_bin, cache, &key->base, sizeof(*key), in pipeline_compile_vertex_shader()
1897 pipeline_compile_fragment_shader(struct v3dv_pipeline *pipeline, in pipeline_compile_fragment_shader() argument
1902 struct v3dv_pipeline_stage *p_stage = pipeline->vs; in pipeline_compile_fragment_shader()
1904 p_stage = pipeline->fs; in pipeline_compile_fragment_shader()
1905 pipeline_lower_nir(pipeline, p_stage, pipeline->layout); in pipeline_compile_fragment_shader()
1910 get_ucp_enable_mask(pipeline->vs)); in pipeline_compile_fragment_shader()
1933 pipeline_compile_graphics(struct v3dv_pipeline *pipeline, in pipeline_compile_graphics() argument
1938 struct v3dv_device *device = pipeline->device; in pipeline_compile_graphics()
1966 p_stage->pipeline = pipeline; in pipeline_compile_graphics()
1980 pipeline->active_stages |= sinfo->stage; in pipeline_compile_graphics()
1982 p_stage->nir = pipeline_stage_get_nir(p_stage, pipeline, cache); in pipeline_compile_graphics()
1986 pipeline->vs = p_stage; in pipeline_compile_graphics()
1989 pipeline->fs = p_stage; in pipeline_compile_graphics()
1997 if (!pipeline->fs) { in pipeline_compile_graphics()
2010 p_stage->pipeline = pipeline; in pipeline_compile_graphics()
2025 pipeline->fs = p_stage; in pipeline_compile_graphics()
2026 pipeline->active_stages |= MESA_SHADER_FRAGMENT; in pipeline_compile_graphics()
2030 link_shaders(pipeline->vs->nir, pipeline->fs->nir); in pipeline_compile_graphics()
2035 vk_result = pipeline_compile_fragment_shader(pipeline, cache, in pipeline_compile_graphics()
2040 vk_result = pipeline_compile_vertex_shader(pipeline, cache, in pipeline_compile_graphics()
2048 pipeline->vpm_cfg_bin.As = 1; in pipeline_compile_graphics()
2049 pipeline->vpm_cfg_bin.Ve = 0; in pipeline_compile_graphics()
2050 pipeline->vpm_cfg_bin.Vc = in pipeline_compile_graphics()
2051 pipeline->vs_bin->current_variant->prog_data.vs->vcm_cache_size; in pipeline_compile_graphics()
2053 pipeline->vpm_cfg.As = 1; in pipeline_compile_graphics()
2054 pipeline->vpm_cfg.Ve = 0; in pipeline_compile_graphics()
2055 pipeline->vpm_cfg.Vc = in pipeline_compile_graphics()
2056 pipeline->vs->current_variant->prog_data.vs->vcm_cache_size; in pipeline_compile_graphics()
2096 struct v3dv_pipeline *pipeline, in pipeline_init_dynamic_state() argument
2103 pipeline->dynamic_state = default_dynamic_state; in pipeline_init_dynamic_state()
2104 struct v3dv_dynamic_state *dynamic = &pipeline->dynamic_state; in pipeline_init_dynamic_state()
2175 pipeline->dynamic_state.mask = dynamic_states; in pipeline_init_dynamic_state()
2220 pack_blend(struct v3dv_pipeline *pipeline, in pack_blend() argument
2230 pipeline->blend.enables = 0; in pack_blend()
2231 pipeline->blend.color_write_masks = 0; /* All channels enabled */ in pack_blend()
2236 assert(pipeline->subpass); in pack_blend()
2237 if (pipeline->subpass->color_count == 0) in pack_blend()
2240 assert(pipeline->subpass->color_count == cb_info->attachmentCount); in pack_blend()
2242 pipeline->blend.needs_color_constants = false; in pack_blend()
2244 for (uint32_t i = 0; i < pipeline->subpass->color_count; i++) { in pack_blend()
2249 pipeline->subpass->color_attachments[i].attachment; in pack_blend()
2259 &pipeline->pass->attachments[attachment_idx].desc; in pack_blend()
2264 pipeline->blend.enables |= rt_mask; in pack_blend()
2266 v3dv_pack(pipeline->blend.cfg[i], BLEND_CFG, config) { in pack_blend()
2272 &pipeline->blend.needs_color_constants); in pack_blend()
2275 &pipeline->blend.needs_color_constants); in pack_blend()
2280 &pipeline->blend.needs_color_constants); in pack_blend()
2283 &pipeline->blend.needs_color_constants); in pack_blend()
2287 pipeline->blend.color_write_masks = color_write_masks; in pack_blend()
2294 pack_cfg_bits(struct v3dv_pipeline *pipeline, in pack_cfg_bits() argument
2299 assert(sizeof(pipeline->cfg_bits) == cl_packet_length(CFG_BITS)); in pack_cfg_bits()
2301 pipeline->msaa = in pack_cfg_bits()
2304 v3dv_pack(pipeline->cfg_bits, CFG_BITS, config) { in pack_cfg_bits()
2329 config.rasterizer_oversample_mode = pipeline->msaa ? 1 : 0; in pack_cfg_bits()
2344 config.blend_enable = pipeline->blend.enables != 0; in pack_cfg_bits()
2348 pipeline->subpass->ds_attachment.attachment != VK_ATTACHMENT_UNUSED; in pack_cfg_bits()
2392 pack_single_stencil_cfg(struct v3dv_pipeline *pipeline, in pack_single_stencil_cfg() argument
2414 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_WRITE_MASK ? in pack_single_stencil_cfg()
2418 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_COMPARE_MASK ? in pack_single_stencil_cfg()
2422 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_COMPARE_MASK ? in pack_single_stencil_cfg()
2439 pack_stencil_cfg(struct v3dv_pipeline *pipeline, in pack_stencil_cfg() argument
2442 assert(sizeof(pipeline->stencil_cfg) == 2 * cl_packet_length(STENCIL_CFG)); in pack_stencil_cfg()
2447 if (pipeline->subpass->ds_attachment.attachment == VK_ATTACHMENT_UNUSED) in pack_stencil_cfg()
2459 if ((pipeline->dynamic_state.mask & dynamic_stencil_states) || in pack_stencil_cfg()
2466 pipeline->emit_stencil_cfg[0] = true; in pack_stencil_cfg()
2468 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[0], in pack_stencil_cfg()
2471 pipeline->emit_stencil_cfg[1] = true; in pack_stencil_cfg()
2472 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[0], in pack_stencil_cfg()
2474 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[1], in pack_stencil_cfg()
2487 enable_depth_bias(struct v3dv_pipeline *pipeline, in enable_depth_bias() argument
2490 pipeline->depth_bias.enabled = false; in enable_depth_bias()
2491 pipeline->depth_bias.is_z16 = false; in enable_depth_bias()
2499 assert(pipeline->pass && pipeline->subpass); in enable_depth_bias()
2500 struct v3dv_render_pass *pass = pipeline->pass; in enable_depth_bias()
2501 struct v3dv_subpass *subpass = pipeline->subpass; in enable_depth_bias()
2511 pipeline->depth_bias.is_z16 = true; in enable_depth_bias()
2513 pipeline->depth_bias.enabled = true; in enable_depth_bias()
2517 pipeline_set_ez_state(struct v3dv_pipeline *pipeline, in pipeline_set_ez_state() argument
2521 pipeline->ez_state = VC5_EZ_DISABLED; in pipeline_set_ez_state()
2528 pipeline->ez_state = VC5_EZ_LT_LE; in pipeline_set_ez_state()
2532 pipeline->ez_state = VC5_EZ_GT_GE; in pipeline_set_ez_state()
2536 pipeline->ez_state = VC5_EZ_UNDECIDED; in pipeline_set_ez_state()
2539 pipeline->ez_state = VC5_EZ_DISABLED; in pipeline_set_ez_state()
2547 pipeline->ez_state = VC5_EZ_DISABLED; in pipeline_set_ez_state()
2552 pack_shader_state_record(struct v3dv_pipeline *pipeline) in pack_shader_state_record() argument
2554 assert(sizeof(pipeline->shader_state_record) == in pack_shader_state_record()
2558 pipeline->fs->current_variant->prog_data.fs; in pack_shader_state_record()
2561 pipeline->vs->current_variant->prog_data.vs; in pack_shader_state_record()
2564 pipeline->vs_bin->current_variant->prog_data.vs; in pack_shader_state_record()
2573 v3dv_pack(pipeline->shader_state_record, GL_SHADER_STATE_RECORD, shader) { in pack_shader_state_record()
2577 pipeline->vs->topology == PIPE_PRIM_POINTS; in pack_shader_state_record()
2609 pipeline->sample_rate_shading || in pack_shader_state_record()
2610 (pipeline->msaa && prog_data_fs->force_per_sample_msaa); in pack_shader_state_record()
2657 pipeline->vpm_cfg_bin.As; in pack_shader_state_record()
2659 pipeline->vpm_cfg.As; in pack_shader_state_record()
2662 pipeline->vpm_cfg_bin.Ve; in pack_shader_state_record()
2664 pipeline->vpm_cfg.Ve; in pack_shader_state_record()
2699 pack_vcm_cache_size(struct v3dv_pipeline *pipeline) in pack_vcm_cache_size() argument
2701 assert(sizeof(pipeline->vcm_cache_size) == in pack_vcm_cache_size()
2704 v3dv_pack(pipeline->vcm_cache_size, VCM_CACHE_SIZE, vcm) { in pack_vcm_cache_size()
2705 vcm.number_of_16_vertex_batches_for_binning = pipeline->vpm_cfg_bin.Vc; in pack_vcm_cache_size()
2706 vcm.number_of_16_vertex_batches_for_rendering = pipeline->vpm_cfg.Vc; in pack_vcm_cache_size()
2762 create_default_attribute_values(struct v3dv_pipeline *pipeline, in create_default_attribute_values() argument
2767 if (pipeline->default_attribute_values == NULL) { in create_default_attribute_values()
2768 pipeline->default_attribute_values = v3dv_bo_alloc(pipeline->device, size, in create_default_attribute_values()
2772 if (!pipeline->default_attribute_values) { in create_default_attribute_values()
2779 bool ok = v3dv_bo_map(pipeline->device, in create_default_attribute_values()
2780 pipeline->default_attribute_values, size); in create_default_attribute_values()
2786 uint32_t *attrs = pipeline->default_attribute_values->map; in create_default_attribute_values()
2792 if (i < pipeline->va_count && vk_format_is_int(pipeline->va[i].vk_format)) { in create_default_attribute_values()
2799 v3dv_bo_unmap(pipeline->device, pipeline->default_attribute_values); in create_default_attribute_values()
2805 pack_shader_state_attribute_record(struct v3dv_pipeline *pipeline, in pack_shader_state_attribute_record() argument
2817 v3dv_pack(&pipeline->vertex_attrs[index * packet_length], in pack_shader_state_attribute_record()
2827 attr.instance_divisor = MIN2(pipeline->vb[binding].instance_divisor, in pack_shader_state_attribute_record()
2829 attr.stride = pipeline->vb[binding].stride; in pack_shader_state_attribute_record()
2835 pipeline_set_sample_mask(struct v3dv_pipeline *pipeline, in pipeline_set_sample_mask() argument
2838 pipeline->sample_mask = (1 << V3D_MAX_SAMPLES) - 1; in pipeline_set_sample_mask()
2845 pipeline->sample_mask &= ms_info->pSampleMask[0]; in pipeline_set_sample_mask()
2850 pipeline_set_sample_rate_shading(struct v3dv_pipeline *pipeline, in pipeline_set_sample_rate_shading() argument
2853 pipeline->sample_rate_shading = in pipeline_set_sample_rate_shading()
2859 pipeline_init(struct v3dv_pipeline *pipeline, in pipeline_init() argument
2867 pipeline->device = device; in pipeline_init()
2870 pipeline->layout = layout; in pipeline_init()
2874 pipeline->pass = render_pass; in pipeline_init()
2875 pipeline->subpass = &render_pass->subpasses[pCreateInfo->subpass]; in pipeline_init()
2898 pipeline_init_dynamic_state(pipeline, in pipeline_init()
2907 pack_blend(pipeline, cb_info); in pipeline_init()
2908 pack_cfg_bits(pipeline, ds_info, rs_info, ms_info); in pipeline_init()
2909 pack_stencil_cfg(pipeline, ds_info); in pipeline_init()
2910 pipeline_set_ez_state(pipeline, ds_info); in pipeline_init()
2911 enable_depth_bias(pipeline, rs_info); in pipeline_init()
2912 pipeline_set_sample_mask(pipeline, ms_info); in pipeline_init()
2913 pipeline_set_sample_rate_shading(pipeline, ms_info); in pipeline_init()
2915 pipeline->primitive_restart = in pipeline_init()
2918 result = pipeline_compile_graphics(pipeline, cache, pCreateInfo, pAllocator); in pipeline_init()
2927 pack_shader_state_record(pipeline); in pipeline_init()
2928 pack_vcm_cache_size(pipeline); in pipeline_init()
2933 pipeline->vb_count = vi_info->vertexBindingDescriptionCount; in pipeline_init()
2938 pipeline->vb[desc->binding].stride = desc->stride; in pipeline_init()
2939 pipeline->vb[desc->binding].instance_divisor = desc->inputRate; in pipeline_init()
2942 pipeline->va_count = 0; in pipeline_init()
2943 nir_shader *shader = pipeline->vs->nir; in pipeline_init()
2956 pipeline->va[driver_location].offset = desc->offset; in pipeline_init()
2957 pipeline->va[driver_location].binding = desc->binding; in pipeline_init()
2958 pipeline->va[driver_location].vk_format = desc->format; in pipeline_init()
2960 pack_shader_state_attribute_record(pipeline, driver_location, desc); in pipeline_init()
2962 pipeline->va_count++; in pipeline_init()
2966 if (!create_default_attribute_values(pipeline, vi_info)) in pipeline_init()
2982 struct v3dv_pipeline *pipeline; in graphics_pipeline_create() local
2989 pipeline = vk_zalloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, in graphics_pipeline_create()
2991 if (pipeline == NULL) in graphics_pipeline_create()
2994 result = pipeline_init(pipeline, device, cache, in graphics_pipeline_create()
2999 v3dv_destroy_pipeline(pipeline, device, pAllocator); in graphics_pipeline_create()
3003 *pPipeline = v3dv_pipeline_to_handle(pipeline); in graphics_pipeline_create()
3058 pipeline_compile_compute(struct v3dv_pipeline *pipeline, in pipeline_compile_compute() argument
3063 struct v3dv_device *device = pipeline->device; in pipeline_compile_compute()
3078 p_stage->pipeline = pipeline; in pipeline_compile_compute()
3090 p_stage->nir = pipeline_stage_get_nir(p_stage, pipeline, cache); in pipeline_compile_compute()
3092 pipeline->active_stages |= sinfo->stage; in pipeline_compile_compute()
3094 pipeline_lower_nir(pipeline, p_stage, pipeline->layout); in pipeline_compile_compute()
3097 pipeline->cs = p_stage; in pipeline_compile_compute()
3102 pipeline->device->features.robustBufferAccess); in pipeline_compile_compute()
3111 compute_pipeline_init(struct v3dv_pipeline *pipeline, in compute_pipeline_init() argument
3119 pipeline->device = device; in compute_pipeline_init()
3120 pipeline->layout = layout; in compute_pipeline_init()
3122 VkResult result = pipeline_compile_compute(pipeline, cache, info, alloc); in compute_pipeline_init()
3137 struct v3dv_pipeline *pipeline; in compute_pipeline_create() local
3144 pipeline = vk_zalloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, in compute_pipeline_create()
3146 if (pipeline == NULL) in compute_pipeline_create()
3149 result = compute_pipeline_init(pipeline, device, cache, in compute_pipeline_create()
3152 v3dv_destroy_pipeline(pipeline, device, pAllocator); in compute_pipeline_create()
3156 *pPipeline = v3dv_pipeline_to_handle(pipeline); in compute_pipeline_create()