Lines Matching refs:regid
568 uint8_t regid; member
592 uint8_t regid; member
862 uint8_t regid; member
887 if (regid_ != regid(63, 0)) { in ir3_link_add()
891 l->var[i].regid = regid_; in ir3_link_add()
911 const unsigned default_regid = pack_vs_out ? regid(63, 0) : regid(0, 0); in ir3_link_shaders()
945 ir3_link_add(l, k >= 0 ? vs->outputs[k].regid : default_regid, in ir3_link_shaders()
956 uint32_t regid = so->outputs[j].regid; in ir3_find_output_regid() local
958 regid |= HALF_REG_ID; in ir3_find_output_regid()
959 return regid; in ir3_find_output_regid()
961 return regid(63, 0); in ir3_find_output_regid()
975 return so->inputs[j].regid; in ir3_find_sysval_regid()
976 return regid(63, 0); in ir3_find_sysval_regid()