Lines Matching refs:xfer
680 struct drm_virtgpu_3d_transfer_from_host xfer; in virtio_gpu_bo_invalidate() local
693 memset(&xfer, 0, sizeof(xfer)); in virtio_gpu_bo_invalidate()
694 xfer.bo_handle = mapping->vma->handle; in virtio_gpu_bo_invalidate()
705 xfer.level = bo->meta.strides[0]; in virtio_gpu_bo_invalidate()
721 xfer.box.x = xfer_params.xfer_boxes[i].x; in virtio_gpu_bo_invalidate()
722 xfer.box.y = xfer_params.xfer_boxes[i].y; in virtio_gpu_bo_invalidate()
723 xfer.box.w = xfer_params.xfer_boxes[i].width; in virtio_gpu_bo_invalidate()
724 xfer.box.h = xfer_params.xfer_boxes[i].height; in virtio_gpu_bo_invalidate()
725 xfer.box.d = 1; in virtio_gpu_bo_invalidate()
727 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer); in virtio_gpu_bo_invalidate()
753 struct drm_virtgpu_3d_transfer_to_host xfer; in virtio_gpu_bo_flush() local
764 memset(&xfer, 0, sizeof(xfer)); in virtio_gpu_bo_flush()
765 xfer.bo_handle = mapping->vma->handle; in virtio_gpu_bo_flush()
771 xfer.level = bo->meta.strides[0]; in virtio_gpu_bo_flush()
786 xfer.box.x = xfer_params.xfer_boxes[i].x; in virtio_gpu_bo_flush()
787 xfer.box.y = xfer_params.xfer_boxes[i].y; in virtio_gpu_bo_flush()
788 xfer.box.w = xfer_params.xfer_boxes[i].width; in virtio_gpu_bo_flush()
789 xfer.box.h = xfer_params.xfer_boxes[i].height; in virtio_gpu_bo_flush()
790 xfer.box.d = 1; in virtio_gpu_bo_flush()
792 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer); in virtio_gpu_bo_flush()