21 		clrsetbits_le32((*ctrl)->control_pbias, SDCARD_PWRDNZ,  in isolate_io()
23 		clrsetbits_le32((*ctrl)->control_pbias, SDCARD_BIAS_PWRDNZ,  in isolate_io()
35 	clrsetbits_le32((*ctrl)->ctrl_core_sma_sw_0, CTRL_ISOLATE_MASK,  in isolate_io()
38 	readl((*ctrl)->ctrl_core_sma_sw_0);  in isolate_io()
149 	cpde = calculate_delay((*ctrl)->iodelay_config_base, CFG_REG_3_OFFSET,  in do_set_iodelay()
154 	fpde = calculate_delay((*ctrl)->iodelay_config_base, CFG_REG_4_OFFSET,  in do_set_iodelay()
179 	writel(CFG_IODELAY_UNLOCK_KEY, (*ctrl)->iodelay_config_base +  in __recalibrate_iodelay_start()
182 	ret = calibrate_iodelay((*ctrl)->iodelay_config_base);  in __recalibrate_iodelay_start()
190 	ret = update_delay_mechanism((*ctrl)->iodelay_config_base);  in __recalibrate_iodelay_start()
206 	if (readl((*ctrl)->ctrl_core_sma_sw_0) & CTRL_ISOLATE_MASK)  in __recalibrate_iodelay_end()
210 	writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base +  in __recalibrate_iodelay_end()
270 	do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads);  in __recalibrate_iodelay()
273 	ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays);  in __recalibrate_iodelay()
289 	writel(CFG_IODELAY_UNLOCK_KEY, (*ctrl)->iodelay_config_base +  in late_recalibrate_iodelay()
292 	ret = calibrate_iodelay((*ctrl)->iodelay_config_base);  in late_recalibrate_iodelay()
296 	ret = update_delay_mechanism((*ctrl)->iodelay_config_base);  in late_recalibrate_iodelay()
299 	do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads);  in late_recalibrate_iodelay()
302 	ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays);  in late_recalibrate_iodelay()
308 	writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base +  in late_recalibrate_iodelay()