Lines Matching refs:ctrl
59 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_lpddr2()
60 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_lpddr2()
61 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_lpddr2()
62 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_lpddr2()
63 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_lpddr2()
64 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_lpddr2()
65 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_lpddr2()
66 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); in io_settings_lpddr2()
67 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_lpddr2()
77 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch1_0); in io_settings_ddr3()
78 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_ddr3()
79 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_ddr3()
81 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch2_0); in io_settings_ddr3()
82 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_ddr3()
83 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_ddr3()
85 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_ddr3()
86 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); in io_settings_ddr3()
89 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_ddr3()
90 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_ddr3()
94 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_ddr3()
97 (*ctrl)->control_emif1_sdram_config_ext); in io_settings_ddr3()
100 (*ctrl)->control_emif2_sdram_config_ext); in io_settings_ddr3()
104 io_settings = (readl((*ctrl)->control_port_emif1_sdram_config) in io_settings_ddr3()
107 (*ctrl)->control_port_emif1_sdram_config); in io_settings_ddr3()
109 io_settings = (readl((*ctrl)->control_port_emif2_sdram_config) in io_settings_ddr3()
112 (*ctrl)->control_port_emif2_sdram_config); in io_settings_ddr3()
115 (*ctrl)->control_ddr_control_ext_0); in io_settings_ddr3()
130 io_settings = readl((*ctrl)->control_smart1io_padconf_0) & in do_io_settings()
134 writel(io_settings, (*ctrl)->control_smart1io_padconf_0); in do_io_settings()
138 io_settings = readl((*ctrl)->control_smart1io_padconf_1) & in do_io_settings()
141 writel(io_settings, (*ctrl)->control_smart1io_padconf_1); in do_io_settings()
145 io_settings = readl((*ctrl)->control_smart1io_padconf_2) & in do_io_settings()
148 writel(io_settings, (*ctrl)->control_smart1io_padconf_2); in do_io_settings()
152 io_settings = readl((*ctrl)->control_smart2io_padconf_0) & in do_io_settings()
155 writel(io_settings, (*ctrl)->control_smart2io_padconf_0); in do_io_settings()
159 io_settings = readl((*ctrl)->control_smart2io_padconf_1) & in do_io_settings()
162 writel(io_settings, (*ctrl)->control_smart2io_padconf_1); in do_io_settings()
166 io_settings = readl((*ctrl)->control_smart2io_padconf_2) & in do_io_settings()
169 writel(io_settings, (*ctrl)->control_smart2io_padconf_2); in do_io_settings()
174 io_settings = readl((*ctrl)->control_smart3io_padconf_1) & in do_io_settings()
179 writel(io_settings, (*ctrl)->control_smart3io_padconf_1); in do_io_settings()
210 srcomp_value = readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
215 writel(srcomp_value, (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
225 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
228 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
230 while (((readl((*ctrl)->control_srcomp_north_side + i*4) in srcomp_enable()
236 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
239 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
242 srcomp_value = readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
247 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
251 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
254 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
257 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
260 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
264 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
266 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
269 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
271 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
282 while (((readl((*ctrl)->control_srcomp_north_side + i*4) in srcomp_enable()
288 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
291 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
294 while (((readl((*ctrl)->control_srcomp_east_side_wkup) & in srcomp_enable()
299 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
301 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
315 (*ctrl)->control_emif1_sdram_config_ext); in config_data_eye_leveling_samples()
318 (*ctrl)->control_emif2_sdram_config_ext); in config_data_eye_leveling_samples()
412 die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0); in omap_die_id()
413 die_id[1] = readl((*ctrl)->control_std_fuse_die_id_1); in omap_die_id()
414 die_id[2] = readl((*ctrl)->control_std_fuse_die_id_2); in omap_die_id()
415 die_id[3] = readl((*ctrl)->control_std_fuse_die_id_3); in omap_die_id()
491 value = readl((*ctrl)->control_pbias); in vmmc_pbias_config()
493 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
496 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
500 value = readl((*ctrl)->control_pbias); in vmmc_pbias_config()
502 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
505 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()