10 void mpc85xx_config_via(struct pci_controller *hose,  in mpc85xx_config_via()  argument
17 	pci_hose_write_config_byte(hose, dev, 0x48, 0x08);  in mpc85xx_config_via()
19 	pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);  in mpc85xx_config_via()
21 	pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);  in mpc85xx_config_via()
22 	pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);  in mpc85xx_config_via()
23 	pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);  in mpc85xx_config_via()
32 	pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0);  in mpc85xx_config_via()
33 	pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0);  in mpc85xx_config_via()
34 	pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10);  in mpc85xx_config_via()
35 	pci_hose_write_config_word(hose, bridge, PCI_IO_LIMIT_UPPER16, 0);  in mpc85xx_config_via()
39 void mpc85xx_config_via_usbide(struct pci_controller *hose,  in mpc85xx_config_via_usbide()  argument
42 	pciauto_config_device(hose, dev);  in mpc85xx_config_via_usbide()
49 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1ff8);  in mpc85xx_config_via_usbide()
50 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1ff4);  in mpc85xx_config_via_usbide()
51 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_2, 0x1fe8);  in mpc85xx_config_via_usbide()
52 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_3, 0x1fe4);  in mpc85xx_config_via_usbide()
53 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1fd0);  in mpc85xx_config_via_usbide()
57 void mpc85xx_config_via_usb(struct pci_controller *hose,  in mpc85xx_config_via_usb()  argument
60 	pciauto_config_device(hose, dev);  in mpc85xx_config_via_usb()
62 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1fa0);  in mpc85xx_config_via_usb()
66 void mpc85xx_config_via_usb2(struct pci_controller *hose,  in mpc85xx_config_via_usb2()  argument
69 	pciauto_config_device(hose, dev);  in mpc85xx_config_via_usb2()
71 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1f80);  in mpc85xx_config_via_usb2()
75 void mpc85xx_config_via_power(struct pci_controller *hose,  in mpc85xx_config_via_power()  argument
78 	pciauto_config_device(hose, dev);  in mpc85xx_config_via_power()
80 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1e00);  in mpc85xx_config_via_power()
81 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1dfc);  in mpc85xx_config_via_power()
82 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_2, 0x1df8);  in mpc85xx_config_via_power()
86 void mpc85xx_config_via_ac97(struct pci_controller *hose,  in mpc85xx_config_via_ac97()  argument
89 	pciauto_config_device(hose, dev);  in mpc85xx_config_via_ac97()
91 	pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00);  in mpc85xx_config_via_ac97()