Lines Matching refs:regmap_write

862 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x20090496);  in meson_pcie_pll_set_rate()
863 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x30090496);  in meson_pcie_pll_set_rate()
864 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL1, 0x00000000);  in meson_pcie_pll_set_rate()
865 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL2, 0x00001100);  in meson_pcie_pll_set_rate()
866 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL3, 0x10058e00);  in meson_pcie_pll_set_rate()
867 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL4, 0x000100c0);  in meson_pcie_pll_set_rate()
868 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL5, 0x68000048);  in meson_pcie_pll_set_rate()
869 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL5, 0x68000068);  in meson_pcie_pll_set_rate()
871 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL4, 0x008100c0);  in meson_pcie_pll_set_rate()
873 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x34090496);  in meson_pcie_pll_set_rate()
874 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x14090496);  in meson_pcie_pll_set_rate()
876 	regmap_write(priv->map, HHI_PCIE_PLL_CNTL2, 0x00001000);  in meson_pcie_pll_set_rate()