Lines Matching refs:cru
421 void rk3399_configure_cpu_l(struct rk3399_cru *cru, in rk3399_configure_cpu_l() argument
429 rkclk_set_pll(&cru->apll_l_con[0], apll_l_cfgs[apll_l_freq]); in rk3399_configure_cpu_l()
443 rk_clrsetreg(&cru->clksel_con[0], in rk3399_configure_cpu_l()
450 rk_clrsetreg(&cru->clksel_con[1], in rk3399_configure_cpu_l()
456 void rk3399_configure_cpu_b(struct rk3399_cru *cru, in rk3399_configure_cpu_b() argument
464 rkclk_set_pll(&cru->apll_b_con[0], apll_b_cfgs[apll_b_freq]); in rk3399_configure_cpu_b()
478 rk_clrsetreg(&cru->clksel_con[2], in rk3399_configure_cpu_b()
485 rk_clrsetreg(&cru->clksel_con[3], in rk3399_configure_cpu_b()
508 static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_i2c_get_clk() argument
514 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
518 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
522 con = readl(&cru->clksel_con[63]); in rk3399_i2c_get_clk()
526 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
530 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
534 con = readl(&cru->clksel_con[63]); in rk3399_i2c_get_clk()
545 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_i2c_set_clk() argument
555 rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(1), in rk3399_i2c_set_clk()
559 rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(2), in rk3399_i2c_set_clk()
563 rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(3), in rk3399_i2c_set_clk()
567 rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(5), in rk3399_i2c_set_clk()
571 rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(6), in rk3399_i2c_set_clk()
575 rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(7), in rk3399_i2c_set_clk()
583 return rk3399_i2c_get_clk(cru, clk_id); in rk3399_i2c_set_clk()
622 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_spi_get_clk() argument
637 val = readl(&cru->clksel_con[spiclk->reg]); in rk3399_spi_get_clk()
644 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_spi_set_clk() argument
662 rk_clrsetreg(&cru->clksel_con[spiclk->reg], in rk3399_spi_set_clk()
668 return rk3399_spi_get_clk(cru, clk_id); in rk3399_spi_set_clk()
671 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz) in rk3399_vop_set_clk() argument
680 aclkreg_addr = &cru->clksel_con[47]; in rk3399_vop_set_clk()
681 dclkreg_addr = &cru->clksel_con[49]; in rk3399_vop_set_clk()
684 aclkreg_addr = &cru->clksel_con[48]; in rk3399_vop_set_clk()
685 dclkreg_addr = &cru->clksel_con[50]; in rk3399_vop_set_clk()
703 rkclk_set_pll(&cru->vpll_con[0], &vpll_config); in rk3399_vop_set_clk()
715 static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id) in rk3399_mmc_get_clk() argument
722 con = readl(&cru->clksel_con[16]); in rk3399_mmc_get_clk()
727 con = readl(&cru->clksel_con[21]); in rk3399_mmc_get_clk()
742 static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru, in rk3399_mmc_set_clk() argument
759 rk_clrsetreg(&cru->clksel_con[16], in rk3399_mmc_set_clk()
764 rk_clrsetreg(&cru->clksel_con[16], in rk3399_mmc_set_clk()
775 rk_clrsetreg(&cru->clksel_con[21], in rk3399_mmc_set_clk()
784 rk_clrsetreg(&cru->clksel_con[22], in rk3399_mmc_set_clk()
792 return rk3399_mmc_get_clk(cru, clk_id); in rk3399_mmc_set_clk()
795 static ulong rk3399_gmac_set_clk(struct rk3399_cru *cru, ulong rate) in rk3399_gmac_set_clk() argument
803 if (readl(&cru->clksel_con[19]) & BIT(4)) { in rk3399_gmac_set_clk()
820 static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru, in rk3399_ddr_set_clk() argument
861 rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg); in rk3399_ddr_set_clk()
866 static ulong rk3399_saradc_get_clk(struct rk3399_cru *cru) in rk3399_saradc_get_clk() argument
870 val = readl(&cru->clksel_con[26]); in rk3399_saradc_get_clk()
877 static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz) in rk3399_saradc_set_clk() argument
884 rk_clrsetreg(&cru->clksel_con[26], in rk3399_saradc_set_clk()
888 return rk3399_saradc_get_clk(cru); in rk3399_saradc_set_clk()
902 rate = rk3399_mmc_get_clk(priv->cru, clk->id); in rk3399_clk_get_rate()
910 rate = rk3399_i2c_get_clk(priv->cru, clk->id); in rk3399_clk_get_rate()
913 rate = rk3399_spi_get_clk(priv->cru, clk->id); in rk3399_clk_get_rate()
928 rate = rk3399_saradc_get_clk(priv->cru); in rk3399_clk_get_rate()
972 ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate); in rk3399_clk_set_rate()
975 ret = rk3399_gmac_set_clk(priv->cru, rate); in rk3399_clk_set_rate()
983 ret = rk3399_i2c_set_clk(priv->cru, clk->id, rate); in rk3399_clk_set_rate()
986 ret = rk3399_spi_set_clk(priv->cru, clk->id, rate); in rk3399_clk_set_rate()
994 ret = rk3399_vop_set_clk(priv->cru, clk->id, rate); in rk3399_clk_set_rate()
997 ret = rk3399_ddr_set_clk(priv->cru, rate); in rk3399_clk_set_rate()
1002 ret = rk3399_saradc_set_clk(priv->cru, rate); in rk3399_clk_set_rate()
1030 rk_clrreg(&priv->cru->clksel_con[19], BIT(4)); in rk3399_gmac_set_parent()
1046 rk_setreg(&priv->cru->clksel_con[19], BIT(4)); in rk3399_gmac_set_parent()
1074 static void rkclk_init(struct rk3399_cru *cru) in rkclk_init() argument
1080 rk3399_configure_cpu_l(cru, APLL_L_600_MHZ); in rkclk_init()
1081 rk3399_configure_cpu_b(cru, APLL_B_600_MHZ); in rkclk_init()
1087 rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101); in rkclk_init()
1088 rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f); in rkclk_init()
1089 rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003); in rkclk_init()
1092 rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg); in rkclk_init()
1093 rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg); in rkclk_init()
1107 rk_clrsetreg(&cru->clksel_con[14], in rkclk_init()
1127 rk_clrsetreg(&cru->clksel_con[23], in rkclk_init()
1144 rk_clrsetreg(&cru->clksel_con[25], in rkclk_init()
1161 priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]); in rk3399_clk_probe()
1163 rkclk_init(priv->cru); in rk3399_clk_probe()
1173 priv->cru = dev_read_addr_ptr(dev); in rk3399_clk_ofdata_to_platdata()