Lines Matching refs:clr
66 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_mii_init()
80 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
86 writel(EMAC_RMII_RESET, &emac_p->supp.clr); in pic32_mii_init()
144 writel(EMAC_FULLDUP, &emac_p->cfg2.clr); in pic32_mac_adjust_link()
153 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_adjust_link()
199 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_init()
241 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_ctrl_reset()
251 writel(0xffffffff, &ectl_p->irq.clr); in pic32_ctrl_reset()
254 writel(0xffffffff, &ectl_p->txst.clr); in pic32_ctrl_reset()
255 writel(0xffffffff, &ectl_p->rxst.clr); in pic32_ctrl_reset()
258 writel(0x00ff, &ectl_p->rxfc.clr); in pic32_ctrl_reset()
365 writel(ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_eth_stop()
376 writel(ETHCON_ON, &ectl_p->con1.clr); in pic32_eth_stop()
384 writel(0xffffffff, &ectl_p->irq.clr); in pic32_eth_stop()