Lines Matching refs:denali_pi
290 u32 *denali_pi = chan->pi->denali_pi; in set_memory_map() local
318 clrsetbits_le32(&denali_pi[199], 0xF, (12 - sdram_ch->cap_info.col)); in set_memory_map()
321 clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24), in set_memory_map()
335 clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24); in set_memory_map()
337 writel(0x2EC7FFFF, &denali_pi[34]); in set_memory_map()
893 u32 *denali_pi = chan->pi->denali_pi; in pctl_cfg() local
924 sdram_copy_to_reg(denali_pi, ¶ms->pi_regs.denali_pi[0], in pctl_cfg()
946 setbits_le32(&denali_pi[0], START); in pctl_cfg()
1082 u32 *denali_pi = chan->pi->denali_pi; in data_training_ca() local
1090 writel(0x00003f7c, (&denali_pi[175])); in data_training_ca()
1104 clrsetbits_le32(&denali_pi[100], 0x3 << 8, 0x2 << 8); in data_training_ca()
1107 clrsetbits_le32(&denali_pi[92], in data_training_ca()
1114 tmp = readl(&denali_pi[174]) >> 8; in data_training_ca()
1137 writel(0x00003f7c, (&denali_pi[175])); in data_training_ca()
1140 clrbits_le32(&denali_pi[100], 0x3 << 8); in data_training_ca()
1148 u32 *denali_pi = chan->pi->denali_pi; in data_training_wl() local
1155 writel(0x00003f7c, (&denali_pi[175])); in data_training_wl()
1161 clrsetbits_le32(&denali_pi[60], 0x3 << 8, 0x2 << 8); in data_training_wl()
1164 clrsetbits_le32(&denali_pi[59], in data_training_wl()
1171 tmp = readl(&denali_pi[174]) >> 8; in data_training_wl()
1198 writel(0x00003f7c, (&denali_pi[175])); in data_training_wl()
1202 clrbits_le32(&denali_pi[60], 0x3 << 8); in data_training_wl()
1210 u32 *denali_pi = chan->pi->denali_pi; in data_training_rg() local
1217 writel(0x00003f7c, (&denali_pi[175])); in data_training_rg()
1223 clrsetbits_le32(&denali_pi[80], 0x3 << 24, 0x2 << 24); in data_training_rg()
1229 clrsetbits_le32(&denali_pi[74], in data_training_rg()
1236 tmp = readl(&denali_pi[174]) >> 8; in data_training_rg()
1263 writel(0x00003f7c, (&denali_pi[175])); in data_training_rg()
1266 clrbits_le32(&denali_pi[80], 0x3 << 24); in data_training_rg()
1274 u32 *denali_pi = chan->pi->denali_pi; in data_training_rl() local
1279 writel(0x00003f7c, (&denali_pi[175])); in data_training_rl()
1285 clrsetbits_le32(&denali_pi[80], 0x3 << 16, 0x2 << 16); in data_training_rl()
1288 clrsetbits_le32(&denali_pi[74], in data_training_rl()
1295 tmp = readl(&denali_pi[174]) >> 8; in data_training_rl()
1311 writel(0x00003f7c, (&denali_pi[175])); in data_training_rl()
1314 clrbits_le32(&denali_pi[80], 0x3 << 16); in data_training_rl()
1322 u32 *denali_pi = chan->pi->denali_pi; in data_training_wdql() local
1328 writel(0x00003f7c, (&denali_pi[175])); in data_training_wdql()
1345 clrbits_le32(&denali_pi[117], 0x1 << 8); in data_training_wdql()
1347 clrsetbits_le32(&denali_pi[124], 0x3 << 16, 0x2 << 16); in data_training_wdql()
1350 clrsetbits_le32(&denali_pi[121], in data_training_wdql()
1357 tmp = readl(&denali_pi[174]) >> 8; in data_training_wdql()
1367 writel(0x00003f7c, (&denali_pi[175])); in data_training_wdql()
1370 clrbits_le32(&denali_pi[124], 0x3 << 16); in data_training_wdql()
1706 denali_pi_params = params->pi_regs.denali_pi; in modify_param()
1741 return reg ? &chan->pi->denali_pi : ¶ms->pi_regs.denali_pi; in get_denali_pi()
1898 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_dq_odt() local
1913 clrsetbits_le32(&denali_pi[132], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1914 clrsetbits_le32(&denali_pi[139], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1915 clrsetbits_le32(&denali_pi[147], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1916 clrsetbits_le32(&denali_pi[154], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1922 clrsetbits_le32(&denali_pi[129], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1923 clrsetbits_le32(&denali_pi[137], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1924 clrsetbits_le32(&denali_pi[144], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1925 clrsetbits_le32(&denali_pi[152], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1932 clrsetbits_le32(&denali_pi[127], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1933 clrsetbits_le32(&denali_pi[134], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1934 clrsetbits_le32(&denali_pi[142], 0x7 << 0, (reg_value << 0)); in set_lpddr4_dq_odt()
1935 clrsetbits_le32(&denali_pi[149], 0x7 << 16, (reg_value << 16)); in set_lpddr4_dq_odt()
1945 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_ca_odt() local
1960 clrsetbits_le32(&denali_pi[132], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1961 clrsetbits_le32(&denali_pi[139], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1962 clrsetbits_le32(&denali_pi[147], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1963 clrsetbits_le32(&denali_pi[154], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1969 clrsetbits_le32(&denali_pi[129], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1970 clrsetbits_le32(&denali_pi[137], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1971 clrsetbits_le32(&denali_pi[144], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1972 clrsetbits_le32(&denali_pi[152], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1979 clrsetbits_le32(&denali_pi[127], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1980 clrsetbits_le32(&denali_pi[134], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1981 clrsetbits_le32(&denali_pi[142], 0x7 << 4, reg_value << 4); in set_lpddr4_ca_odt()
1982 clrsetbits_le32(&denali_pi[149], 0x7 << 20, reg_value << 20); in set_lpddr4_ca_odt()
1992 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR3() local
2005 clrsetbits_le32(&denali_pi[131], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2006 clrsetbits_le32(&denali_pi[139], 0xFFFF, reg_value); in set_lpddr4_MR3()
2007 clrsetbits_le32(&denali_pi[146], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2008 clrsetbits_le32(&denali_pi[154], 0xFFFF, reg_value); in set_lpddr4_MR3()
2016 clrsetbits_le32(&denali_pi[129], 0xFFFF, reg_value); in set_lpddr4_MR3()
2017 clrsetbits_le32(&denali_pi[136], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2018 clrsetbits_le32(&denali_pi[144], 0xFFFF, reg_value); in set_lpddr4_MR3()
2019 clrsetbits_le32(&denali_pi[151], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2026 clrsetbits_le32(&denali_pi[126], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2027 clrsetbits_le32(&denali_pi[134], 0xFFFF, reg_value); in set_lpddr4_MR3()
2028 clrsetbits_le32(&denali_pi[141], 0xFFFF << 16, reg_value << 16); in set_lpddr4_MR3()
2029 clrsetbits_le32(&denali_pi[149], 0xFFFF, reg_value); in set_lpddr4_MR3()
2039 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR12() local
2054 clrsetbits_le32(&denali_pi[132], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2055 clrsetbits_le32(&denali_pi[139], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2056 clrsetbits_le32(&denali_pi[147], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2057 clrsetbits_le32(&denali_pi[154], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2063 clrsetbits_le32(&denali_pi[129], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2064 clrsetbits_le32(&denali_pi[137], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2065 clrsetbits_le32(&denali_pi[144], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2066 clrsetbits_le32(&denali_pi[152], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2075 clrsetbits_le32(&denali_pi[127], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2076 clrsetbits_le32(&denali_pi[134], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2077 clrsetbits_le32(&denali_pi[142], 0xFF << 8, reg_value << 8); in set_lpddr4_MR12()
2078 clrsetbits_le32(&denali_pi[149], 0xFF << 24, reg_value << 24); in set_lpddr4_MR12()
2088 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR14() local
2103 clrsetbits_le32(&denali_pi[132], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2104 clrsetbits_le32(&denali_pi[140], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2105 clrsetbits_le32(&denali_pi[147], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2106 clrsetbits_le32(&denali_pi[155], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2112 clrsetbits_le32(&denali_pi[130], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2113 clrsetbits_le32(&denali_pi[137], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2114 clrsetbits_le32(&denali_pi[145], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2115 clrsetbits_le32(&denali_pi[152], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2124 clrsetbits_le32(&denali_pi[127], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2125 clrsetbits_le32(&denali_pi[135], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2126 clrsetbits_le32(&denali_pi[142], 0xFF << 16, reg_value << 16); in set_lpddr4_MR14()
2127 clrsetbits_le32(&denali_pi[150], 0xFF << 0, reg_value << 0); in set_lpddr4_MR14()
2141 denali_pi_params = params->pi_regs.denali_pi; in lpddr4_modify_param()
2570 u32 *denali_pi = chan->pi->denali_pi; in dram_set_cs() local
2585 clrsetbits_le32(&denali_pi[41], in dram_set_cs()
2588 writel(0x2EC7FFFF, &denali_pi[34]); in dram_set_cs()
2605 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_col() local
2613 clrbits_le32(&denali_pi[199], 0xf); in dram_set_max_col()
2615 clrsetbits_le32(&denali_pi[155], in dram_set_max_col()
2631 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_bank() local
2636 clrbits_le32(&denali_pi[199], 0xf); in dram_set_max_bank()
2638 clrbits_le32(&denali_pi[155], (3 << 16)); in dram_set_max_bank()
2648 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_row() local
2655 clrsetbits_le32(&denali_pi[199], 0xf, 12 - 10); in dram_set_max_row()
2657 clrbits_le32(&denali_pi[155], in dram_set_max_row()