24 	struct cadence_spi_platdata *plat = bus->platdata;  in cadence_spi_write_speed()  local
28 					     plat->ref_clk_hz, hz);  in cadence_spi_write_speed()
31 	cadence_qspi_apb_delay(priv->regbase, plat->ref_clk_hz, hz,  in cadence_spi_write_speed()
32 			       plat->tshsl_ns, plat->tsd2d_ns,  in cadence_spi_write_speed()
33 			       plat->tchsh_ns, plat->tslch_ns);  in cadence_spi_write_speed()
120 	struct cadence_spi_platdata *plat = bus->platdata;  in cadence_spi_set_speed()  local
124 	if (hz > plat->max_hz)  in cadence_spi_set_speed()
125 		hz = plat->max_hz;  in cadence_spi_set_speed()
155 	struct cadence_spi_platdata *plat = bus->platdata;  in cadence_spi_probe()  local
159 	priv->regbase = plat->regbase;  in cadence_spi_probe()
160 	priv->ahbbase = plat->ahbbase;  in cadence_spi_probe()
169 		cadence_qspi_apb_controller_init(plat);  in cadence_spi_probe()
203 	struct cadence_spi_platdata *plat = bus->platdata;  in cadence_spi_xfer()  local
228 				    plat->is_decoded_cs);  in cadence_spi_xfer()
264 			err = cadence_qspi_apb_indirect_read_setup(plat,  in cadence_spi_xfer()
268 				(plat, data_bytes, din);  in cadence_spi_xfer()
273 				(plat, priv->cmd_len, dm_plat->mode, cmd_buf);  in cadence_spi_xfer()
276 				(plat, data_bytes, dout);  in cadence_spi_xfer()
296 	struct cadence_spi_platdata *plat = bus->platdata;  in cadence_spi_ofdata_to_platdata()  local
301 	plat->regbase = (void *)devfdt_get_addr_index(bus, 0);  in cadence_spi_ofdata_to_platdata()
302 	plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1);  in cadence_spi_ofdata_to_platdata()
303 	plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");  in cadence_spi_ofdata_to_platdata()
304 	plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);  in cadence_spi_ofdata_to_platdata()
305 	plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);  in cadence_spi_ofdata_to_platdata()
306 	plat->trigger_address = dev_read_u32_default(bus,  in cadence_spi_ofdata_to_platdata()
318 	plat->max_hz = ofnode_read_u32_default(subnode, "spi-max-frequency",  in cadence_spi_ofdata_to_platdata()
322 	plat->page_size = ofnode_read_u32_default(subnode, "page-size", 256);  in cadence_spi_ofdata_to_platdata()
323 	plat->block_size = ofnode_read_u32_default(subnode, "block-size", 16);  in cadence_spi_ofdata_to_platdata()
324 	plat->tshsl_ns = ofnode_read_u32_default(subnode, "cdns,tshsl-ns",  in cadence_spi_ofdata_to_platdata()
326 	plat->tsd2d_ns = ofnode_read_u32_default(subnode, "cdns,tsd2d-ns",  in cadence_spi_ofdata_to_platdata()
328 	plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20);  in cadence_spi_ofdata_to_platdata()
329 	plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20);  in cadence_spi_ofdata_to_platdata()
334 		plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK;  in cadence_spi_ofdata_to_platdata()
339 		plat->ref_clk_hz = clk_get_rate(&clk);  in cadence_spi_ofdata_to_platdata()
341 		if (IS_ERR_VALUE(plat->ref_clk_hz))  in cadence_spi_ofdata_to_platdata()
342 			return plat->ref_clk_hz;  in cadence_spi_ofdata_to_platdata()
346 	      __func__, plat->regbase, plat->ahbbase, plat->max_hz,  in cadence_spi_ofdata_to_platdata()
347 	      plat->page_size);  in cadence_spi_ofdata_to_platdata()