75 	u32 fifo_status;/* 014:QSPI_FIFO_STATUS register */  member
148 	debug("%s: FIFO STATUS = %08x\n", __func__, readl(&regs->fifo_status));  in tegra210_qspi_claim_bus()
224 	reg = readl(&regs->fifo_status);  in tegra210_qspi_xfer()
225 	writel(reg, &regs->fifo_status);  in tegra210_qspi_xfer()
228 	setbits_le32(&regs->fifo_status,  in tegra210_qspi_xfer()
233 	while ((tm && readl(&regs->fifo_status) &  in tegra210_qspi_xfer()
309 			u32 fifo_status, xfer_status;  in tegra210_qspi_xfer()  local
315 			fifo_status = readl(&regs->fifo_status);  in tegra210_qspi_xfer()
316 			if (fifo_status & QSPI_FIFO_STS_ERR) {  in tegra210_qspi_xfer()
318 				if (fifo_status & QSPI_FIFO_STS_TX_FIFO_OVF)  in tegra210_qspi_xfer()
320 				if (fifo_status & QSPI_FIFO_STS_TX_FIFO_UNR)  in tegra210_qspi_xfer()
322 				if (fifo_status & QSPI_FIFO_STS_RX_FIFO_OVF)  in tegra210_qspi_xfer()
324 				if (fifo_status & QSPI_FIFO_STS_RX_FIFO_UNR)  in tegra210_qspi_xfer()
326 				if (fifo_status & QSPI_FIFO_STS_TX_FIFO_FULL)  in tegra210_qspi_xfer()
328 				if (fifo_status & QSPI_FIFO_STS_TX_FIFO_EMPTY)  in tegra210_qspi_xfer()
330 				if (fifo_status & QSPI_FIFO_STS_RX_FIFO_FULL)  in tegra210_qspi_xfer()
332 				if (fifo_status & QSPI_FIFO_STS_RX_FIFO_EMPTY)  in tegra210_qspi_xfer()
338 			if (!(fifo_status & QSPI_FIFO_STS_RX_FIFO_EMPTY)) {  in tegra210_qspi_xfer()
353 		writel(readl(&regs->fifo_status), &regs->fifo_status);  in tegra210_qspi_xfer()
360 	      __func__, tmpdin, readl(&regs->fifo_status));  in tegra210_qspi_xfer()