43 	u8 portnum;	/* 0 or 1 */  member
72 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum),  in tegra_dp_disable_tx_pu()
81 	tegra_sor_write_field(sor, PR(sor->portnum), mask, pe_reg);  in tegra_dp_set_pe_vs_pc()
82 	tegra_sor_write_field(sor, DC(sor->portnum), mask, vs_reg);  in tegra_dp_set_pe_vs_pc()
84 		tegra_sor_write_field(sor, POSTCURSOR(sor->portnum), mask,  in tegra_dp_set_pe_vs_pc()
146 	reg_val = tegra_sor_readl(sor, DP_LINKCTL(sor->portnum));  in tegra_dc_sor_set_dp_linkctl()
159 	tegra_sor_writel(sor, DP_LINKCTL(sor->portnum), reg_val);  in tegra_dc_sor_set_dp_linkctl()
217 	reg_val = tegra_sor_readl(sor, DP_PADCTL(sor->portnum));  in tegra_dc_sor_power_dplanes()
235 		tegra_sor_writel(sor, DP_PADCTL(sor->portnum), reg_val);  in tegra_dc_sor_power_dplanes()
247 	reg_val = tegra_sor_readl(sor, DP_PADCTL(sor->portnum));  in tegra_dc_sor_set_panel_power()
254 	tegra_sor_writel(sor, DP_PADCTL(sor->portnum), reg_val);  in tegra_dc_sor_set_panel_power()
282 	reg_val = tegra_sor_readl(sor, DP_CONFIG(sor->portnum));  in tegra_dc_sor_set_dp_mode()
298 	tegra_sor_writel(sor, DP_CONFIG(sor->portnum), reg_val);  in tegra_dc_sor_set_dp_mode()
375 	reg_val = tegra_sor_readl(sor, DP_SPARE(sor->portnum));  in tegra_dc_sor_set_internal_panel()
383 	tegra_sor_writel(sor, DP_SPARE(sor->portnum), reg_val);  in tegra_dc_sor_set_internal_panel()
396 		DP_LINKCTL(sor->portnum));  in tegra_dc_sor_read_link_config()
430 	reg_val = tegra_sor_readl(sor, DP_LINKCTL(sor->portnum));  in tegra_dc_sor_set_lane_count()
449 	tegra_sor_writel(sor, DP_LINKCTL(sor->portnum), reg_val);  in tegra_dc_sor_set_lane_count()
476 	reg = tegra_sor_readl(sor, DP_PADCTL(sor->portnum));  in tegra_dc_sor_power_up()
496 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum),  in tegra_dc_sor_power_up()
835 	tegra_sor_writel(sor, LANE_DRIVE_CURRENT(sor->portnum),  in tegra_dc_sor_set_lane_parm()
837 	tegra_sor_writel(sor, PR(sor->portnum),  in tegra_dc_sor_set_lane_parm()
839 	tegra_sor_writel(sor, POSTCURSOR(sor->portnum),  in tegra_dc_sor_set_lane_parm()
846 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum),  in tegra_dc_sor_set_lane_parm()
853 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0xf0);  in tegra_dc_sor_set_lane_parm()
856 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0x0);  in tegra_dc_sor_set_lane_parm()
880 	tegra_sor_writel(sor, LANE_DRIVE_CURRENT(sor->portnum), drive_current);  in tegra_dc_sor_set_voltage_swing()
881 	tegra_sor_writel(sor, PR(sor->portnum), pre_emphasis);  in tegra_dc_sor_set_voltage_swing()
918 	tegra_sor_writel(sor, DP_PADCTL(sor->portnum), pad_ctrl);  in tegra_dc_sor_power_down_unused_lanes()
949 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum),  in tegra_sor_precharge_lanes()
953 	tegra_sor_write_field(sor, DP_PADCTL(sor->portnum),  in tegra_sor_precharge_lanes()