Lines Matching refs:pc
179 Address pc) const { in relative_code_target_object_handle_at() argument
180 Instruction* branch = Instruction::At(pc); in relative_code_target_object_handle_at()
222 Address pc, Address target, RelocInfo::Mode mode) { in deserialization_set_target_internal_reference_at() argument
223 Memory<Address>(pc) = target; in deserialization_set_target_internal_reference_at()
226 bool Assembler::is_constant_pool_load(Address pc) { in is_constant_pool_load() argument
227 return IsLdrPcImmediateOffset(Memory<int32_t>(pc)); in is_constant_pool_load()
230 Address Assembler::constant_pool_entry_address(Address pc, in constant_pool_entry_address() argument
232 DCHECK(Assembler::IsLdrPcImmediateOffset(Memory<int32_t>(pc))); in constant_pool_entry_address()
233 Instr instr = Memory<int32_t>(pc); in constant_pool_entry_address()
234 return pc + GetLdrRegisterImmediateOffset(instr) + Instruction::kPcLoadDelta; in constant_pool_entry_address()
237 Address Assembler::target_address_at(Address pc, Address constant_pool) { in target_address_at() argument
238 if (is_constant_pool_load(pc)) { in target_address_at()
240 return Memory<Address>(constant_pool_entry_address(pc, constant_pool)); in target_address_at()
241 } else if (CpuFeatures::IsSupported(ARMv7) && IsMovW(Memory<int32_t>(pc))) { in target_address_at()
243 DCHECK(IsMovW(Memory<int32_t>(pc)) && in target_address_at()
244 IsMovT(Memory<int32_t>(pc + kInstrSize))); in target_address_at()
245 Instruction* movw_instr = Instruction::At(pc); in target_address_at()
246 Instruction* movt_instr = Instruction::At(pc + kInstrSize); in target_address_at()
249 } else if (IsMovImmed(Memory<int32_t>(pc))) { in target_address_at()
251 DCHECK(IsMovImmed(Memory<int32_t>(pc)) && in target_address_at()
252 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) && in target_address_at()
253 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) && in target_address_at()
254 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize))); in target_address_at()
255 Instr mov_instr = instr_at(pc); in target_address_at()
256 Instr orr_instr_1 = instr_at(pc + kInstrSize); in target_address_at()
257 Instr orr_instr_2 = instr_at(pc + 2 * kInstrSize); in target_address_at()
258 Instr orr_instr_3 = instr_at(pc + 3 * kInstrSize); in target_address_at()
264 Instruction* branch = Instruction::At(pc); in target_address_at()
266 return pc + delta + Instruction::kPcLoadDelta; in target_address_at()
270 void Assembler::set_target_address_at(Address pc, Address constant_pool, in set_target_address_at() argument
273 if (is_constant_pool_load(pc)) { in set_target_address_at()
275 Memory<Address>(constant_pool_entry_address(pc, constant_pool)) = target; in set_target_address_at()
284 } else if (CpuFeatures::IsSupported(ARMv7) && IsMovW(Memory<int32_t>(pc))) { in set_target_address_at()
287 DCHECK(IsMovW(Memory<int32_t>(pc))); in set_target_address_at()
288 DCHECK(IsMovT(Memory<int32_t>(pc + kInstrSize))); in set_target_address_at()
289 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc); in set_target_address_at()
293 DCHECK(IsMovW(Memory<int32_t>(pc))); in set_target_address_at()
294 DCHECK(IsMovT(Memory<int32_t>(pc + kInstrSize))); in set_target_address_at()
296 FlushInstructionCache(pc, 2 * kInstrSize); in set_target_address_at()
298 } else if (IsMovImmed(Memory<int32_t>(pc))) { in set_target_address_at()
301 DCHECK(IsMovImmed(Memory<int32_t>(pc)) && in set_target_address_at()
302 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) && in set_target_address_at()
303 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) && in set_target_address_at()
304 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize))); in set_target_address_at()
305 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc); in set_target_address_at()
311 DCHECK(IsMovImmed(Memory<int32_t>(pc)) && in set_target_address_at()
312 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) && in set_target_address_at()
313 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) && in set_target_address_at()
314 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize))); in set_target_address_at()
316 FlushInstructionCache(pc, 4 * kInstrSize); in set_target_address_at()
319 intptr_t branch_offset = target - pc - Instruction::kPcLoadDelta; in set_target_address_at()
320 Instruction* branch = Instruction::At(pc); in set_target_address_at()
323 FlushInstructionCache(pc, kInstrSize); in set_target_address_at()