Lines Matching refs:SBit
417 void and_(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
419 void and_(Register dst, Register src1, Register src2, SBit s = LeaveCC,
422 void eor(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
424 void eor(Register dst, Register src1, Register src2, SBit s = LeaveCC,
427 void sub(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
429 void sub(Register dst, Register src1, Register src2, SBit s = LeaveCC,
432 void rsb(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
435 void add(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
437 void add(Register dst, Register src1, Register src2, SBit s = LeaveCC,
440 void adc(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
443 void sbc(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
446 void rsc(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
461 void orr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
463 void orr(Register dst, Register src1, Register src2, SBit s = LeaveCC,
466 void mov(Register dst, const Operand& src, SBit s = LeaveCC,
468 void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al);
479 void bic(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
482 void mvn(Register dst, const Operand& src, SBit s = LeaveCC,
487 void asr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
490 void lsl(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
493 void lsr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
499 SBit s = LeaveCC, Condition cond = al);
508 void mul(Register dst, Register src1, Register src2, SBit s = LeaveCC,
517 SBit s = LeaveCC, Condition cond = al);
520 SBit s = LeaveCC, Condition cond = al);
523 SBit s = LeaveCC, Condition cond = al);
526 SBit s = LeaveCC, Condition cond = al);