165       zero_reg, at, v0, v1, a0, a1, a2, a3, t0, t1, t2, t3, t4, t5, t6, t7,  in ToRegister()
653   Register nop_rt_reg = (type == 0) ? zero_reg : at;  in IsNop()
655               rd == static_cast<uint32_t>(ToNumber(zero_reg)) &&  in IsNop()
1491 void Assembler::b(int16_t offset) { beq(zero_reg, zero_reg, offset); }  in b()
1493 void Assembler::bal(int16_t offset) { bgezal(zero_reg, offset); }  in bal()
1519   DCHECK(rt != zero_reg);  in bgezc()
1525   DCHECK(rs != zero_reg);  in bgeuc()
1526   DCHECK(rt != zero_reg);  in bgeuc()
1533   DCHECK(rs != zero_reg);  in bgec()
1534   DCHECK(rt != zero_reg);  in bgec()
1540   DCHECK(!IsMipsArchVariant(kMips32r6) || rs == zero_reg);  in bgezal()
1549   GenInstrImmediate(BGTZ, rs, zero_reg, offset);  in bgtz()
1555   DCHECK(rt != zero_reg);  in bgtzc()
1556   GenInstrImmediate(BGTZL, zero_reg, rt, offset,  in bgtzc()
1562   GenInstrImmediate(BLEZ, rs, zero_reg, offset);  in blez()
1568   DCHECK(rt != zero_reg);  in blezc()
1569   GenInstrImmediate(BLEZL, zero_reg, rt, offset,  in blezc()
1575   DCHECK(rt != zero_reg);  in bltzc()
1581   DCHECK(rs != zero_reg);  in bltuc()
1582   DCHECK(rt != zero_reg);  in bltuc()
1589   DCHECK(rs != zero_reg);  in bltc()
1590   DCHECK(rt != zero_reg);  in bltc()
1602   DCHECK(!IsMipsArchVariant(kMips32r6) || rs == zero_reg);  in bltzal()
1635   DCHECK(rt != zero_reg);  in blezalc()
1637   GenInstrImmediate(BLEZ, zero_reg, rt, offset,  in blezalc()
1643   DCHECK(rt != zero_reg);  in bgezalc()
1650   DCHECK(rs != zero_reg);  in bgezall()
1659   DCHECK(rt != zero_reg);  in bltzalc()
1666   DCHECK(rt != zero_reg);  in bgtzalc()
1668   GenInstrImmediate(BGTZ, zero_reg, rt, offset,  in bgtzalc()
1674   DCHECK(rt != zero_reg);  in beqzalc()
1676   GenInstrImmediate(ADDI, zero_reg, rt, offset,  in beqzalc()
1682   DCHECK(rt != zero_reg);  in bnezalc()
1684   GenInstrImmediate(DADDI, zero_reg, rt, offset,  in bnezalc()
1700   DCHECK(rs != zero_reg);  in beqzc()
1716   DCHECK(rs != zero_reg);  in bnezc()
1736     GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);  in jr()
1739     jalr(rs, zero_reg);  in jr()
1759   GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);  in jalr()
1765   GenInstrImmediate(POP66, zero_reg, rt, offset);  in jic()
1770   GenInstrImmediate(POP76, zero_reg, rt, offset);  in jialc()
1823   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT);  in mult()
1827   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU);  in multu()
1831   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV);  in div()
1840   GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);  in divu()
1887   DCHECK(coming_from_nop || !(rd == zero_reg && rt == zero_reg));  in sll()
1888   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SLL);  in sll()
1896   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRL);  in srl()
1904   GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRA);  in sra()
2167   GenInstrImmediate(LUI, zero_reg, rd, j);  in lui()
2174   DCHECK(rs != zero_reg);  in aui()
2284   GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI);  in mfhi()
2288   GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO);  in mflo()
2338     GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, CLZ_R6);  in clz()
2358   GenInstrRegister(SPECIAL3, zero_reg, rt, rd, 0, BSHFL);  in bitswap()
2379   GenInstrRegister(SPECIAL3, zero_reg, rt, rd, WSBH, BSHFL);  in wsbh()
2384   GenInstrRegister(SPECIAL3, zero_reg, rt, rd, SEH, BSHFL);  in seh()
2389   GenInstrRegister(SPECIAL3, zero_reg, rt, rd, SEB, BSHFL);  in seb()
2925   mtc1(zero_reg, f14);  in fcmp()
3783   or_(tf, ra, zero_reg);  in GenPCRelativeJump()
3792     or_(ra, tf, zero_reg);  in GenPCRelativeJump()
3796     or_(ra, tf, zero_reg);  in GenPCRelativeJump()