Lines Matching refs:opnd
2400 void TurboAssembler::MulP(Register dst, const Operand& opnd) { in MulP() argument
2402 msgfi(dst, opnd); in MulP()
2404 msfi(dst, opnd); in MulP()
2426 void TurboAssembler::MulP(Register dst, const MemOperand& opnd) { in MulP() argument
2428 if (is_uint16(opnd.offset())) { in MulP()
2429 ms(dst, opnd); in MulP()
2430 } else if (is_int20(opnd.offset())) { in MulP()
2431 msy(dst, opnd); in MulP()
2436 if (is_int20(opnd.offset())) { in MulP()
2437 msg(dst, opnd); in MulP()
2460 void TurboAssembler::Add32(Register dst, const Operand& opnd) { in Add32() argument
2461 if (is_int16(opnd.immediate())) in Add32()
2462 ahi(dst, opnd); in Add32()
2464 afi(dst, opnd); in Add32()
2468 void TurboAssembler::Add32_RI(Register dst, const Operand& opnd) { in Add32_RI() argument
2470 Add32(dst, opnd); in Add32_RI()
2474 void TurboAssembler::AddP(Register dst, const Operand& opnd) { in AddP() argument
2476 if (is_int16(opnd.immediate())) in AddP()
2477 aghi(dst, opnd); in AddP()
2479 agfi(dst, opnd); in AddP()
2481 Add32(dst, opnd); in AddP()
2486 void TurboAssembler::Add32(Register dst, Register src, const Operand& opnd) { in Add32() argument
2488 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in Add32()
2489 ahik(dst, src, opnd); in Add32()
2494 Add32(dst, opnd); in Add32()
2499 const Operand& opnd) { in Add32_RRI() argument
2501 Add32(dst, src, opnd); in Add32_RRI()
2505 void TurboAssembler::AddP(Register dst, Register src, const Operand& opnd) { in AddP() argument
2507 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in AddP()
2508 AddPImm_RRI(dst, src, opnd); in AddP()
2513 AddP(dst, opnd); in AddP()
2590 void TurboAssembler::Add32(Register dst, const MemOperand& opnd) { in Add32() argument
2591 DCHECK(is_int20(opnd.offset())); in Add32()
2592 if (is_uint12(opnd.offset())) in Add32()
2593 a(dst, opnd); in Add32()
2595 ay(dst, opnd); in Add32()
2599 void TurboAssembler::AddP(Register dst, const MemOperand& opnd) { in AddP() argument
2601 DCHECK(is_int20(opnd.offset())); in AddP()
2602 ag(dst, opnd); in AddP()
2604 Add32(dst, opnd); in AddP()
2612 void TurboAssembler::AddP_ExtendSrc(Register dst, const MemOperand& opnd) { in AddP_ExtendSrc() argument
2614 DCHECK(is_int20(opnd.offset())); in AddP_ExtendSrc()
2615 agf(dst, opnd); in AddP_ExtendSrc()
2617 Add32(dst, opnd); in AddP_ExtendSrc()
2622 void TurboAssembler::Add32(const MemOperand& opnd, const Operand& imm) { in Add32() argument
2624 DCHECK(is_int20(opnd.offset())); in Add32()
2626 asi(opnd, imm); in Add32()
2630 void TurboAssembler::AddP(const MemOperand& opnd, const Operand& imm) { in AddP() argument
2632 DCHECK(is_int20(opnd.offset())); in AddP()
2635 agsi(opnd, imm); in AddP()
2637 asi(opnd, imm); in AddP()
2693 void TurboAssembler::AddLogical(Register dst, const MemOperand& opnd) { in AddLogical() argument
2694 DCHECK(is_int20(opnd.offset())); in AddLogical()
2695 if (is_uint12(opnd.offset())) in AddLogical()
2696 al_z(dst, opnd); in AddLogical()
2698 aly(dst, opnd); in AddLogical()
2702 void TurboAssembler::AddLogicalP(Register dst, const MemOperand& opnd) { in AddLogicalP() argument
2704 DCHECK(is_int20(opnd.offset())); in AddLogicalP()
2705 alg(dst, opnd); in AddLogicalP()
2707 AddLogical(dst, opnd); in AddLogicalP()
2852 void TurboAssembler::Sub32(Register dst, const MemOperand& opnd) { in Sub32() argument
2853 DCHECK(is_int20(opnd.offset())); in Sub32()
2854 if (is_uint12(opnd.offset())) in Sub32()
2855 s(dst, opnd); in Sub32()
2857 sy(dst, opnd); in Sub32()
2861 void TurboAssembler::SubP(Register dst, const MemOperand& opnd) { in SubP() argument
2863 sg(dst, opnd); in SubP()
2865 Sub32(dst, opnd); in SubP()
2879 void TurboAssembler::SubP_ExtendSrc(Register dst, const MemOperand& opnd) { in SubP_ExtendSrc() argument
2881 DCHECK(is_int20(opnd.offset())); in SubP_ExtendSrc()
2882 sgf(dst, opnd); in SubP_ExtendSrc()
2884 Sub32(dst, opnd); in SubP_ExtendSrc()
2890 const MemOperand& opnd) { in LoadAndSub32() argument
2892 laa(dst, dst, opnd); in LoadAndSub32()
2896 const MemOperand& opnd) { in LoadAndSub64() argument
2898 laag(dst, dst, opnd); in LoadAndSub64()
2906 void TurboAssembler::SubLogical(Register dst, const MemOperand& opnd) { in SubLogical() argument
2907 DCHECK(is_int20(opnd.offset())); in SubLogical()
2908 if (is_uint12(opnd.offset())) in SubLogical()
2909 sl(dst, opnd); in SubLogical()
2911 sly(dst, opnd); in SubLogical()
2915 void TurboAssembler::SubLogicalP(Register dst, const MemOperand& opnd) { in SubLogicalP() argument
2916 DCHECK(is_int20(opnd.offset())); in SubLogicalP()
2918 slgf(dst, opnd); in SubLogicalP()
2920 SubLogical(dst, opnd); in SubLogicalP()
2929 const MemOperand& opnd) { in SubLogicalP_ExtendSrc() argument
2931 DCHECK(is_int20(opnd.offset())); in SubLogicalP_ExtendSrc()
2932 slgf(dst, opnd); in SubLogicalP_ExtendSrc()
2934 SubLogical(dst, opnd); in SubLogicalP_ExtendSrc()
2983 void TurboAssembler::And(Register dst, const MemOperand& opnd) { in And() argument
2984 DCHECK(is_int20(opnd.offset())); in And()
2985 if (is_uint12(opnd.offset())) in And()
2986 n(dst, opnd); in And()
2988 ny(dst, opnd); in And()
2992 void TurboAssembler::AndP(Register dst, const MemOperand& opnd) { in AndP() argument
2993 DCHECK(is_int20(opnd.offset())); in AndP()
2995 ng(dst, opnd); in AndP()
2997 And(dst, opnd); in AndP()
3002 void TurboAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); } in And() argument
3005 void TurboAssembler::AndP(Register dst, const Operand& opnd) { in AndP() argument
3007 intptr_t value = opnd.immediate(); in AndP()
3014 And(dst, opnd); in AndP()
3019 void TurboAssembler::And(Register dst, Register src, const Operand& opnd) { in And() argument
3021 nilf(dst, opnd); in And()
3025 void TurboAssembler::AndP(Register dst, Register src, const Operand& opnd) { in AndP() argument
3027 intptr_t value = opnd.immediate(); in AndP()
3062 AndP(dst, opnd); in AndP()
3106 void TurboAssembler::Or(Register dst, const MemOperand& opnd) { in Or() argument
3107 DCHECK(is_int20(opnd.offset())); in Or()
3108 if (is_uint12(opnd.offset())) in Or()
3109 o(dst, opnd); in Or()
3111 oy(dst, opnd); in Or()
3115 void TurboAssembler::OrP(Register dst, const MemOperand& opnd) { in OrP() argument
3116 DCHECK(is_int20(opnd.offset())); in OrP()
3118 og(dst, opnd); in OrP()
3120 Or(dst, opnd); in OrP()
3125 void TurboAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); } in Or() argument
3128 void TurboAssembler::OrP(Register dst, const Operand& opnd) { in OrP() argument
3130 intptr_t value = opnd.immediate(); in OrP()
3137 Or(dst, opnd); in OrP()
3142 void TurboAssembler::Or(Register dst, Register src, const Operand& opnd) { in Or() argument
3144 oilf(dst, opnd); in Or()
3148 void TurboAssembler::OrP(Register dst, Register src, const Operand& opnd) { in OrP() argument
3150 OrP(dst, opnd); in OrP()
3194 void TurboAssembler::Xor(Register dst, const MemOperand& opnd) { in Xor() argument
3195 DCHECK(is_int20(opnd.offset())); in Xor()
3196 if (is_uint12(opnd.offset())) in Xor()
3197 x(dst, opnd); in Xor()
3199 xy(dst, opnd); in Xor()
3203 void TurboAssembler::XorP(Register dst, const MemOperand& opnd) { in XorP() argument
3204 DCHECK(is_int20(opnd.offset())); in XorP()
3206 xg(dst, opnd); in XorP()
3208 Xor(dst, opnd); in XorP()
3213 void TurboAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); } in Xor() argument
3216 void TurboAssembler::XorP(Register dst, const Operand& opnd) { in XorP() argument
3218 intptr_t value = opnd.immediate(); in XorP()
3222 Xor(dst, opnd); in XorP()
3227 void TurboAssembler::Xor(Register dst, Register src, const Operand& opnd) { in Xor() argument
3229 xilf(dst, opnd); in Xor()
3233 void TurboAssembler::XorP(Register dst, Register src, const Operand& opnd) { in XorP() argument
3235 XorP(dst, opnd); in XorP()
3258 void TurboAssembler::Load(Register dst, const Operand& opnd) { in Load() argument
3259 intptr_t value = opnd.immediate(); in Load()
3262 lghi(dst, opnd); in Load()
3264 lhi(dst, opnd); in Load()
3268 lgfi(dst, opnd); in Load()
3270 iilf(dst, opnd); in Load()
3274 llilf(dst, opnd); in Load()
3276 iilf(dst, opnd); in Load()
3287 void TurboAssembler::Load(Register dst, const MemOperand& opnd) { in Load() argument
3288 DCHECK(is_int20(opnd.offset())); in Load()
3290 lgf(dst, opnd); // 64<-32 in Load()
3292 if (is_uint12(opnd.offset())) { in Load()
3293 l(dst, opnd); in Load()
3295 ly(dst, opnd); in Load()
3331 void TurboAssembler::Cmp32(Register dst, const Operand& opnd) { in Cmp32() argument
3332 if (opnd.rmode() == RelocInfo::NONE) { in Cmp32()
3333 intptr_t value = opnd.immediate(); in Cmp32()
3335 chi(dst, opnd); in Cmp32()
3337 cfi(dst, opnd); in Cmp32()
3340 RecordRelocInfo(opnd.rmode(), opnd.immediate()); in Cmp32()
3341 cfi(dst, opnd); in Cmp32()
3347 void TurboAssembler::CmpP(Register dst, const Operand& opnd) { in CmpP() argument
3349 if (opnd.rmode() == RelocInfo::NONE) { in CmpP()
3350 cgfi(dst, opnd); in CmpP()
3352 mov(r0, opnd); // Need to generate 64-bit relocation in CmpP()
3356 Cmp32(dst, opnd); in CmpP()
3361 void TurboAssembler::Cmp32(Register dst, const MemOperand& opnd) { in Cmp32() argument
3363 DCHECK(is_int20(opnd.offset())); in Cmp32()
3364 if (is_uint12(opnd.offset())) in Cmp32()
3365 c(dst, opnd); in Cmp32()
3367 cy(dst, opnd); in Cmp32()
3371 void TurboAssembler::CmpP(Register dst, const MemOperand& opnd) { in CmpP() argument
3373 DCHECK(is_int20(opnd.offset())); in CmpP()
3375 cg(dst, opnd); in CmpP()
3377 Cmp32(dst, opnd); in CmpP()
3383 const MemOperand& opnd) { in CmpAndSwap() argument
3384 if (is_uint12(opnd.offset())) { in CmpAndSwap()
3385 cs(old_val, new_val, opnd); in CmpAndSwap()
3387 csy(old_val, new_val, opnd); in CmpAndSwap()
3392 const MemOperand& opnd) { in CmpAndSwap64() argument
3393 DCHECK(is_int20(opnd.offset())); in CmpAndSwap64()
3394 csg(old_val, new_val, opnd); in CmpAndSwap64()
3414 void TurboAssembler::CmpLogical32(Register dst, const Operand& opnd) { in CmpLogical32() argument
3415 clfi(dst, opnd); in CmpLogical32()
3419 void TurboAssembler::CmpLogicalP(Register dst, const Operand& opnd) { in CmpLogicalP() argument
3421 DCHECK_EQ(static_cast<uint32_t>(opnd.immediate() >> 32), 0); in CmpLogicalP()
3422 clgfi(dst, opnd); in CmpLogicalP()
3424 CmpLogical32(dst, opnd); in CmpLogicalP()
3429 void TurboAssembler::CmpLogical32(Register dst, const MemOperand& opnd) { in CmpLogical32() argument
3431 DCHECK(is_int20(opnd.offset())); in CmpLogical32()
3432 if (is_uint12(opnd.offset())) in CmpLogical32()
3433 cl(dst, opnd); in CmpLogical32()
3435 cly(dst, opnd); in CmpLogical32()
3439 void TurboAssembler::CmpLogicalP(Register dst, const MemOperand& opnd) { in CmpLogicalP() argument
3441 DCHECK(is_int20(opnd.offset())); in CmpLogicalP()
3443 clg(dst, opnd); in CmpLogicalP()
3445 CmpLogical32(dst, opnd); in CmpLogicalP()
3458 void TurboAssembler::Branch(Condition c, const Operand& opnd) { in Branch() argument
3459 intptr_t value = opnd.immediate(); in Branch()
3461 brc(c, opnd); in Branch()
3463 brcl(c, opnd); in Branch()
3593 void TurboAssembler::StoreP(const MemOperand& mem, const Operand& opnd, in StoreP() argument
3596 DCHECK_EQ(opnd.rmode(), RelocInfo::NONE); in StoreP()
3600 mem.getIndexRegister() == r0 && is_int16(opnd.immediate())) { in StoreP()
3602 mvghi(mem, opnd); in StoreP()
3604 mvhi(mem, opnd); in StoreP()
3607 LoadImmP(scratch, opnd); in StoreP()
3936 void TurboAssembler::AddFloat32(DoubleRegister dst, const MemOperand& opnd, in AddFloat32() argument
3938 if (is_uint12(opnd.offset())) { in AddFloat32()
3939 aeb(dst, opnd); in AddFloat32()
3941 ley(scratch, opnd); in AddFloat32()
3946 void TurboAssembler::AddFloat64(DoubleRegister dst, const MemOperand& opnd, in AddFloat64() argument
3948 if (is_uint12(opnd.offset())) { in AddFloat64()
3949 adb(dst, opnd); in AddFloat64()
3951 ldy(scratch, opnd); in AddFloat64()
3956 void TurboAssembler::SubFloat32(DoubleRegister dst, const MemOperand& opnd, in SubFloat32() argument
3958 if (is_uint12(opnd.offset())) { in SubFloat32()
3959 seb(dst, opnd); in SubFloat32()
3961 ley(scratch, opnd); in SubFloat32()
3966 void TurboAssembler::SubFloat64(DoubleRegister dst, const MemOperand& opnd, in SubFloat64() argument
3968 if (is_uint12(opnd.offset())) { in SubFloat64()
3969 sdb(dst, opnd); in SubFloat64()
3971 ldy(scratch, opnd); in SubFloat64()
3976 void TurboAssembler::MulFloat32(DoubleRegister dst, const MemOperand& opnd, in MulFloat32() argument
3978 if (is_uint12(opnd.offset())) { in MulFloat32()
3979 meeb(dst, opnd); in MulFloat32()
3981 ley(scratch, opnd); in MulFloat32()
3986 void TurboAssembler::MulFloat64(DoubleRegister dst, const MemOperand& opnd, in MulFloat64() argument
3988 if (is_uint12(opnd.offset())) { in MulFloat64()
3989 mdb(dst, opnd); in MulFloat64()
3991 ldy(scratch, opnd); in MulFloat64()
3996 void TurboAssembler::DivFloat32(DoubleRegister dst, const MemOperand& opnd, in DivFloat32() argument
3998 if (is_uint12(opnd.offset())) { in DivFloat32()
3999 deb(dst, opnd); in DivFloat32()
4001 ley(scratch, opnd); in DivFloat32()
4006 void TurboAssembler::DivFloat64(DoubleRegister dst, const MemOperand& opnd, in DivFloat64() argument
4008 if (is_uint12(opnd.offset())) { in DivFloat64()
4009 ddb(dst, opnd); in DivFloat64()
4011 ldy(scratch, opnd); in DivFloat64()
4017 const MemOperand& opnd, in LoadFloat32ToDouble() argument
4019 if (is_uint12(opnd.offset())) { in LoadFloat32ToDouble()
4020 ldeb(dst, opnd); in LoadFloat32ToDouble()
4022 ley(scratch, opnd); in LoadFloat32ToDouble()