Lines Matching refs:scratch1
146 Register value, Register scratch0, Register scratch1, in OutOfLineRecordWrite() argument
153 scratch1_(scratch1), in OutOfLineRecordWrite()
513 Register scratch1, in AssemblePopArgumentsAdaptorFrame() argument
516 DCHECK(!AreAliased(args_reg, scratch1, scratch2, scratch3)); in AssemblePopArgumentsAdaptorFrame()
526 Register caller_args_count_reg = scratch1; in AssemblePopArgumentsAdaptorFrame()
883 Register scratch1 = i.TempRegister(1); in AssembleArchInstruction() local
885 scratch0, scratch1, mode, in AssembleArchInstruction()
2213 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2219 __ or_v(scratch1, scratch0, src1); in AssembleArchInstruction()
2222 __ bsel_v(scratch0, src0, scratch1); in AssembleArchInstruction()
2224 __ fslt_d(scratch1, src0, scratch0); in AssembleArchInstruction()
2225 __ bsel_v(scratch1, scratch0, src0); in AssembleArchInstruction()
2227 __ fmin_d(dst, scratch1, scratch1); in AssembleArchInstruction()
2236 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2242 __ and_v(scratch1, scratch0, src1); in AssembleArchInstruction()
2245 __ bsel_v(scratch0, src0, scratch1); in AssembleArchInstruction()
2247 __ fslt_d(scratch1, scratch0, src0); in AssembleArchInstruction()
2248 __ bsel_v(scratch1, scratch0, src0); in AssembleArchInstruction()
2250 __ fmax_d(dst, scratch1, scratch1); in AssembleArchInstruction()
2605 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2611 __ and_v(scratch1, scratch0, src1); in AssembleArchInstruction()
2614 __ bsel_v(scratch0, src0, scratch1); in AssembleArchInstruction()
2616 __ fslt_w(scratch1, scratch0, src0); in AssembleArchInstruction()
2617 __ bsel_v(scratch1, scratch0, src0); in AssembleArchInstruction()
2619 __ fmax_w(dst, scratch1, scratch1); in AssembleArchInstruction()
2628 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2634 __ or_v(scratch1, scratch0, src1); in AssembleArchInstruction()
2637 __ bsel_v(scratch0, src0, scratch1); in AssembleArchInstruction()
2639 __ fslt_w(scratch1, src0, scratch0); in AssembleArchInstruction()
2640 __ bsel_v(scratch1, scratch0, src0); in AssembleArchInstruction()
2642 __ fmin_w(dst, scratch1, scratch1); in AssembleArchInstruction()
2771 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2773 __ srli_d(scratch1, scratch0, 31); in AssembleArchInstruction()
2774 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
2775 __ shf_w(scratch1, scratch0, 0x0E); in AssembleArchInstruction()
2776 __ slli_d(scratch1, scratch1, 2); in AssembleArchInstruction()
2777 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
2978 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
2980 __ srli_w(scratch1, scratch0, 15); in AssembleArchInstruction()
2981 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
2982 __ srli_d(scratch1, scratch0, 30); in AssembleArchInstruction()
2983 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
2984 __ shf_w(scratch1, scratch0, 0x0E); in AssembleArchInstruction()
2985 __ slli_d(scratch1, scratch1, 4); in AssembleArchInstruction()
2986 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
3181 Simd128Register scratch1 = kSimd128ScratchReg; in AssembleArchInstruction() local
3183 __ srli_h(scratch1, scratch0, 7); in AssembleArchInstruction()
3184 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
3185 __ srli_w(scratch1, scratch0, 14); in AssembleArchInstruction()
3186 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
3187 __ srli_d(scratch1, scratch0, 28); in AssembleArchInstruction()
3188 __ or_v(scratch0, scratch0, scratch1); in AssembleArchInstruction()
3189 __ shf_w(scratch1, scratch0, 0x0E); in AssembleArchInstruction()
3190 __ ilvev_b(scratch0, scratch1, scratch0); in AssembleArchInstruction()