Lines Matching refs:assm
59 inline MemOperand GetMemOp(LiftoffAssembler* assm, in GetMemOp() argument
65 assm->add(tmp, offset, Operand(offset_imm)); in GetMemOp()
71 inline Register CalculateActualAddress(LiftoffAssembler* assm,
80 assm->mov(result_reg, addr_reg);
87 assm->add(actual_addr_reg, addr_reg, Operand(offset_imm));
89 assm->add(actual_addr_reg, addr_reg, Operand(offset_reg));
91 assm->add(actual_addr_reg, actual_addr_reg, Operand(offset_imm));
122 inline void I64Binop(LiftoffAssembler* assm, LiftoffRegister dst, in I64Binop() argument
126 dst_low = assm->GetUnusedRegister( in I64Binop()
130 (assm->*op)(dst_low, lhs.low_gp(), rhs.low_gp(), SetCC, al); in I64Binop()
131 (assm->*op_with_carry)(dst.high_gp(), lhs.high_gp(), Operand(rhs.high_gp()), in I64Binop()
133 if (dst_low != dst.low_gp()) assm->mov(dst.low_gp(), dst_low); in I64Binop()
140 inline void I64BinopI(LiftoffAssembler* assm, LiftoffRegister dst, in I64BinopI() argument
145 (assm->*op)(dst.low_gp(), lhs.low_gp(), Operand(imm), SetCC, al); in I64BinopI()
148 (assm->*op_with_carry)(dst.high_gp(), lhs.high_gp(), Operand(sign_extend), in I64BinopI()
155 inline void I64Shiftop(LiftoffAssembler* assm, LiftoffRegister dst, in I64Shiftop() argument
166 pinned.set(assm->GetUnusedRegister(kGpReg, pinned)).gp(); in I64Shiftop()
167 assm->and_(amount_capped, amount, Operand(0x3F)); in I64Shiftop()
173 *later_src_reg = assm->GetUnusedRegister(kGpReg, pinned).gp(); in I64Shiftop()
174 assm->TurboAssembler::Move(*later_src_reg, clobbered_dst_reg); in I64Shiftop()
177 (assm->*op)(dst_low, dst_high, src_low, src_high, amount_capped); in I64Shiftop()
195 inline void EmitFloatMinOrMax(LiftoffAssembler* assm, RegisterType dst, in EmitFloatMinOrMax() argument
200 assm->TurboAssembler::Move(dst, lhs); in EmitFloatMinOrMax()
205 assm->TurboAssembler::FloatMin(dst, lhs, rhs, &is_nan); in EmitFloatMinOrMax()
207 assm->TurboAssembler::FloatMax(dst, lhs, rhs, &is_nan); in EmitFloatMinOrMax()
209 assm->b(&done); in EmitFloatMinOrMax()
210 assm->bind(&is_nan); in EmitFloatMinOrMax()
212 assm->vadd(dst, lhs, rhs); in EmitFloatMinOrMax()
213 assm->bind(&done); in EmitFloatMinOrMax()
216 inline Register EnsureNoAlias(Assembler* assm, Register reg, in EnsureNoAlias() argument
222 assm->mov(tmp, reg); in EnsureNoAlias()
226 inline void S128NarrowOp(LiftoffAssembler* assm, NeonDataType dt, in S128NarrowOp() argument
230 assm->vqmovn(dt, sdt, dst.low_fp(), liftoff::GetSimd128Register(lhs)); in S128NarrowOp()
231 assm->vqmovn(dt, sdt, dst.high_fp(), liftoff::GetSimd128Register(rhs)); in S128NarrowOp()
233 assm->vqmovn(dt, sdt, dst.high_fp(), liftoff::GetSimd128Register(rhs)); in S128NarrowOp()
234 assm->vqmovn(dt, sdt, dst.low_fp(), liftoff::GetSimd128Register(lhs)); in S128NarrowOp()
238 inline void F64x2Compare(LiftoffAssembler* assm, LiftoffRegister dst, in F64x2Compare() argument
246 UseScratchRegisterScope temps(assm); in F64x2Compare()
249 assm->mov(scratch, Operand(0)); in F64x2Compare()
250 assm->VFPCompareAndSetFlags(left.low(), right.low()); in F64x2Compare()
251 assm->mov(scratch, Operand(-1), LeaveCC, cond); in F64x2Compare()
254 assm->mov(scratch, Operand(0), LeaveCC, vs); in F64x2Compare()
256 assm->vmov(dest.low(), scratch, scratch); in F64x2Compare()
258 assm->mov(scratch, Operand(0)); in F64x2Compare()
259 assm->VFPCompareAndSetFlags(left.high(), right.high()); in F64x2Compare()
260 assm->mov(scratch, Operand(-1), LeaveCC, cond); in F64x2Compare()
263 assm->mov(scratch, Operand(0), LeaveCC, vs); in F64x2Compare()
265 assm->vmov(dest.high(), scratch, scratch); in F64x2Compare()
268 inline void Store(LiftoffAssembler* assm, LiftoffRegister src, MemOperand dst, in Store() argument
274 DCHECK(UseScratchRegisterScope{assm}.CanAcquire()); in Store()
280 assm->str(src.gp(), dst); in Store()
284 assm->str(src.low_gp(), MemOperand(dst.rn(), dst.offset())); in Store()
285 assm->str( in Store()
290 assm->vstr(liftoff::GetFloatRegister(src.fp()), dst); in Store()
293 assm->vstr(src.fp(), dst); in Store()
296 UseScratchRegisterScope temps(assm); in Store()
297 Register addr = liftoff::CalculateActualAddress(assm, &temps, dst.rn(), in Store()
299 assm->vst1(Neon8, NeonListOperand(src.low_fp(), 2), NeonMemOperand(addr)); in Store()
307 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, in Load() argument
313 assm->ldr(dst.gp(), src); in Load()
316 assm->ldr(dst.low_gp(), MemOperand(src.rn(), src.offset())); in Load()
317 assm->ldr( in Load()
322 assm->vldr(liftoff::GetFloatRegister(dst.fp()), src); in Load()
325 assm->vldr(dst.fp(), src); in Load()
329 UseScratchRegisterScope temps(assm); in Load()
330 Register addr = liftoff::CalculateActualAddress(assm, &temps, src.rn(), in Load()
332 assm->vld1(Neon8, NeonListOperand(dst.low_fp(), 2), NeonMemOperand(addr)); in Load()
360 inline void EmitSimdShift(LiftoffAssembler* assm, LiftoffRegister dst, in EmitSimdShift() argument
363 UseScratchRegisterScope temps(assm); in EmitSimdShift()
366 assm->and_(shift, rhs.gp(), Operand(mask)); in EmitSimdShift()
367 assm->vdup(sz, tmp, shift); in EmitSimdShift()
369 assm->vneg(sz, tmp, tmp); in EmitSimdShift()
371 assm->vshl(dt, liftoff::GetSimd128Register(dst), in EmitSimdShift()
376 inline void EmitSimdShiftImmediate(LiftoffAssembler* assm, LiftoffRegister dst, in EmitSimdShiftImmediate() argument
382 assm->vshl(dt, liftoff::GetSimd128Register(dst), in EmitSimdShiftImmediate()
385 assm->vshr(dt, liftoff::GetSimd128Register(dst), in EmitSimdShiftImmediate()
389 assm->vmov(liftoff::GetSimd128Register(dst), in EmitSimdShiftImmediate()
394 inline void EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, in EmitAnyTrue() argument
396 UseScratchRegisterScope temps(assm); in EmitAnyTrue()
398 assm->vpmax(NeonU32, scratch, src.low_fp(), src.high_fp()); in EmitAnyTrue()
399 assm->vpmax(NeonU32, scratch, scratch, scratch); in EmitAnyTrue()
400 assm->ExtractLane(dst.gp(), scratch, NeonS32, 0); in EmitAnyTrue()
401 assm->cmp(dst.gp(), Operand(0)); in EmitAnyTrue()
402 assm->mov(dst.gp(), Operand(1), LeaveCC, ne); in EmitAnyTrue()
1505 inline void GeneratePopCnt(Assembler* assm, Register dst, Register src, in GeneratePopCnt() argument
1510 assm->and_(scratch1, src, Operand(0xaaaaaaaa)); in GeneratePopCnt()
1511 assm->sub(dst, src, Operand(scratch1, LSR, 1)); in GeneratePopCnt()
1513 assm->mov(scratch1, Operand(0x33333333)); in GeneratePopCnt()
1514 assm->and_(scratch2, dst, Operand(scratch1, LSL, 2)); in GeneratePopCnt()
1515 assm->and_(scratch1, dst, scratch1); in GeneratePopCnt()
1516 assm->add(dst, scratch1, Operand(scratch2, LSR, 2)); in GeneratePopCnt()
1518 assm->add(dst, dst, Operand(dst, LSR, 4)); in GeneratePopCnt()
1519 assm->and_(dst, dst, Operand(0x0f0f0f0f)); in GeneratePopCnt()
1521 assm->add(dst, dst, Operand(dst, LSR, 8)); in GeneratePopCnt()
1523 assm->add(dst, dst, Operand(dst, LSR, 16)); in GeneratePopCnt()
1525 assm->and_(dst, dst, Operand(0x3f)); in GeneratePopCnt()