Lines Matching refs:uxtl2
1520 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2()
2543 LogicVRegister Simulator::uxtl2(VectorFormat vform, in uxtl2() function in vixl::aarch64::Simulator
2867 uxtl2(vform, temp1, src1); in uaddl2()
2868 uxtl2(vform, temp2, src2); in uaddl2()
2890 uxtl2(vform, temp, src2); in uaddw2()
2959 uxtl2(vform, temp1, src1); in usubl2()
2960 uxtl2(vform, temp2, src2); in usubl2()
2982 uxtl2(vform, temp, src2); in usubw2()
3051 uxtl2(vform, temp1, src1); in uabal2()
3052 uxtl2(vform, temp2, src2); in uabal2()
3099 uxtl2(vform, temp1, src1); in uabdl2()
3100 uxtl2(vform, temp2, src2); in uabdl2()
3147 uxtl2(vform, temp1, src1); in umull2()
3148 uxtl2(vform, temp2, src2); in umull2()
3195 uxtl2(vform, temp1, src1); in umlsl2()
3196 uxtl2(vform, temp2, src2); in umlsl2()
3243 uxtl2(vform, temp1, src1); in umlal2()
3244 uxtl2(vform, temp2, src2); in umlal2()