Lines Matching refs:rt2
62 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
63 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
64 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
788 const CPURegister& rt2,
1647 void Ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) { in Ldaxp() argument
1649 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldaxp()
1651 ldaxp(rt, rt2, src); in Ldaxp()
1707 const Register& rt2, \
1711 ASM(rs, rs2, rt, rt2, src); \
1835 const CPURegister& rt2, in Ldnp() argument
1839 ldnp(rt, rt2, src); in Ldnp()
1922 void Ldxp(const Register& rt, const Register& rt2, const MemOperand& src) { in Ldxp() argument
1924 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldxp()
1926 ldxp(rt, rt2, src); in Ldxp()
2331 const Register& rt2, in Stlxp() argument
2336 VIXL_ASSERT(!rs.Aliases(rt2)); in Stlxp()
2338 stlxp(rs, rt, rt2, dst); in Stlxp()
2362 const CPURegister& rt2, in Stnp() argument
2366 stnp(rt, rt2, dst); in Stnp()
2370 const Register& rt2, in Stxp() argument
2375 VIXL_ASSERT(!rs.Aliases(rt2)); in Stxp()
2377 stxp(rs, rt, rt2, dst); in Stxp()