Lines Matching refs:Is
175 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
176 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
178 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
179 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
181 VIXL_CHECK(NoReg.Is(NoCPUReg)); in TEST()
182 VIXL_CHECK(NoCPUReg.Is(NoReg)); in TEST()
184 VIXL_CHECK(NoVReg.Is(NoCPUReg)); in TEST()
185 VIXL_CHECK(NoCPUReg.Is(NoVReg)); in TEST()
187 VIXL_CHECK(NoVReg.Is(NoCPUReg)); in TEST()
188 VIXL_CHECK(NoCPUReg.Is(NoVReg)); in TEST()
420 VIXL_CHECK(r_x0.Is(x_x0)); in TEST()
421 VIXL_CHECK(x_x0.Is(r_x0)); in TEST()
422 VIXL_CHECK(r_w0.Is(w_w0)); in TEST()
423 VIXL_CHECK(w_w0.Is(r_w0)); in TEST()
430 VIXL_CHECK(r_x1.Is(x_x1)); in TEST()
431 VIXL_CHECK(x_x1.Is(r_x1)); in TEST()
432 VIXL_CHECK(r_w1.Is(w_w1)); in TEST()
433 VIXL_CHECK(w_w1.Is(r_w1)); in TEST()
440 VIXL_CHECK(cpu_x2.Is(x_x2)); in TEST()
441 VIXL_CHECK(x_x2.Is(cpu_x2)); in TEST()
442 VIXL_CHECK(cpu_w2.Is(w_w2)); in TEST()
443 VIXL_CHECK(w_w2.Is(cpu_w2)); in TEST()