*;H&({&x FVP Basearm,vfp-basearm,vexpress"1chosen=serial0aliases/I/smb/motherboard/iofpga@3,00000000/uart@090000/Q/smb/motherboard/iofpga@3,00000000/uart@0a0000/Y/smb/motherboard/iofpga@3,00000000/uart@0b0000/a/smb/motherboard/iofpga@3,00000000/uart@0c0000psci#arm,psci-1.0arm,psci-0.2arm,psciismcp|cpus"1cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 idle-states arm,pscicpu-sleep-0arm,idle-state(d  cluster-sleep-0arm,idle-state   cpu@0cpu arm,armv8psci" cpu@1cpu arm,armv8psci" cpu@2cpu arm,armv8psci" cpu@3cpu arm,armv8psci" cpu@100cpu arm,armv8psci" cpu@101cpu arm,armv8psci" cpu@102cpu arm,armv8psci" cpu@103cpu arm,armv8psci"   memory@80000000memory interrupt-controller@2f000000 arm,gic-v32"1CJP// , , ,  _ its@2f020000arm,gic-v3-itsj/timerarm,armv8-timer0_   ytimer@2a810000arm,armv7-timer-mem*y"1Cframe@2a830000 _*pmuarm,armv8-pmuv30_<=>?smb simple-bus"1xC 2 ?             !!""##$$%%&&''(())**motherboardrs1arm,vexpress,v2m-p1simple-bus"12Cflash@0,00000000arm,vexpress-flashcfi-flashvram@2,00000000arm,vexpress-vram ethernet@2,02000000smsc,lan91c111 _clk24mhz fixed-clockyn6 v2m:clk24mhzrefclk1mhz fixed-clockyB@v2m:refclk1mhz  refclk32khz fixed-clockyv2m:refclk32khz  iofpga@3,00000000arm,amba-bussimple-bus"1C sysreg@010000arm,vexpress-sysregsysctl@020000arm,sp810arm,primecell  refclktimclkapb_pclk0timerclken0timerclken1timerclken2timerclken3aaci@040000arm,pl041arm,primecell_  apb_pclkmmci@050000arm,pl180arm,primecell_  $ -6Dmclkapb_pclkkmi@060000arm,pl050arm,primecell_ KMIREFCLKapb_pclkkmi@070000arm,pl050arm,primecell_ KMIREFCLKapb_pclkuart@090000arm,pl011arm,primecell _uartclkapb_pclkuart@0a0000arm,pl011arm,primecell _uartclkapb_pclkuart@0b0000arm,pl011arm,primecell _uartclkapb_pclkuart@0c0000arm,pl011arm,primecell _uartclkapb_pclkwdt@0f0000arm,sp805arm,primecell_ wdogclkapb_pclktimer@110000arm,sp804arm,primecell_timclken1timclken2apb_pclktimer@120000arm,sp804arm,primecell_timclken1timclken2apb_pclkrtc@170000arm,pl031arm,primecell_ apb_pclkclcd@1f0000arm,pl111arm,primecell_clcdclkapb_pclkPXVGAU]virtio_block@0130000 virtio,mmio_*fixedregulator@0regulator-fixedi3V3x2Z2Zmcc#arm,vexpress,config-bussimple-busosc@1arm,vexpress-oscjep v2m:oscclk1reset@0arm,vexpress-resetmuxfpga@0arm,vexpress-muxfpgashutdown@0arm,vexpress-shutdownreboot@0arm,vexpress-reboot dvimode@0arm,vexpress-dvimode panelspanel@0panelPXVGA< ="0/<IhS]bFB_VMODE_NONINTERLACEDhTIM2_BCDTIM2_IPC&mCNTL_LCDTFTCNTL_BGRCNTL_LCDVCOMP(1)(rCLCD_CAP_5551CLCD_CAP_565CLCD_CAP_888w modelcompatibleinterrupt-parent#address-cells#size-cellsstdout-pathserial0serial1serial2serial3methodcpu_suspendcpu_offcpu_oncpuentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslinux,phandledevice_typeregenable-methodcpu-idle-states#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controllerclock-frequencyframe-numberinterrupt-map-maskinterrupt-maparm,v2m-memory-mapbank-width#clock-cellsclock-output-namesgpio-controller#gpio-cellsclocksclock-namescd-gpioswp-gpiosmax-frequencyvmmc-supplymodeuse_dmaframebufferregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangerefreshxresyrespixclockleft_marginright_marginupper_marginlower_marginhsync_lenvsync_lensyncvmodetim2cntlcapsbpp