| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 378 uint8_t OpSize)) { in handleOperand()
797 uint8_t OpSize) { in typeFromString()
927 uint8_t OpSize) { in immediateEncodingFromString()
965 uint8_t OpSize) { in rmRegisterEncodingFromString()
997 uint8_t OpSize) { in roRegisterEncodingFromString()
1038 uint8_t OpSize) { in vvvvRegisterEncodingFromString()
1064 uint8_t OpSize) { in writemaskRegisterEncodingFromString()
1078 uint8_t OpSize) { in memoryEncodingFromString()
1117 uint8_t OpSize) { in relocationEncodingFromString()
1164 uint8_t OpSize) { in opcodeModifierEncodingFromString()
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| D | X86RecognizableInstr.h | 173 uint8_t OpSize; variable
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 483 uint8_t OpSize)) { in handleOperand()
914 uint8_t OpSize) { in typeFromString()
1048 uint8_t OpSize) { in immediateEncodingFromString()
1086 uint8_t OpSize) { in rmRegisterEncodingFromString()
1118 uint8_t OpSize) { in roRegisterEncodingFromString()
1159 uint8_t OpSize) { in vvvvRegisterEncodingFromString()
1185 uint8_t OpSize) { in writemaskRegisterEncodingFromString()
1199 uint8_t OpSize) { in memoryEncodingFromString()
1240 uint8_t OpSize) { in relocationEncodingFromString()
1287 uint8_t OpSize) { in opcodeModifierEncodingFromString()
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| D | X86RecognizableInstr.h | 51 uint8_t OpSize; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 133 const unsigned OpSize = MRI.getType(DestReg).getSizeInBits(); in select() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMLegalizerInfo.cpp | 349 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 223 unsigned OpSize) { in selectBinaryOp()
294 unsigned OpSize) { in selectLoadStoreUIOp()
1119 const unsigned OpSize = Ty.getSizeInBits(); in select() local
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| D | AArch64RegisterBankInfo.cpp | 540 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local
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| D | AArch64ISelLowering.cpp | 3623 unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 in LowerCall() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 317 unsigned OpSize = TII->getOpSize(MI, 1); in runOnMachineFunction() local
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| D | SIInstrInfo.cpp | 1548 unsigned OpSize = RI.getRegClass(OpInfo.RegClass)->getSize(); in isImmOperandLegal() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 343 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalar() local
396 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalar() local
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| D | MachineIRBuilder.cpp | 442 unsigned OpSize = OpTy.getSizeInBits(); in buildSequence() local
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| /external/llvm/lib/IR/ |
| D | Metadata.cpp | 445 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local
458 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
| D | Metadata.cpp | 482 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local
495 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local
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| /external/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfoImpl.h | 76 unsigned OpSize = OpTy->getScalarSizeInBits(); in getOperationCost() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 558 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfoImpl.h | 77 unsigned OpSize = OpTy->getScalarSizeInBits(); in getOperationCost() local
|
| /external/llvm/lib/Analysis/ |
| D | ConstantFolding.cpp | 676 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); in SymbolicallyEvaluateBinop() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | ConstantFolding.cpp | 720 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); in SymbolicallyEvaluateBinop() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2244 auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx); in isInlineConstant() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4753 uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8; in CalculateTailCallArgDest() local
11167 auto OpSize = N->getOperand(0).getValueSizeInBits(); in ConvertSETCCToSubtract() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2583 unsigned OpSize = Flags.isByVal() ? in LowerCall() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4222 uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8; in CalculateTailCallArgDest() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3102 unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 in LowerCall() local
|