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Searched defs:Ops (Results 1 – 25 of 288) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp164 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
171 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
178 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
185 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
192 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
199 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; in Select() local
224 SmallVector<SDValue, 8> Ops; in replaceInChain() local
/external/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp164 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
171 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
178 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
185 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
192 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
199 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; in Select() local
224 SmallVector<SDValue, 8> Ops; in replaceInChain() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
DDebugInfoMetadata.cpp62 SmallVector<Metadata *, 2> Ops; in getImpl() local
261 Metadata *Ops[] = { CountNode }; in getImpl() local
270 Metadata *Ops[] = {Name}; in getImpl() local
281 Metadata *Ops[] = {nullptr, nullptr, Name}; in getImpl() local
310 Metadata *Ops[] = {File, Scope, Name, BaseType, ExtraData}; in getImpl() local
330 Metadata *Ops[] = {File, Scope, Name, BaseType, in getImpl() local
362 Metadata *Ops[] = {File, Scope, Name, BaseType, in buildODRType() local
404 Metadata *Ops[] = {nullptr, nullptr, nullptr, TypeArray}; in getImpl() local
440 Metadata *Ops[] = {Filename, Directory, CS ? CS->Value : nullptr, in getImpl() local
458 Metadata *Ops[] = { in getImpl() local
[all …]
DIRBuilder.cpp74 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops, in createCallHelper()
88 ArrayRef<Value *> Ops, in createInvokeHelper()
104 Value *Ops[] = {Ptr, Val, Size, getInt1(isVolatile)}; in CreateMemSet() local
134 Value *Ops[] = {Ptr, Val, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemSet() local
166 Value *Ops[] = {Dst, Src, Size, getInt1(isVolatile)}; in CreateMemCpy() local
207 Value *Ops[] = {Dst, Src, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemCpy() local
246 Value *Ops[] = {Dst, Src, Size, getInt1(isVolatile)}; in CreateMemMove() local
283 Value *Ops[] = {Dst, Src, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemMove() local
315 Value *Ops[] = {Src}; in getReductionIntrinsic() local
323 Value *Ops[] = {Acc, Src}; in CreateFAddReduce() local
[all …]
DProfileSummary.cpp32 Metadata *Ops[2] = {MDString::get(Context, Key), in getKeyValMD() local
41 Metadata *Ops[2] = {MDString::get(Context, Key), MDString::get(Context, Val)}; in getKeyValMD() local
61 Metadata *Ops[2] = {MDString::get(Context, "DetailedSummary"), in getDetailedSummaryMD() local
DMDBuilder.cpp64 SmallVector<Metadata *, 8> Ops; in createFunctionEntryCount() local
104 SmallVector<Metadata *, 4> Ops; in createCallees() local
173 SmallVector<Metadata *, 4> Ops(Fields.size() * 2 + 1); in createTBAAStructTypeNode() local
208 SmallVector<Metadata *, 4> Ops(3 + Fields.size() * 3); in createTBAATypeNode() local
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp764 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
792 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
845 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
897 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
1029 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1082 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1184 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1286 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1494 SDValue Ops[] = { Addr, Chain }; in tryLDGLDU() local
1782 SDValue Ops[] = { Base, Offset, Chain }; in tryLDGLDU() local
[all …]
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1527 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1535 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1585 SDValue Ops[]= { Base, Offset, getAL(CurDAG, SDLoc(N)), in tryT2IndexedLoad() local
1602 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1613 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1624 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() local
1635 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() local
1649 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() local
1664 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadDRegsNode() local
1679 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadQRegsNode() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp923 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(CodeAddrSpace, dl), in tryLoad() local
936 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(CodeAddrSpace, dl), in tryLoad() local
955 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(CodeAddrSpace, dl), in tryLoad() local
974 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(CodeAddrSpace, dl), in tryLoad() local
1093 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1120 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1169 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1218 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1365 SDValue Ops[] = { Addr, Chain }; in tryLDGLDU() local
1512 SDValue Ops[] = {Base, Offset, Chain}; in tryLDGLDU() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1409 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1419 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1450 SDValue Ops[]= { Base, getAL(CurDAG, SDLoc(N)), in tryT1IndexedLoad() local
1498 SDValue Ops[]= { Base, Offset, getAL(CurDAG, SDLoc(N)), in tryT2IndexedLoad() local
1517 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1528 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1539 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() local
1550 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() local
1564 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() local
1579 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadDRegsNode() local
[all …]
/external/llvm/lib/IR/
DDebugInfoMetadata.cpp59 SmallVector<Metadata *, 2> Ops; in getImpl() local
226 Metadata *Ops[] = {Name}; in getImpl() local
237 Metadata *Ops[] = {nullptr, nullptr, Name}; in getImpl() local
251 Metadata *Ops[] = {File, Scope, Name, BaseType, ExtraData}; in getImpl() local
271 Metadata *Ops[] = {File, Scope, Name, BaseType, in getImpl() local
302 Metadata *Ops[] = {File, Scope, Name, BaseType, in buildODRType() local
344 Metadata *Ops[] = {nullptr, nullptr, nullptr, TypeArray}; in getImpl() local
354 Metadata *Ops[] = {Filename, Directory}; in getImpl() local
370 Metadata *Ops[] = { in getImpl() local
425 Metadata *Ops[] = {File, Scope, Name, Name, in getImpl() local
[all …]
DIRBuilder.cpp59 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops, in createCallHelper()
70 ArrayRef<Value *> Ops, in createInvokeHelper()
86 Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemSet() local
113 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemCpy() local
144 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemMove() local
173 Value *Ops[] = { Size, Ptr }; in CreateLifetimeStart() local
188 Value *Ops[] = { Size, Ptr }; in CreateLifetimeEnd() local
198 Value *Ops[] = { Cond }; in CreateAssumption() local
221 Value *Ops[] = { Ptr, getInt32(Align), Mask, PassThru}; in CreateMaskedLoad() local
238 Value *Ops[] = { Val, Ptr, getInt32(Align), Mask }; in CreateMaskedStore() local
[all …]
DProfileSummary.cpp32 Metadata *Ops[2] = {MDString::get(Context, Key), in getKeyValMD() local
41 Metadata *Ops[2] = {MDString::get(Context, Key), MDString::get(Context, Val)}; in getKeyValMD() local
61 Metadata *Ops[2] = {MDString::get(Context, "DetailedSummary"), in getDetailedSummaryMD() local
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp581 SDValue Ops[] = { Op0, Op1, getI32Imm(SH, dl), getI32Imm(MB, dl), in tryBitfieldInsert() local
1325 SDValue Ops[] = in SelectAndParts32() local
1382 SDValue Ops[] = in Select32() local
1402 SDValue Ops[] = in Select32() local
1408 SDValue Ops[] = in Select32() local
1483 SDValue Ops[] = in SelectRotMask64() local
1491 SDValue Ops[] = in SelectRotMask64() local
1497 SDValue Ops[] = in SelectRotMask64() local
1503 SDValue Ops[] = in SelectRotMask64() local
1544 SDValue Ops[] = in SelectRotMaskIns64() local
[all …]
/external/llvm/lib/Transforms/Scalar/
DFloat2Int.cpp252 Op = [](ArrayRef<ConstantRange> Ops) { in walkForwards()
259 Op = [](ArrayRef<ConstantRange> Ops) { in walkForwards()
266 Op = [](ArrayRef<ConstantRange> Ops) { in walkForwards()
278 Op = [](ArrayRef<ConstantRange> Ops) { in walkForwards()
285 Op = [](ArrayRef<ConstantRange> Ops) { in walkForwards()
DReassociate.cpp57 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps()
434 SmallVectorImpl<RepeatedValue> &Ops) { in LinearizeExprTree()
612 SmallVectorImpl<ValueEntry> &Ops) { in RewriteExprTree()
956 static unsigned FindInOperandList(SmallVectorImpl<ValueEntry> &Ops, unsigned i, in FindInOperandList()
983 SmallVectorImpl<WeakVH> &Ops){ in EmitAddTreeOfValues()
1071 const SmallVectorImpl<ValueEntry> &Ops) { in FindSingleUseMultiplyFactors()
1087 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAndOrXor()
1271 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeXor()
1392 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAdd()
1629 bool ReassociatePass::collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops, in collectMultiplyFactors()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp354 ArrayRef<SDValue> Ops) { in AddNodeIDOperands()
364 ArrayRef<SDUse> Ops) { in AddNodeIDOperands()
823 SDValue Ops[] = { Op }; in FindModifiedNodeSlot() local
844 SDValue Ops[] = { Op1, Op2 }; in FindModifiedNodeSlot() local
860 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops, in FindModifiedNodeSlot()
920 SDValue Ops[] = {N1, N2}; in GetBinarySDNode() local
1168 SmallVector<SDValue, 8> Ops; in getConstant() local
1619 SDValue Ops[2] = { N1, N2 }; in getVectorShuffle() local
1663 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; in getConvertRndSat() local
1709 SDValue Ops[] = { Root }; in getEHLabel() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/FuzzMutate/
DOperations.cpp19 void llvm::describeFuzzerIntOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerIntOps()
46 void llvm::describeFuzzerFloatOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerFloatOps()
72 std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerControlFlowOps()
76 void llvm::describeFuzzerPointerOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerPointerOps()
81 std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerAggregateOps()
86 void llvm::describeFuzzerVectorOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerVectorOps()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp634 SDValue Ops[] = {ST->getValue(), Base.getOperand(0), Base.getOperand(1), in tryTLSXFormStore() local
676 SDValue Ops[] = {Base.getOperand(0), Base.getOperand(1), Chain}; in tryTLSXFormLoad() local
751 SDValue Ops[] = { Op0, Op1, getI32Imm(SH, dl), getI32Imm(MB, dl), in tryBitfieldInsert() local
919 SDValue Ops[] = in selectI64ImmDirect() local
1648 SDValue Ops[] = in SelectAndParts32() local
1705 SDValue Ops[] = in Select32() local
1725 SDValue Ops[] = in Select32() local
1731 SDValue Ops[] = in Select32() local
1806 SDValue Ops[] = in SelectRotMask64() local
1814 SDValue Ops[] = in SelectRotMask64() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DReassociate.cpp75 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps()
448 SmallVectorImpl<RepeatedValue> &Ops) { in LinearizeExprTree()
629 SmallVectorImpl<ValueEntry> &Ops) { in RewriteExprTree()
980 static unsigned FindInOperandList(const SmallVectorImpl<ValueEntry> &Ops, in FindInOperandList()
1007 SmallVectorImpl<WeakTrackingVH> &Ops) { in EmitAddTreeOfValues()
1110 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAndOrXor()
1290 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeXor()
1414 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAdd()
1653 static bool collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops, in collectMultiplyFactors()
1709 SmallVectorImpl<Value*> &Ops) { in buildMultiplyTree()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp477 SDValue Ops[] = { Op0, MLAOp1, MLAOp2, LaneIdxVal }; in tryMLAV64LaneV128() local
514 SDValue Ops[] = { SMULLOp0, SMULLOp1, LaneIdxVal }; in tryMULLV64LaneV128() local
936 SDValue Ops[] = { RHS }; in SelectAddrModeXRO() local
1002 SmallVector<SDValue, 4> Ops; in createTuple() local
1032 SmallVector<SDValue, 6> Ops; in SelectTable() local
1112 SDValue Ops[] = { Base, Offset, Chain }; in tryIndexedLoad() local
1140 SDValue Ops[] = {N->getOperand(2), // Mem operand; in SelectLoad() local
1161 SDValue Ops[] = {N->getOperand(1), // Mem operand in SelectPostLoad() local
1197 SDValue Ops[] = {RegSeq, N->getOperand(NumVecs + 2), N->getOperand(0)}; in SelectStore() local
1215 SDValue Ops[] = {RegSeq, in SelectPostStore() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp527 SDValue Ops[] = { Op0, MLAOp1, MLAOp2, LaneIdxVal }; in tryMLAV64LaneV128() local
564 SDValue Ops[] = { SMULLOp0, SMULLOp1, LaneIdxVal }; in tryMULLV64LaneV128() local
993 SDValue Ops[] = { RHS }; in SelectAddrModeXRO() local
1059 SmallVector<SDValue, 4> Ops; in createTuple() local
1089 SmallVector<SDValue, 6> Ops; in SelectTable() local
1169 SDValue Ops[] = { Base, Offset, Chain }; in tryIndexedLoad() local
1197 SDValue Ops[] = {N->getOperand(2), // Mem operand; in SelectLoad() local
1224 SDValue Ops[] = {N->getOperand(1), // Mem operand in SelectPostLoad() local
1260 SDValue Ops[] = {RegSeq, N->getOperand(NumVecs + 2), N->getOperand(0)}; in SelectStore() local
1283 SDValue Ops[] = {RegSeq, in SelectPostStore() local
[all …]
/external/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp161 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemset() local
175 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag }; in EmitTargetCodeForMemset() local
258 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemcpy() local
/external/swiftshader/third_party/llvm-subzero/include/llvm/IR/
DConstant.h46 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DConstant.h44 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant()

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