1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Test-related constants for sandbox 4 * 5 * Copyright (c) 2014 Google, Inc 6 */ 7 8 #ifndef __ASM_TEST_H 9 #define __ASM_TEST_H 10 11 /* The sandbox driver always permits an I2C device with this address */ 12 #define SANDBOX_I2C_TEST_ADDR 0x59 13 14 #define SANDBOX_PCI_VENDOR_ID 0x1234 15 #define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678 16 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM 17 #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL 18 19 #define PCI_CAP_ID_PM_OFFSET 0x50 20 #define PCI_CAP_ID_EXP_OFFSET 0x60 21 #define PCI_CAP_ID_MSIX_OFFSET 0x70 22 #define PCI_CAP_ID_EA_OFFSET 0x80 23 24 #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100 25 #define PCI_EXT_CAP_ID_VC_OFFSET 0x200 26 #define PCI_EXT_CAP_ID_DSN_OFFSET 0x300 27 28 /* Useful for PCI_VDEVICE() macro */ 29 #define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID 30 #define SWAP_CASE_DRV_DATA 0x55aa 31 32 #define SANDBOX_CLK_RATE 32768 33 34 /* Macros used to test PCI EA capability structure */ 35 #define PCI_CAP_EA_BASE_LO0 0x00100000 36 #define PCI_CAP_EA_BASE_LO1 0x00110000 37 #define PCI_CAP_EA_BASE_LO2 0x00120000 38 #define PCI_CAP_EA_BASE_LO4 0x00140000 39 #define PCI_CAP_EA_BASE_HI2 0x00020000ULL 40 #define PCI_CAP_EA_BASE_HI4 0x00040000ULL 41 #define PCI_CAP_EA_SIZE_LO 0x0000ffff 42 #define PCI_CAP_EA_SIZE_HI 0x00000010ULL 43 #define PCI_EA_BAR2_MAGIC 0x72727272 44 #define PCI_EA_BAR4_MAGIC 0x74747474 45 46 /* System controller driver data */ 47 enum { 48 SYSCON0 = 32, 49 SYSCON1, 50 51 SYSCON_COUNT 52 }; 53 54 /** 55 * sandbox_i2c_set_test_mode() - set test mode for running unit tests 56 * 57 * See sandbox_i2c_xfer() for the behaviour changes. 58 * 59 * @bus: sandbox I2C bus to adjust 60 * @test_mode: true to select test mode, false to run normally 61 */ 62 void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode); 63 64 enum sandbox_i2c_eeprom_test_mode { 65 SIE_TEST_MODE_NONE, 66 /* Permits read/write of only one byte per I2C transaction */ 67 SIE_TEST_MODE_SINGLE_BYTE, 68 }; 69 70 void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, 71 enum sandbox_i2c_eeprom_test_mode mode); 72 73 void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len); 74 75 /** 76 * sandbox_i2c_rtc_set_offset() - set the time offset from system/base time 77 * 78 * @dev: RTC device to adjust 79 * @use_system_time: true to use system time, false to use @base_time 80 * @offset: RTC offset from current system/base time (-1 for no 81 * change) 82 * @return old value of RTC offset 83 */ 84 long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time, 85 int offset); 86 87 /** 88 * sandbox_i2c_rtc_get_set_base_time() - get and set the base time 89 * 90 * @dev: RTC device to adjust 91 * @base_time: New base system time (set to -1 for no change) 92 * @return old base time 93 */ 94 long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time); 95 96 int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str); 97 98 /** 99 * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD 100 * 101 * @dev: OSD device for which to access the internal memory for 102 * @buf: pointer to buffer to receive the OSD memory data 103 * @buflen: length of buffer in bytes 104 */ 105 int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen); 106 107 /** 108 * sandbox_pwm_get_config() - get the PWM config for a channel 109 * 110 * @dev: Device to check 111 * @channel: Channel number to check 112 * @period_ns: Period of the PWM in nanoseconds 113 * @duty_ns: Current duty cycle of the PWM in nanoseconds 114 * @enable: true if the PWM is enabled 115 * @polarity: true if the PWM polarity is active high 116 * @return 0 if OK, -ENOSPC if the PWM number is invalid 117 */ 118 int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, 119 uint *duty_nsp, bool *enablep, bool *polarityp); 120 121 /** 122 * sandbox_sf_set_block_protect() - Set the BP bits of the status register 123 * 124 * @dev: Device to update 125 * @bp_mask: BP bits to set (bits 2:0, so a value of 0 to 7) 126 */ 127 void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask); 128 129 /** 130 * sandbox_get_codec_params() - Read back codec parameters 131 * 132 * This reads back the parameters set by audio_codec_set_params() for the 133 * sandbox audio driver. Arguments are as for that function. 134 */ 135 void sandbox_get_codec_params(struct udevice *dev, int *interfacep, int *ratep, 136 int *mclk_freqp, int *bits_per_samplep, 137 uint *channelsp); 138 139 /** 140 * sandbox_get_i2s_sum() - Read back the sum of the audio data so far 141 * 142 * This data is provided to the sandbox driver by the I2S tx_data() method. 143 * 144 * @dev: Device to check 145 * @return sum of audio data 146 */ 147 int sandbox_get_i2s_sum(struct udevice *dev); 148 149 /** 150 * sandbox_get_setup_called() - Returns the number of times setup(*) was called 151 * 152 * This is used in the sound test 153 * 154 * @dev: Device to check 155 * @return call count for the setup() method 156 */ 157 int sandbox_get_setup_called(struct udevice *dev); 158 159 /** 160 * sandbox_get_sound_sum() - Read back the sum of the sound data so far 161 * 162 * This data is provided to the sandbox driver by the sound play() method. 163 * 164 * @dev: Device to check 165 * @return sum of audio data 166 */ 167 int sandbox_get_sound_sum(struct udevice *dev); 168 169 /** 170 * sandbox_set_allow_beep() - Set whether the 'beep' interface is supported 171 * 172 * @dev: Device to update 173 * @allow: true to allow the start_beep() method, false to disallow it 174 */ 175 void sandbox_set_allow_beep(struct udevice *dev, bool allow); 176 177 /** 178 * sandbox_get_beep_frequency() - Get the frequency of the current beep 179 * 180 * @dev: Device to check 181 * @return frequency of beep, if there is an active beep, else 0 182 */ 183 int sandbox_get_beep_frequency(struct udevice *dev); 184 185 /** 186 * sandbox_get_pch_spi_protect() - Get the PCI SPI protection status 187 * 188 * @dev: Device to check 189 * @return 0 if not protected, 1 if protected 190 */ 191 int sandbox_get_pch_spi_protect(struct udevice *dev); 192 193 /** 194 * sandbox_get_pci_ep_irq_count() - Get the PCI EP IRQ count 195 * 196 * @dev: Device to check 197 * @return irq count 198 */ 199 int sandbox_get_pci_ep_irq_count(struct udevice *dev); 200 201 /** 202 * sandbox_pci_read_bar() - Read the BAR value for a read_config operation 203 * 204 * This is used in PCI emulators to read a base address reset. This has special 205 * rules because when the register is set to 0xffffffff it can be used to 206 * discover the type and size of the BAR. 207 * 208 * @barval: Current value of the BAR 209 * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or 210 * PCI_BASE_ADDRESS_MEM_TYPE_32) 211 * @size: Size of BAR in bytes 212 * @return BAR value to return from emulator 213 */ 214 uint sandbox_pci_read_bar(u32 barval, int type, uint size); 215 216 /** 217 * sandbox_set_enable_memio() - Enable readl/writel() for sandbox 218 * 219 * Normally these I/O functions do nothing with sandbox. Certain tests need them 220 * to work as for other architectures, so this function can be used to enable 221 * them. 222 * 223 * @enable: true to enable, false to disable 224 */ 225 void sandbox_set_enable_memio(bool enable); 226 227 #endif 228