1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 4 */ 5 6 #ifndef _MALTA_CONFIG_H 7 #define _MALTA_CONFIG_H 8 9 /* 10 * System configuration 11 */ 12 #define CONFIG_MALTA 13 14 #define CONFIG_MEMSIZE_IN_BYTES 15 16 #define CONFIG_PCI_GT64120 17 #define CONFIG_PCI_MSC01 18 #define CONFIG_PCNET 19 #define CONFIG_PCNET_79C973 20 #define PCNET_HAS_PROM 21 22 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 23 24 /* 25 * CPU Configuration 26 */ 27 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 28 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 29 30 /* 31 * Memory map 32 */ 33 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 34 35 #ifdef CONFIG_64BIT 36 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 37 #else 38 # define CONFIG_SYS_SDRAM_BASE 0x80000000 39 #endif 40 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 41 42 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 43 44 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 45 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 46 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 47 48 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 49 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 50 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 51 52 /* 53 * Serial driver 54 */ 55 #define CONFIG_SYS_NS16550_PORT_MAPPED 56 57 /* 58 * Flash configuration 59 */ 60 #ifdef CONFIG_64BIT 61 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 62 #else 63 # define CONFIG_SYS_FLASH_BASE 0xbe000000 64 #endif 65 #define CONFIG_SYS_MAX_FLASH_BANKS 1 66 #define CONFIG_SYS_MAX_FLASH_SECT 128 67 68 /* 69 * Environment 70 */ 71 72 /* 73 * IDE/ATA 74 */ 75 #define CONFIG_SYS_IDE_MAXBUS 1 76 #define CONFIG_SYS_IDE_MAXDEVICE 2 77 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 78 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 79 #define CONFIG_SYS_ATA_DATA_OFFSET 0 80 #define CONFIG_SYS_ATA_REG_OFFSET 0 81 82 /* 83 * Commands 84 */ 85 86 #endif /* _MALTA_CONFIG_H */ 87