| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 287 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
303 reg_instructions(unsigned Reg) const { in reg_instructions()
318 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
338 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
355 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
372 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
390 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
406 def_instructions(unsigned Reg) const { in def_instructions()
421 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
429 StringRef getVRegName(unsigned Reg) const { in getVRegName()
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| D | LiveRegUnits.h | 57 unsigned Reg = O->getReg(); in accumulateUsedDefed() local
88 void addReg(unsigned Reg) { in addReg()
95 void addRegMasked(unsigned Reg, LaneBitmask Mask) { in addRegMasked()
104 void removeReg(unsigned Reg) { in removeReg()
118 bool available(unsigned Reg) const { in available()
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| D | LivePhysRegs.h | 79 void addReg(unsigned Reg) { in addReg()
89 void removeReg(unsigned Reg) { in removeReg()
106 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 34 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
49 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
60 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
77 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVectorPrint.cpp | 74 static bool isVecReg(unsigned Reg) { in isVecReg()
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
144 unsigned Reg = 0; in runOnMachineFunction() local
152 unsigned Reg = 0; in runOnMachineFunction() local
168 unsigned Reg = 0; in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 44 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
60 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
72 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
90 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 62 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
67 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
72 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
77 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 252 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
268 reg_instructions(unsigned Reg) const { in reg_instructions()
283 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
303 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
320 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
337 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
355 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
371 def_instructions(unsigned Reg) const { in def_instructions()
386 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
411 inline iterator_range<use_iterator> use_operands(unsigned Reg) const { in use_operands()
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| D | LivePhysRegs.h | 74 void addReg(unsigned Reg) { in addReg()
84 void removeReg(unsigned Reg) { in removeReg()
100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 67 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
72 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
77 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
82 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 76 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
89 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
110 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup()
120 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive()
166 unsigned Reg = *AI; in StartBlock() local
180 unsigned Reg = *I; in StartBlock() local
211 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
236 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
256 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
302 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | MachineCopyPropagation.cpp | 143 for (unsigned Reg : Regs) { in removeRegsFromMap() local
159 unsigned Reg = I->first; in removeClobberedRegsFromMap() local
165 void MachineCopyPropagation::ClobberRegister(unsigned Reg) { in ClobberRegister()
178 void MachineCopyPropagation::ReadRegister(unsigned Reg) { in ReadRegister()
443 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
466 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
491 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
510 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
533 unsigned Reg = MaybeDead->getOperand(0).getReg(); in CopyPropagateBlock() local
565 for (unsigned Reg : Defs) in CopyPropagateBlock() local
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| D | LivePhysRegs.cpp | 50 unsigned Reg = O->getReg(); in removeDefs() local
64 unsigned Reg = O->getReg(); in addUses() local
90 unsigned Reg = O->getReg(); in stepForward() local
108 for (auto Reg : Clobbers) { in stepForward() local
160 unsigned Reg = LI.PhysReg; in addBlockLiveIns() local
263 for (MCPhysReg Reg : LiveRegs) { in addLiveIns() local
296 unsigned Reg = MO->getReg(); in recomputeLivenessFlags() local
313 unsigned Reg = MO->getReg(); in recomputeLivenessFlags() local
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| D | MachineRegisterInfo.cpp | 59 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { in setRegClass()
64 void MachineRegisterInfo::setRegBank(unsigned Reg, in setRegBank()
70 constrainRegClass(MachineRegisterInfo &MRI, unsigned Reg, in constrainRegClass()
86 MachineRegisterInfo::constrainRegClass(unsigned Reg, in constrainRegClass()
93 MachineRegisterInfo::constrainRegAttrs(unsigned Reg, in constrainRegAttrs()
130 MachineRegisterInfo::recomputeRegClass(unsigned Reg) { in recomputeRegClass()
155 unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local
173 unsigned Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
192 unsigned Reg = createIncompleteVirtualRegister(Name); in createGenericVirtualRegister() local
207 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in clearVirtRegs() local
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| D | CriticalAntiDepBreaker.cpp | 76 unsigned Reg = *AI; in StartBlock() local
90 unsigned Reg = *I; in StartBlock() local
94 unsigned Reg = *AI; in StartBlock() local
120 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
191 unsigned Reg = MO.getReg(); in PrescanInstruction() local
276 unsigned Reg = MO.getReg(); in ScanInstruction() local
307 unsigned Reg = MO.getReg(); in ScanInstruction() local
467 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
616 unsigned Reg = MO.getReg(); in BreakAntiDependencies() local
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| D | LiveVariables.cpp | 182 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { in HandleVirtRegDef()
192 MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, in FindLastPartialDef()
231 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { in HandlePhysRegUse()
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { in FindLastRefOrPartRef()
311 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { in HandlePhysRegKill()
426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
443 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, in HandlePhysRegDef()
489 unsigned Reg = Defs.back(); in UpdatePhysRegDefs() local
658 const unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
683 void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, in replaceKillInstruction()
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| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 60 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
73 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
95 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
106 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
154 unsigned Reg = *AI; in StartBlock() local
167 unsigned Reg = *I; in StartBlock() local
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
222 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
242 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
288 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | MachineCopyPropagation.cpp | 88 for (unsigned Reg : Regs) { in removeRegsFromMap() local
104 unsigned Reg = I->first; in removeClobberedRegsFromMap() local
110 void MachineCopyPropagation::ClobberRegister(unsigned Reg) { in ClobberRegister()
262 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
302 unsigned Reg = MaybeDead->getOperand(0).getReg(); in CopyPropagateBlock() local
334 for (unsigned Reg : Defs) in CopyPropagateBlock() local
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| D | LiveVariables.cpp | 182 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { in HandleVirtRegDef()
192 MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, in FindLastPartialDef()
231 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { in HandlePhysRegUse()
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { in FindLastRefOrPartRef()
311 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { in HandlePhysRegKill()
426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
443 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, in HandlePhysRegDef()
489 unsigned Reg = Defs.back(); in UpdatePhysRegDefs() local
658 const unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
683 void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, in replaceKillInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 55 unsigned Reg; member
73 void setReg(unsigned Reg) { in setReg()
279 unsigned Reg = getRegForValue(Op); in computeAddress() local
366 unsigned Reg = getRegForValue(Obj); in computeAddress() local
375 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local
410 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value()
428 unsigned Reg = getRegForValue(V); in getRegForI1Value() local
434 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32()
472 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32()
508 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.cpp | 34 for (auto Reg : RegList) { in CC_X86_32_RegCall_Assign2Regs() local
47 unsigned Reg = State.AllocateReg(AvailableRegs[I]); in CC_X86_32_RegCall_Assign2Regs() local
95 for (auto Reg : RegList) { in CC_X86_VectorCallAssignRegister() local
148 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) { in CC_X86_64_VectorCall() local
191 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) { in CC_X86_32_VectorCall() local
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1143 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local
1154 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local
1165 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local
1176 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local
1187 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local
1216 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local
1228 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local
1239 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local
1250 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local
1261 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 770 unsigned Reg; in DecodeGPR64RegisterClass() local
783 unsigned Reg; in DecodeGPR32RegisterClass() local
811 unsigned Reg; in DecodeFGR64RegisterClass() local
824 unsigned Reg; in DecodeFGR32RegisterClass() local
837 unsigned Reg; in DecodeCCRRegisterClass() local
850 unsigned Reg; in DecodeFCCRegisterClass() local
863 unsigned Reg; in DecodeCCRegisterClass() local
876 unsigned Reg; in DecodeFGRCCRegisterClass() local
890 unsigned Reg = fieldFromInstruction(Insn, 16, 5); in DecodeMem() local
927 unsigned Reg = fieldFromInstruction(Insn, 6, 5); in DecodeMSA128Mem() local
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 58 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } in setVarargBufferVreg()
79 unsigned getWAReg(unsigned Reg) const { in getWAReg()
85 static unsigned getWARegStackId(unsigned Reg) { in getWARegStackId()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 70 inline static unsigned getHexagonRegisterPair(unsigned Reg, in getHexagonRegisterPair()
266 MCOperand Reg = Inst.getOperand(0); in HexagonProcessInstruction() local
288 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
307 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
332 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
343 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
355 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
367 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction() local
556 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
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