| /external/toolchain-utils/llvm_tools/ |
| D | git_llvm_rev.py | 42 class Rev(t.NamedTuple('Rev', (('branch', str), ('number', int)))): class
230 def translate_prebase_rev_to_sha(llvm_config: LLVMConfig, rev: Rev) -> str:
266 def translate_rev_to_sha(llvm_config: LLVMConfig, rev: Rev) -> str:
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| D | git_llvm_rev_test.py | 71 def rev_to_sha_with_round_trip(self, rev: git_llvm_rev.Rev) -> str:
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| /external/python/cpython2/Demo/classes/ |
| D | Rev.py | 62 class Rev: class
|
| /external/vixl/benchmarks/aarch64/ |
| D | bench-utils.cc | 207 __ Rev(PickR(size), PickR(size)); in GenerateTrivialSequence() local
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| /external/clang/utils/TableGen/ |
| D | NeonEmitter.cpp | 1601 class Rev : public SetTheory::Operator { in emitDagShuffle() class
1605 Rev(unsigned ElementSize) : ElementSize(ElementSize) {} in emitDagShuffle() function in Intrinsic::DagEmitter::emitDagShuffle::Rev
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| /external/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64-inl.h | 852 void TurboAssembler::Rev(const Register& rd, const Register& rn) { in Rev() function
865 void MacroAssembler::Rev(const Register& rd, const Register& rn) { in Rev() function
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| /external/v8/src/compiler/backend/arm64/ |
| D | code-generator-arm64.cc | 1458 __ Rev(i.OutputRegister64(), i.InputRegister64(0)); in AssembleArchInstruction() local
1461 __ Rev(i.OutputRegister32(), i.InputRegister32(0)); in AssembleArchInstruction() local
|
| /external/tensorflow/tensorflow/compiler/xla/client/ |
| D | xla_builder.cc | 1608 XlaOp XlaBuilder::Rev(XlaOp operand, absl::Span<const int64> dimensions) { in Rev() function in xla::XlaBuilder
3435 XlaOp Rev(const XlaOp operand, absl::Span<const int64> dimensions) { in Rev() function
|
| /external/python/cpython3/Lib/test/ |
| D | test_collections.py | 930 class Rev: class
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 413 Rev, enumerator
|
| /external/clang/lib/Basic/ |
| D | Targets.cpp | 142 unsigned Maj, Min, Rev; in getDarwinDefines() local
452 unsigned Maj, Min, Rev; in getOSDefines() local
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 2108 void Rev(const Register& rd, const Register& rn) { in Rev() function
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 1507 __ Rev(w4, w24); in TEST() local
1510 __ Rev(x7, x24); in TEST() local
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 3062 void Rev(Condition cond, Register rd, Register rm) { in Rev() function
3071 void Rev(Register rd, Register rm) { Rev(al, rd, rm); } in Rev() function
|