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Searched defs:Ror (Results 1 – 10 of 10) sorted by relevance

/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc6285 __ Ror(x16, x0, x1); in TEST() local
6286 __ Ror(x17, x0, x2); in TEST() local
6287 __ Ror(x18, x0, x3); in TEST() local
6288 __ Ror(x19, x0, x4); in TEST() local
6289 __ Ror(x20, x0, x5); in TEST() local
6290 __ Ror(x21, x0, x6); in TEST() local
6292 __ Ror(w22, w0, w1); in TEST() local
6293 __ Ror(w23, w0, w2); in TEST() local
6294 __ Ror(w24, w0, w3); in TEST() local
6295 __ Ror(w25, w0, w4); in TEST() local
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/external/v8/src/codegen/arm64/
Dmacro-assembler-arm64-inl.h883 void TurboAssembler::Ror(const Register& rd, const Register& rs, in Ror() function
890 void TurboAssembler::Ror(const Register& rd, const Register& rn, in Ror() function
/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.cc2662 void Assembler::Ror(Register rd, Register rm, const Operand& shift_imm, in Ror() function in dart::Assembler
2670 void Assembler::Ror(Register rd, Register rm, Register rs, Condition cond) { in Ror() function in dart::Assembler
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h2185 void Ror(const Register& rd, const Register& rs, unsigned shift) { in Ror() function
2192 void Ror(const Register& rd, const Register& rn, const Register& rm) { in Ror() function
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc786 __ Ror(r6, r1, 20); in TEST() local
816 __ Ror(r6, r1, r9); in TEST() local
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.h3095 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) { in Ror() function
3109 void Ror(Register rd, Register rm, const Operand& operand) { in Ror() function
3112 void Ror(FlagsUpdate flags, in Ror() function
3136 void Ror(FlagsUpdate flags, in Ror() function
/external/v8/src/codegen/mips/
Dmacro-assembler-mips.cc914 void TurboAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror() function in v8::internal::TurboAssembler
/external/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc1173 __ Ror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction() local
/external/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc1252 __ Ror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction() local
/external/v8/src/codegen/mips64/
Dmacro-assembler-mips64.cc1050 void TurboAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror() function in v8::internal::TurboAssembler