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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the sh7752evb board
4  *
5  * Copyright (C) 2012 Renesas Solutions Corp.
6  */
7 
8 #ifndef __SH7752EVB_H
9 #define __SH7752EVB_H
10 
11 #define CONFIG_CPU_SH7752	1
12 
13 #define CONFIG_DISPLAY_BOARDINFO
14 
15 /* MEMORY */
16 #define SH7752EVB_SDRAM_BASE		(0x40000000)
17 #define SH7752EVB_SDRAM_SIZE		(512 * 1024 * 1024)
18 
19 #define CONFIG_SYS_PBSIZE		256
20 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
21 
22 /* SCIF */
23 #define CONFIG_CONS_SCIF2	1
24 
25 #define CONFIG_SYS_MEMTEST_START	(SH7752EVB_SDRAM_BASE)
26 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
27 					 480 * 1024 * 1024)
28 #undef	CONFIG_SYS_MEMTEST_SCRATCH
29 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
30 
31 #define CONFIG_SYS_SDRAM_BASE		(SH7752EVB_SDRAM_BASE)
32 #define CONFIG_SYS_SDRAM_SIZE		(SH7752EVB_SDRAM_SIZE)
33 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
34 					 128 * 1024 * 1024)
35 
36 #define CONFIG_SYS_MONITOR_BASE		0x00000000
37 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
38 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
39 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
40 
41 /* Ether */
42 #define CONFIG_SH_ETHER_USE_PORT	0
43 #define CONFIG_SH_ETHER_PHY_ADDR	18
44 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
45 #define CONFIG_SH_ETHER_USE_GETHER	1
46 #define CONFIG_BITBANGMII
47 #define CONFIG_BITBANGMII_MULTI
48 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
49 #define CONFIG_PHY_VITESSE
50 
51 #define SH7752EVB_ETHERNET_MAC_BASE_SPI	0x00090000
52 #define SH7752EVB_SPI_SECTOR_SIZE	(64 * 1024)
53 #define SH7752EVB_ETHERNET_MAC_BASE	SH7752EVB_ETHERNET_MAC_BASE_SPI
54 #define SH7752EVB_ETHERNET_MAC_SIZE	17
55 #define SH7752EVB_ETHERNET_NUM_CH	2
56 
57 /* SPI */
58 #define CONFIG_SH_SPI_BASE		0xfe002000
59 
60 /* MMCIF */
61 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
62 #define CONFIG_SH_MMCIF_CLK		48000000
63 
64 /* ENV setting */
65 #define CONFIG_ENV_OVERWRITE	1
66 #define CONFIG_EXTRA_ENV_SETTINGS				\
67 		"netboot=bootp; bootm\0"
68 
69 /* Board Clock */
70 #define CONFIG_SYS_CLK_FREQ	48000000
71 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
72 #endif	/* __SH7752EVB_H */
73