| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 105 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64()
114 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64()
130 unsigned &SubReg) { in getSrcFromCopy()
246 unsigned SubReg; in isProfitableToTransform() local
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| D | AArch64ISelDAGToDAG.cpp | 606 SDValue SubReg = CurDAG->getTargetConstant(AArch64::sub_32, dl, MVT::i32); in narrowIfNeeded() local
822 SDValue SubReg = CurDAG->getTargetConstant(AArch64::sub_32, dl, MVT::i32); in Widen() local
1175 SDValue SubReg = CurDAG->getTargetConstant(AArch64::sub_32, dl, MVT::i32); in tryIndexedLoad() local
1805 SDValue SubReg = CurDAG->getTargetConstant(AArch64::sub_32, dl, MVT::i32); in tryBitfieldExtractOp() local
2538 SDValue SubReg = CurDAG->getTargetConstant(AArch64::sub_32, DL, MVT::i32); in tryShiftAmountMod() local
2849 unsigned SubReg; in Select() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 112 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64()
121 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64()
137 unsigned &SubReg) { in getSrcFromCopy()
253 unsigned SubReg; in isProfitableToTransform() local
|
| /external/llvm/lib/CodeGen/ |
| D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local
252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local
291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local
340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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| D | DetectDeadLanes.cpp | 180 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local
430 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local
463 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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| D | LiveRangeCalc.cpp | 65 unsigned SubReg = MO.getSubReg(); in calculate() local
175 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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| D | LiveIntervalAnalysis.cpp | 522 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local
956 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1319 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local
1421 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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| D | MachineInstrBundle.cpp | 188 unsigned SubReg = *SubRegs; in finalizeBundle() local
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| D | VirtRegMap.cpp | 405 unsigned SubReg = MO.getSubReg(); in rewrite() local
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| D | PeepholeOptimizer.cpp | 225 ValueTrackerResult(unsigned Reg, unsigned SubReg) : Inst(nullptr) { in ValueTrackerResult()
616 bool PeepholeOptimizer::findNextSource(unsigned Reg, unsigned SubReg, in findNextSource()
1261 unsigned Reg, SubReg, CopyDefReg, CopyDefSubReg; in optimizeUncoalescableCopy() local
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| D | LiveRangeEdit.cpp | 227 unsigned SubReg = MO.getSubReg(); in useIsKill() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local
252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local
291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local
340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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| D | DetectDeadLanes.cpp | 178 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local
428 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local
461 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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| D | LiveRangeCalc.cpp | 87 unsigned SubReg = MO.getSubReg(); in calculate() local
177 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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| D | LiveIntervals.cpp | 557 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local
997 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1395 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local
1502 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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| D | MachineInstrBundle.cpp | 190 unsigned SubReg = *SubRegs; in finalizeBundle() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFormMemoryClauses.cpp | 364 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction()
373 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction()
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| D | SIRegisterInfo.cpp | 585 unsigned SubReg = NumSubRegs == 1 ? in buildSpillLoadStore() local
701 unsigned SubReg = NumSubRegs == 1 ? in spillSGPR() local
873 unsigned SubReg = NumSubRegs == 1 ? in restoreSGPR() local
1513 unsigned SubReg, in shouldCoalesce()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFMIPeephole.cpp | 163 unsigned SubReg = MovMI->getOperand(1).getReg(); in eliminateZExtSeq() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 464 unsigned SubReg = NumSubRegs > 1 ? in buildScratchLoadStore() local
525 unsigned SubReg = getPhysRegSubReg(SuperReg, in eliminateFrameIndex() local
590 unsigned SubReg = getPhysRegSubReg(MI->getOperand(0).getReg(), in eliminateFrameIndex() local
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| D | SIFixSGPRCopies.cpp | 200 unsigned SubReg = CopyUse.getOperand(1).getSubReg(); in foldVGPRCopyIntoRegSequence() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 248 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 249 unsigned SubReg, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 257 for (const auto &SubReg : SubRegs) { in inheritRegUnits() local
352 for (const auto &SubReg : Map) in computeSubRegs() local
358 for (const auto &SubReg : SubRegs) { in computeSubRegs() local
477 const CodeGenRegister *SubReg; in computeSecondarySubRegs() local
1989 CodeGenRegister *SubReg = S->second; in computeRegUnitLaneMasks() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 921 unsigned SubReg, in shouldCoalesce()
954 unsigned SubReg; variable
|