Searched defs:Ty0 (Results 1 – 11 of 11) sorted by relevance
125 const LLT &Ty0 = Query.Types[0]; in AMDGPULegalizerInfo() local177 const LLT &Ty0 = Query.Types[0]; in AMDGPULegalizerInfo() local
210 bool AMDGPURewriteOutArguments::isVec3ToVec4Shuffle(Type *Ty0, Type* Ty1) const { in isVec3ToVec4Shuffle()
206 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local216 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping() local
105 const LLT &Ty0 = Query.Types[0]; in AArch64LegalizerInfo() local123 const LLT &Ty0 = Query.Types[0]; in AArch64LegalizerInfo() local
505 static unsigned getElSizeLog2Diff(Type *Ty0, Type *Ty1) { in getElSizeLog2Diff()
425 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) { in getWiderType()
375 Type *Ty0 = cast<Instruction>(VL[BaseIndex])->getOperand(0)->getType(); in getSameOpcode() local1794 Type *Ty0 = VL0->getOperand(0)->getType(); in buildTree_rec() local
1538 auto *Ty0 = II->getArgOperand(0)->getType(); in SimplifyDemandedVectorElts() local
1093 Type *Ty0 = P->getIncomingValue(0)->getType(); in promoteTypes() local
1301 Type *Ty0 = cast<Instruction>(VL0)->getOperand(0)->getType(); in buildTree_rec() local
4508 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) { in getWiderType()