| /external/arm-trusted-firmware/plat/marvell/a3700/common/ |
| D | dram_win.c | 187 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local
223 uint32_t base_reg, ctrl_reg, size_reg, remap_reg; in cpu_win_set() local
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| /external/u-boot/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.h | 23 void *base_reg; member
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| /external/u-boot/drivers/pinctrl/broadcom/ |
| D | pinctrl-bcm283x.c | 26 u32 *base_reg; member
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_reg_allocate.cpp | 138 for (int base_reg = j; in brw_vec4_alloc_reg_set() local
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| D | brw_fs_reg_allocate.cpp | 228 for (int base_reg = j; in brw_alloc_reg_set() local
242 for (int base_reg = j; in brw_alloc_reg_set() local
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state_init.c | 426 uint32_t base_reg; in cube_emit_cs() local
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 282 unsigned int base_reg, unsigned int reg) in ra_add_transitive_reg_conflict()
301 unsigned int base_reg, unsigned int reg0, unsigned int reg1) in ra_add_transitive_reg_pair_conflict()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cmd_buffer.c | 710 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_userdata_address() local
940 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_inline_push_consts() local
2847 uint32_t base_reg; in radv_emit_streamout_buffers() local
2951 uint32_t base_reg; in radv_flush_ngg_gs_state() local
5047 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_view_index() local
5054 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; in radv_emit_view_index() local
5095 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; in radv_cs_emit_indirect_draw_packet() local
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| /external/u-boot/arch/arm/mach-tegra/ |
| D | clock.c | 592 u32 base_reg, misc_reg; in clock_set_rate() local
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| /external/v8/src/diagnostics/x64/ |
| D | disasm-x64.cc | 336 int base_reg(int low_bits) { return low_bits | ((rex_ & 0x01) << 3); } in base_reg() function in disasm::DisassemblerX64
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| /external/v8/src/interpreter/ |
| D | interpreter-assembler.cc | 298 TNode<IntPtrT> base_reg = RegisterLocation( in GetRegisterListAtOperandIndex() local
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_32.c | 891 #define EMIT_DATA_TRANSFER(type, add, target_reg, base_reg, arg) \ argument
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| /external/mesa3d/src/freedreno/decode/ |
| D | cffdec.c | 1441 const unsigned base_reg = in cp_load_state() local
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| /external/pcre/dist2/src/ |
| D | pcre2_jit_compile.c | 2328 int from_sp, base_reg, offset, i; in copy_recurse_data() local
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| /external/v8/src/compiler/backend/mips/ |
| D | code-generator-mips.cc | 919 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
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| /external/v8/src/codegen/x64/ |
| D | assembler-x64.cc | 143 int base_reg = (has_sib ? operand.data().buf[1] : modrm) & 0x07; in Operand() local
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| /external/v8/src/compiler/backend/mips64/ |
| D | code-generator-mips64.cc | 898 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
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| /external/v8/src/builtins/x64/ |
| D | builtins-x64.cc | 3707 Register base_reg = r15; in CallApiFunctionAndReturn() local
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| /external/v8/src/execution/s390/ |
| D | simulator-s390.cc | 2926 #define GET_ADDRESS(index_reg, base_reg, offset) \ argument
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