1 // Copyright 2014 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 // Declares a Simulator for S390 instructions if we are not generating a native 6 // S390 binary. This Simulator allows us to run and debug S390 code generation 7 // on regular desktop machines. 8 // V8 calls into generated code via the GeneratedCode wrapper, 9 // which will start execution in the Simulator or forwards to the real entry 10 // on a S390 hardware platform. 11 12 #ifndef V8_EXECUTION_S390_SIMULATOR_S390_H_ 13 #define V8_EXECUTION_S390_SIMULATOR_S390_H_ 14 15 // globals.h defines USE_SIMULATOR. 16 #include "src/common/globals.h" 17 18 #if defined(USE_SIMULATOR) 19 // Running with a simulator. 20 21 #include "src/base/hashmap.h" 22 #include "src/codegen/assembler.h" 23 #include "src/codegen/s390/constants-s390.h" 24 #include "src/execution/simulator-base.h" 25 #include "src/utils/allocation.h" 26 27 namespace v8 { 28 namespace internal { 29 30 class CachePage { 31 public: 32 static const int LINE_VALID = 0; 33 static const int LINE_INVALID = 1; 34 35 static const int kPageShift = 12; 36 static const int kPageSize = 1 << kPageShift; 37 static const int kPageMask = kPageSize - 1; 38 static const int kLineShift = 2; // The cache line is only 4 bytes right now. 39 static const int kLineLength = 1 << kLineShift; 40 static const int kLineMask = kLineLength - 1; 41 CachePage()42 CachePage() { memset(&validity_map_, LINE_INVALID, sizeof(validity_map_)); } 43 ValidityByte(int offset)44 char* ValidityByte(int offset) { 45 return &validity_map_[offset >> kLineShift]; 46 } 47 CachedData(int offset)48 char* CachedData(int offset) { return &data_[offset]; } 49 50 private: 51 char data_[kPageSize]; // The cached data. 52 static const int kValidityMapSize = kPageSize >> kLineShift; 53 char validity_map_[kValidityMapSize]; // One byte per line. 54 }; 55 56 class Simulator : public SimulatorBase { 57 public: 58 friend class S390Debugger; 59 enum Register { 60 no_reg = -1, 61 r0 = 0, 62 r1 = 1, 63 r2 = 2, 64 r3 = 3, 65 r4 = 4, 66 r5 = 5, 67 r6 = 6, 68 r7 = 7, 69 r8 = 8, 70 r9 = 9, 71 r10 = 10, 72 r11 = 11, 73 r12 = 12, 74 r13 = 13, 75 r14 = 14, 76 r15 = 15, 77 fp = r11, 78 ip = r12, 79 cp = r13, 80 ra = r14, 81 sp = r15, // name aliases 82 kNumGPRs = 16, 83 d0 = 0, 84 d1, 85 d2, 86 d3, 87 d4, 88 d5, 89 d6, 90 d7, 91 d8, 92 d9, 93 d10, 94 d11, 95 d12, 96 d13, 97 d14, 98 d15, 99 kNumFPRs = 16 100 }; 101 102 explicit Simulator(Isolate* isolate); 103 ~Simulator(); 104 105 // The currently executing Simulator instance. Potentially there can be one 106 // for each native thread. 107 static Simulator* current(v8::internal::Isolate* isolate); 108 109 // Accessors for register state. 110 void set_register(int reg, uint64_t value); 111 const uint64_t& get_register(int reg) const; 112 uint64_t& get_register(int reg); 113 template <typename T> 114 T get_low_register(int reg) const; 115 template <typename T> 116 T get_high_register(int reg) const; 117 void set_low_register(int reg, uint32_t value); 118 void set_high_register(int reg, uint32_t value); 119 120 double get_double_from_register_pair(int reg); set_d_register_from_double(int dreg,const double dbl)121 void set_d_register_from_double(int dreg, const double dbl) { 122 DCHECK(dreg >= 0 && dreg < kNumFPRs); 123 set_simd_register_by_lane<double>(dreg, 0, dbl); 124 } 125 get_double_from_d_register(int dreg)126 double get_double_from_d_register(int dreg) { 127 DCHECK(dreg >= 0 && dreg < kNumFPRs); 128 return get_simd_register_by_lane<double>(dreg, 0); 129 } 130 set_d_register(int dreg,int64_t value)131 void set_d_register(int dreg, int64_t value) { 132 DCHECK(dreg >= 0 && dreg < kNumFPRs); 133 set_simd_register_by_lane<int64_t>(dreg, 0, value); 134 } 135 get_d_register(int dreg)136 int64_t get_d_register(int dreg) { 137 DCHECK(dreg >= 0 && dreg < kNumFPRs); 138 return get_simd_register_by_lane<int64_t>(dreg, 0); 139 } 140 set_d_register_from_float32(int dreg,const float f)141 void set_d_register_from_float32(int dreg, const float f) { 142 DCHECK(dreg >= 0 && dreg < kNumFPRs); 143 144 int32_t f_int = *bit_cast<int32_t*>(&f); 145 int64_t finalval = static_cast<int64_t>(f_int) << 32; 146 set_d_register(dreg, finalval); 147 } 148 get_float32_from_d_register(int dreg)149 float get_float32_from_d_register(int dreg) { 150 DCHECK(dreg >= 0 && dreg < kNumFPRs); 151 152 int64_t regval = get_d_register(dreg) >> 32; 153 int32_t regval32 = static_cast<int32_t>(regval); 154 return *bit_cast<float*>(®val32); 155 } 156 157 // Special case of set_register and get_register to access the raw PC value. 158 void set_pc(intptr_t value); 159 intptr_t get_pc() const; 160 get_sp()161 Address get_sp() const { return static_cast<Address>(get_register(sp)); } 162 163 // Accessor to the internal simulator stack area. 164 uintptr_t StackLimit(uintptr_t c_limit) const; 165 166 // Executes S390 instructions until the PC reaches end_sim_pc. 167 void Execute(); 168 169 template <typename Return, typename... Args> Call(Address entry,Args...args)170 Return Call(Address entry, Args... args) { 171 return VariadicCall<Return>(this, &Simulator::CallImpl, entry, args...); 172 } 173 174 // Alternative: call a 2-argument double function. 175 void CallFP(Address entry, double d0, double d1); 176 int32_t CallFPReturnsInt(Address entry, double d0, double d1); 177 double CallFPReturnsDouble(Address entry, double d0, double d1); 178 179 // Push an address onto the JS stack. 180 uintptr_t PushAddress(uintptr_t address); 181 182 // Pop an address from the JS stack. 183 uintptr_t PopAddress(); 184 185 // Debugger input. 186 void set_last_debugger_input(char* input); last_debugger_input()187 char* last_debugger_input() { return last_debugger_input_; } 188 189 // Redirection support. 190 static void SetRedirectInstruction(Instruction* instruction); 191 192 // ICache checking. 193 static bool ICacheMatch(void* one, void* two); 194 static void FlushICache(base::CustomMatcherHashMap* i_cache, void* start, 195 size_t size); 196 197 // Returns true if pc register contains one of the 'special_values' defined 198 // below (bad_lr, end_sim_pc). 199 bool has_bad_pc() const; 200 201 private: 202 enum special_values { 203 // Known bad pc value to ensure that the simulator does not execute 204 // without being properly setup. 205 bad_lr = -1, 206 // A pc value used to signal the simulator to stop execution. Generally 207 // the lr is set to this value on transition from native C code to 208 // simulated execution, so that the simulator can "return" to the native 209 // C code. 210 end_sim_pc = -2 211 }; 212 213 intptr_t CallImpl(Address entry, int argument_count, 214 const intptr_t* arguments); 215 216 // Unsupported instructions use Format to print an error and stop execution. 217 void Format(Instruction* instr, const char* format); 218 219 // Helper functions to set the conditional flags in the architecture state. 220 bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0); 221 bool BorrowFrom(int32_t left, int32_t right); 222 template <typename T1> 223 inline bool OverflowFromSigned(T1 alu_out, T1 left, T1 right, bool addition); 224 225 // Helper functions to decode common "addressing" modes 226 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 227 int32_t GetImm(Instruction* instr, bool* carry_out); 228 void ProcessPUW(Instruction* instr, int num_regs, int operand_size, 229 intptr_t* start_address, intptr_t* end_address); 230 void HandleRList(Instruction* instr, bool load); 231 void HandleVList(Instruction* inst); 232 void SoftwareInterrupt(Instruction* instr); 233 void DebugAtNextPC(); 234 235 // Stop helper functions. 236 inline bool isStopInstruction(Instruction* instr); 237 inline bool isWatchedStop(uint32_t bkpt_code); 238 inline bool isEnabledStop(uint32_t bkpt_code); 239 inline void EnableStop(uint32_t bkpt_code); 240 inline void DisableStop(uint32_t bkpt_code); 241 inline void IncreaseStopCounter(uint32_t bkpt_code); 242 void PrintStopInfo(uint32_t code); 243 244 // Byte Reverse 245 inline int16_t ByteReverse(int16_t hword); 246 inline int32_t ByteReverse(int32_t word); 247 inline int64_t ByteReverse(int64_t dword); 248 249 // Read and write memory. 250 inline uint8_t ReadBU(intptr_t addr); 251 inline int8_t ReadB(intptr_t addr); 252 inline void WriteB(intptr_t addr, uint8_t value); 253 inline void WriteB(intptr_t addr, int8_t value); 254 255 inline uint16_t ReadHU(intptr_t addr, Instruction* instr); 256 inline int16_t ReadH(intptr_t addr, Instruction* instr); 257 // Note: Overloaded on the sign of the value. 258 inline void WriteH(intptr_t addr, uint16_t value, Instruction* instr); 259 inline void WriteH(intptr_t addr, int16_t value, Instruction* instr); 260 261 inline uint32_t ReadWU(intptr_t addr, Instruction* instr); 262 inline int32_t ReadW(intptr_t addr, Instruction* instr); 263 inline int64_t ReadW64(intptr_t addr, Instruction* instr); 264 inline void WriteW(intptr_t addr, uint32_t value, Instruction* instr); 265 inline void WriteW(intptr_t addr, int32_t value, Instruction* instr); 266 267 inline int64_t ReadDW(intptr_t addr); 268 inline double ReadDouble(intptr_t addr); 269 inline float ReadFloat(intptr_t addr); 270 inline void WriteDW(intptr_t addr, int64_t value); 271 272 // S390 273 void Trace(Instruction* instr); 274 275 // Used by the CL**BR instructions. 276 template <typename T1, typename T2> SetS390RoundConditionCode(T1 r2_val,T2 max,T2 min)277 void SetS390RoundConditionCode(T1 r2_val, T2 max, T2 min) { 278 condition_reg_ = 0; 279 double r2_dval = static_cast<double>(r2_val); 280 double dbl_min = static_cast<double>(min); 281 double dbl_max = static_cast<double>(max); 282 283 if (r2_dval == 0.0) 284 condition_reg_ = 8; 285 else if (r2_dval < 0.0 && r2_dval >= dbl_min && std::isfinite(r2_dval)) 286 condition_reg_ = 4; 287 else if (r2_dval > 0.0 && r2_dval <= dbl_max && std::isfinite(r2_dval)) 288 condition_reg_ = 2; 289 else 290 condition_reg_ = 1; 291 } 292 293 template <typename T1> SetS390RoundConditionCode(T1 r2_val,int64_t max,int64_t min)294 void SetS390RoundConditionCode(T1 r2_val, int64_t max, int64_t min) { 295 condition_reg_ = 0; 296 double r2_dval = static_cast<double>(r2_val); 297 double dbl_min = static_cast<double>(min); 298 double dbl_max = static_cast<double>(max); 299 300 // Note that the IEEE 754 floating-point representations (both 32 and 301 // 64 bit) cannot exactly represent INT64_MAX. The closest it can get 302 // is INT64_max + 1. IEEE 754 FP can, though, represent INT64_MIN 303 // exactly. 304 305 // This is not an issue for INT32, as IEEE754 64-bit can represent 306 // INT32_MAX and INT32_MIN with exact precision. 307 308 if (r2_dval == 0.0) 309 condition_reg_ = 8; 310 else if (r2_dval < 0.0 && r2_dval >= dbl_min && std::isfinite(r2_dval)) 311 condition_reg_ = 4; 312 else if (r2_dval > 0.0 && r2_dval < dbl_max && std::isfinite(r2_dval)) 313 condition_reg_ = 2; 314 else 315 condition_reg_ = 1; 316 } 317 318 // Used by the CL**BR instructions. 319 template <typename T1, typename T2, typename T3> SetS390ConvertConditionCode(T1 src,T2 dst,T3 max)320 void SetS390ConvertConditionCode(T1 src, T2 dst, T3 max) { 321 condition_reg_ = 0; 322 if (src == static_cast<T1>(0.0)) { 323 condition_reg_ |= 8; 324 } else if (src < static_cast<T1>(0.0) && static_cast<T2>(src) == 0 && 325 std::isfinite(src)) { 326 condition_reg_ |= 4; 327 } else if (src > static_cast<T1>(0.0) && std::isfinite(src) && 328 src < static_cast<T1>(max)) { 329 condition_reg_ |= 2; 330 } else { 331 condition_reg_ |= 1; 332 } 333 } 334 335 template <typename T> SetS390ConditionCode(T lhs,T rhs)336 void SetS390ConditionCode(T lhs, T rhs) { 337 condition_reg_ = 0; 338 if (lhs == rhs) { 339 condition_reg_ |= CC_EQ; 340 } else if (lhs < rhs) { 341 condition_reg_ |= CC_LT; 342 } else if (lhs > rhs) { 343 condition_reg_ |= CC_GT; 344 } 345 346 // We get down here only for floating point 347 // comparisons and the values are unordered 348 // i.e. NaN 349 if (condition_reg_ == 0) condition_reg_ = unordered; 350 } 351 352 // Used by arithmetic operations that use carry. 353 template <typename T> SetS390ConditionCodeCarry(T result,bool overflow)354 void SetS390ConditionCodeCarry(T result, bool overflow) { 355 condition_reg_ = 0; 356 bool zero_result = (result == static_cast<T>(0)); 357 if (zero_result && !overflow) { 358 condition_reg_ |= 8; 359 } else if (!zero_result && !overflow) { 360 condition_reg_ |= 4; 361 } else if (zero_result && overflow) { 362 condition_reg_ |= 2; 363 } else if (!zero_result && overflow) { 364 condition_reg_ |= 1; 365 } 366 if (condition_reg_ == 0) UNREACHABLE(); 367 } 368 isNaN(double value)369 bool isNaN(double value) { return (value != value); } 370 371 // Set the condition code for bitwise operations 372 // CC0 is set if value == 0. 373 // CC1 is set if value != 0. 374 // CC2/CC3 are not set. 375 template <typename T> SetS390BitWiseConditionCode(T value)376 void SetS390BitWiseConditionCode(T value) { 377 condition_reg_ = 0; 378 379 if (value == 0) 380 condition_reg_ |= CC_EQ; 381 else 382 condition_reg_ |= CC_LT; 383 } 384 SetS390OverflowCode(bool isOF)385 void SetS390OverflowCode(bool isOF) { 386 if (isOF) condition_reg_ = CC_OF; 387 } 388 TestConditionCode(Condition mask)389 bool TestConditionCode(Condition mask) { 390 // Check for unconditional branch 391 if (mask == 0xf) return true; 392 393 return (condition_reg_ & mask) != 0; 394 } 395 396 // Executes one instruction. 397 void ExecuteInstruction(Instruction* instr, bool auto_incr_pc = true); 398 399 // ICache. 400 static void CheckICache(base::CustomMatcherHashMap* i_cache, 401 Instruction* instr); 402 static void FlushOnePage(base::CustomMatcherHashMap* i_cache, intptr_t start, 403 int size); 404 static CachePage* GetCachePage(base::CustomMatcherHashMap* i_cache, 405 void* page); 406 407 // Handle arguments and return value for runtime FP functions. 408 void GetFpArgs(double* x, double* y, intptr_t* z); 409 void SetFpResult(const double& result); 410 void TrashCallerSaveRegisters(); 411 412 void CallInternal(Address entry, int reg_arg_count = 3); 413 414 // Architecture state. 415 // On z9 and higher and supported Linux on z Systems platforms, all registers 416 // are 64-bit, even in 31-bit mode. 417 uint64_t registers_[kNumGPRs]; 418 union fpr_t { 419 int8_t int8[16]; 420 uint8_t uint8[16]; 421 int16_t int16[8]; 422 uint16_t uint16[8]; 423 int32_t int32[4]; 424 uint32_t uint32[4]; 425 int64_t int64[2]; 426 uint64_t uint64[2]; 427 float f32[4]; 428 double f64[2]; 429 }; 430 fpr_t fp_registers_[kNumFPRs]; 431 432 static constexpr fpr_t fp_zero = {{0}}; 433 get_simd_register(int reg)434 fpr_t& get_simd_register(int reg) { return fp_registers_[reg]; } 435 set_simd_register(int reg,const fpr_t & v)436 void set_simd_register(int reg, const fpr_t& v) { 437 get_simd_register(reg) = v; 438 } 439 440 template <class T> get_simd_register_by_lane(int reg,int lane)441 T& get_simd_register_by_lane(int reg, int lane) { 442 DCHECK_LE(lane, kSimd128Size / sizeof(T)); 443 DCHECK_LT(reg, kNumFPRs); 444 DCHECK_GE(lane, 0); 445 DCHECK_GE(reg, 0); 446 return (reinterpret_cast<T*>(&get_simd_register(reg)))[lane]; 447 } 448 449 template <class T> set_simd_register_by_lane(int reg,int lane,const T & value)450 void set_simd_register_by_lane(int reg, int lane, const T& value) { 451 get_simd_register_by_lane<T>(reg, lane) = value; 452 } 453 454 // Condition Code register. In S390, the last 4 bits are used. 455 int32_t condition_reg_; 456 // Special register to track PC. 457 intptr_t special_reg_pc_; 458 459 // Simulator support. 460 char* stack_; 461 static const size_t stack_protection_size_ = 256 * kSystemPointerSize; 462 bool pc_modified_; 463 int64_t icount_; 464 465 // Debugger input. 466 char* last_debugger_input_; 467 468 // Registered breakpoints. 469 Instruction* break_pc_; 470 Instr break_instr_; 471 472 v8::internal::Isolate* isolate_; 473 474 // A stop is watched if its code is less than kNumOfWatchedStops. 475 // Only watched stops support enabling/disabling and the counter feature. 476 static const uint32_t kNumOfWatchedStops = 256; 477 478 // Breakpoint is disabled if bit 31 is set. 479 static const uint32_t kStopDisabledBit = 1 << 31; 480 481 // A stop is enabled, meaning the simulator will stop when meeting the 482 // instruction, if bit 31 of watched_stops_[code].count is unset. 483 // The value watched_stops_[code].count & ~(1 << 31) indicates how many times 484 // the breakpoint was hit or gone through. 485 struct StopCountAndDesc { 486 uint32_t count; 487 char* desc; 488 }; 489 StopCountAndDesc watched_stops_[kNumOfWatchedStops]; 490 void DebugStart(); 491 492 int DecodeInstructionOriginal(Instruction* instr); 493 int DecodeInstruction(Instruction* instr); 494 int Evaluate_Unknown(Instruction* instr); 495 #define MAX_NUM_OPCODES (1 << 16) 496 using EvaluateFuncType = int (Simulator::*)(Instruction*); 497 498 static EvaluateFuncType EvalTable[MAX_NUM_OPCODES]; 499 static void EvalTableInit(); 500 501 #define EVALUATE(name) int Evaluate_##name(Instruction* instr) 502 #define EVALUATE_VR_INSTRUCTIONS(name, op_name, op_value) EVALUATE(op_name); 503 S390_VRR_A_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 504 S390_VRR_C_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 505 S390_VRR_E_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 506 S390_VRR_F_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 507 S390_VRX_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 508 S390_VRS_A_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 509 S390_VRS_B_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 510 S390_VRS_C_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 511 S390_VRR_B_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 512 S390_VRI_A_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 513 S390_VRI_C_OPCODE_LIST(EVALUATE_VR_INSTRUCTIONS) 514 #undef EVALUATE_VR_INSTRUCTIONS 515 516 EVALUATE(DUMY); 517 EVALUATE(BKPT); 518 EVALUATE(SPM); 519 EVALUATE(BALR); 520 EVALUATE(BCTR); 521 EVALUATE(BCR); 522 EVALUATE(SVC); 523 EVALUATE(BSM); 524 EVALUATE(BASSM); 525 EVALUATE(BASR); 526 EVALUATE(MVCL); 527 EVALUATE(CLCL); 528 EVALUATE(LPR); 529 EVALUATE(LNR); 530 EVALUATE(LTR); 531 EVALUATE(LCR); 532 EVALUATE(NR); 533 EVALUATE(CLR); 534 EVALUATE(OR); 535 EVALUATE(XR); 536 EVALUATE(LR); 537 EVALUATE(CR); 538 EVALUATE(AR); 539 EVALUATE(SR); 540 EVALUATE(MR); 541 EVALUATE(DR); 542 EVALUATE(ALR); 543 EVALUATE(SLR); 544 EVALUATE(LDR); 545 EVALUATE(CDR); 546 EVALUATE(LER); 547 EVALUATE(STH); 548 EVALUATE(LA); 549 EVALUATE(STC); 550 EVALUATE(IC_z); 551 EVALUATE(EX); 552 EVALUATE(BAL); 553 EVALUATE(BCT); 554 EVALUATE(BC); 555 EVALUATE(LH); 556 EVALUATE(CH); 557 EVALUATE(AH); 558 EVALUATE(SH); 559 EVALUATE(MH); 560 EVALUATE(BAS); 561 EVALUATE(CVD); 562 EVALUATE(CVB); 563 EVALUATE(ST); 564 EVALUATE(LAE); 565 EVALUATE(N); 566 EVALUATE(CL); 567 EVALUATE(O); 568 EVALUATE(X); 569 EVALUATE(L); 570 EVALUATE(C); 571 EVALUATE(A); 572 EVALUATE(S); 573 EVALUATE(M); 574 EVALUATE(D); 575 EVALUATE(AL); 576 EVALUATE(SL); 577 EVALUATE(STD); 578 EVALUATE(LD); 579 EVALUATE(CD); 580 EVALUATE(STE); 581 EVALUATE(MS); 582 EVALUATE(LE); 583 EVALUATE(BRXH); 584 EVALUATE(BRXLE); 585 EVALUATE(BXH); 586 EVALUATE(BXLE); 587 EVALUATE(SRL); 588 EVALUATE(SLL); 589 EVALUATE(SRA); 590 EVALUATE(SLA); 591 EVALUATE(SRDL); 592 EVALUATE(SLDL); 593 EVALUATE(SRDA); 594 EVALUATE(SLDA); 595 EVALUATE(STM); 596 EVALUATE(TM); 597 EVALUATE(MVI); 598 EVALUATE(TS); 599 EVALUATE(NI); 600 EVALUATE(CLI); 601 EVALUATE(OI); 602 EVALUATE(XI); 603 EVALUATE(LM); 604 EVALUATE(CS); 605 EVALUATE(MVCLE); 606 EVALUATE(CLCLE); 607 EVALUATE(MC); 608 EVALUATE(CDS); 609 EVALUATE(STCM); 610 EVALUATE(ICM); 611 EVALUATE(BPRP); 612 EVALUATE(BPP); 613 EVALUATE(TRTR); 614 EVALUATE(MVN); 615 EVALUATE(MVC); 616 EVALUATE(MVZ); 617 EVALUATE(NC); 618 EVALUATE(CLC); 619 EVALUATE(OC); 620 EVALUATE(XC); 621 EVALUATE(MVCP); 622 EVALUATE(TR); 623 EVALUATE(TRT); 624 EVALUATE(ED); 625 EVALUATE(EDMK); 626 EVALUATE(PKU); 627 EVALUATE(UNPKU); 628 EVALUATE(MVCIN); 629 EVALUATE(PKA); 630 EVALUATE(UNPKA); 631 EVALUATE(PLO); 632 EVALUATE(LMD); 633 EVALUATE(SRP); 634 EVALUATE(MVO); 635 EVALUATE(PACK); 636 EVALUATE(UNPK); 637 EVALUATE(ZAP); 638 EVALUATE(AP); 639 EVALUATE(SP); 640 EVALUATE(MP); 641 EVALUATE(DP); 642 EVALUATE(UPT); 643 EVALUATE(PFPO); 644 EVALUATE(IIHH); 645 EVALUATE(IIHL); 646 EVALUATE(IILH); 647 EVALUATE(IILL); 648 EVALUATE(NIHH); 649 EVALUATE(NIHL); 650 EVALUATE(NILH); 651 EVALUATE(NILL); 652 EVALUATE(OIHH); 653 EVALUATE(OIHL); 654 EVALUATE(OILH); 655 EVALUATE(OILL); 656 EVALUATE(LLIHH); 657 EVALUATE(LLIHL); 658 EVALUATE(LLILH); 659 EVALUATE(LLILL); 660 EVALUATE(TMLH); 661 EVALUATE(TMLL); 662 EVALUATE(TMHH); 663 EVALUATE(TMHL); 664 EVALUATE(BRC); 665 EVALUATE(BRAS); 666 EVALUATE(BRCT); 667 EVALUATE(BRCTG); 668 EVALUATE(LHI); 669 EVALUATE(LGHI); 670 EVALUATE(AHI); 671 EVALUATE(AGHI); 672 EVALUATE(MHI); 673 EVALUATE(MGHI); 674 EVALUATE(CHI); 675 EVALUATE(CGHI); 676 EVALUATE(LARL); 677 EVALUATE(LGFI); 678 EVALUATE(BRCL); 679 EVALUATE(BRASL); 680 EVALUATE(XIHF); 681 EVALUATE(XILF); 682 EVALUATE(IIHF); 683 EVALUATE(IILF); 684 EVALUATE(NIHF); 685 EVALUATE(NILF); 686 EVALUATE(OIHF); 687 EVALUATE(OILF); 688 EVALUATE(LLIHF); 689 EVALUATE(LLILF); 690 EVALUATE(MSGFI); 691 EVALUATE(MSFI); 692 EVALUATE(SLGFI); 693 EVALUATE(SLFI); 694 EVALUATE(AGFI); 695 EVALUATE(AFI); 696 EVALUATE(ALGFI); 697 EVALUATE(ALFI); 698 EVALUATE(CGFI); 699 EVALUATE(CFI); 700 EVALUATE(CLGFI); 701 EVALUATE(CLFI); 702 EVALUATE(LLHRL); 703 EVALUATE(LGHRL); 704 EVALUATE(LHRL); 705 EVALUATE(LLGHRL); 706 EVALUATE(STHRL); 707 EVALUATE(LGRL); 708 EVALUATE(STGRL); 709 EVALUATE(LGFRL); 710 EVALUATE(LRL); 711 EVALUATE(LLGFRL); 712 EVALUATE(STRL); 713 EVALUATE(EXRL); 714 EVALUATE(PFDRL); 715 EVALUATE(CGHRL); 716 EVALUATE(CHRL); 717 EVALUATE(CGRL); 718 EVALUATE(CGFRL); 719 EVALUATE(ECTG); 720 EVALUATE(CSST); 721 EVALUATE(LPD); 722 EVALUATE(LPDG); 723 EVALUATE(BRCTH); 724 EVALUATE(AIH); 725 EVALUATE(ALSIH); 726 EVALUATE(ALSIHN); 727 EVALUATE(CIH); 728 EVALUATE(CLIH); 729 EVALUATE(STCK); 730 EVALUATE(CFC); 731 EVALUATE(IPM); 732 EVALUATE(HSCH); 733 EVALUATE(MSCH); 734 EVALUATE(SSCH); 735 EVALUATE(STSCH); 736 EVALUATE(TSCH); 737 EVALUATE(TPI); 738 EVALUATE(SAL); 739 EVALUATE(RSCH); 740 EVALUATE(STCRW); 741 EVALUATE(STCPS); 742 EVALUATE(RCHP); 743 EVALUATE(SCHM); 744 EVALUATE(CKSM); 745 EVALUATE(SAR); 746 EVALUATE(EAR); 747 EVALUATE(MSR); 748 EVALUATE(MSRKC); 749 EVALUATE(MVST); 750 EVALUATE(CUSE); 751 EVALUATE(SRST); 752 EVALUATE(XSCH); 753 EVALUATE(STCKE); 754 EVALUATE(STCKF); 755 EVALUATE(SRNM); 756 EVALUATE(STFPC); 757 EVALUATE(LFPC); 758 EVALUATE(TRE); 759 EVALUATE(CUUTF); 760 EVALUATE(CUTFU); 761 EVALUATE(STFLE); 762 EVALUATE(SRNMB); 763 EVALUATE(SRNMT); 764 EVALUATE(LFAS); 765 EVALUATE(PPA); 766 EVALUATE(ETND); 767 EVALUATE(TEND); 768 EVALUATE(NIAI); 769 EVALUATE(TABORT); 770 EVALUATE(TRAP4); 771 EVALUATE(LPEBR); 772 EVALUATE(LNEBR); 773 EVALUATE(LTEBR); 774 EVALUATE(LCEBR); 775 EVALUATE(LDEBR); 776 EVALUATE(LXDBR); 777 EVALUATE(LXEBR); 778 EVALUATE(MXDBR); 779 EVALUATE(KEBR); 780 EVALUATE(CEBR); 781 EVALUATE(AEBR); 782 EVALUATE(SEBR); 783 EVALUATE(MDEBR); 784 EVALUATE(DEBR); 785 EVALUATE(MAEBR); 786 EVALUATE(MSEBR); 787 EVALUATE(LPDBR); 788 EVALUATE(LNDBR); 789 EVALUATE(LTDBR); 790 EVALUATE(LCDBR); 791 EVALUATE(SQEBR); 792 EVALUATE(SQDBR); 793 EVALUATE(SQXBR); 794 EVALUATE(MEEBR); 795 EVALUATE(KDBR); 796 EVALUATE(CDBR); 797 EVALUATE(ADBR); 798 EVALUATE(SDBR); 799 EVALUATE(MDBR); 800 EVALUATE(DDBR); 801 EVALUATE(MADBR); 802 EVALUATE(MSDBR); 803 EVALUATE(LPXBR); 804 EVALUATE(LNXBR); 805 EVALUATE(LTXBR); 806 EVALUATE(LCXBR); 807 EVALUATE(LEDBRA); 808 EVALUATE(LDXBRA); 809 EVALUATE(LEXBRA); 810 EVALUATE(FIXBRA); 811 EVALUATE(KXBR); 812 EVALUATE(CXBR); 813 EVALUATE(AXBR); 814 EVALUATE(SXBR); 815 EVALUATE(MXBR); 816 EVALUATE(DXBR); 817 EVALUATE(TBEDR); 818 EVALUATE(TBDR); 819 EVALUATE(DIEBR); 820 EVALUATE(FIEBRA); 821 EVALUATE(THDER); 822 EVALUATE(THDR); 823 EVALUATE(DIDBR); 824 EVALUATE(FIDBRA); 825 EVALUATE(LXR); 826 EVALUATE(LPDFR); 827 EVALUATE(LNDFR); 828 EVALUATE(LCDFR); 829 EVALUATE(LZER); 830 EVALUATE(LZDR); 831 EVALUATE(LZXR); 832 EVALUATE(SFPC); 833 EVALUATE(SFASR); 834 EVALUATE(EFPC); 835 EVALUATE(CELFBR); 836 EVALUATE(CDLFBR); 837 EVALUATE(CXLFBR); 838 EVALUATE(CEFBRA); 839 EVALUATE(CDFBRA); 840 EVALUATE(CXFBRA); 841 EVALUATE(CFEBRA); 842 EVALUATE(CFDBRA); 843 EVALUATE(CFXBRA); 844 EVALUATE(CLFEBR); 845 EVALUATE(CLFDBR); 846 EVALUATE(CLFXBR); 847 EVALUATE(CELGBR); 848 EVALUATE(CDLGBR); 849 EVALUATE(CXLGBR); 850 EVALUATE(CEGBRA); 851 EVALUATE(CDGBRA); 852 EVALUATE(CXGBRA); 853 EVALUATE(CGEBRA); 854 EVALUATE(CGDBRA); 855 EVALUATE(CGXBRA); 856 EVALUATE(CLGEBR); 857 EVALUATE(CLGDBR); 858 EVALUATE(CFER); 859 EVALUATE(CFDR); 860 EVALUATE(CFXR); 861 EVALUATE(LDGR); 862 EVALUATE(CGER); 863 EVALUATE(CGDR); 864 EVALUATE(CGXR); 865 EVALUATE(LGDR); 866 EVALUATE(MDTR); 867 EVALUATE(MDTRA); 868 EVALUATE(DDTRA); 869 EVALUATE(ADTRA); 870 EVALUATE(SDTRA); 871 EVALUATE(LDETR); 872 EVALUATE(LEDTR); 873 EVALUATE(LTDTR); 874 EVALUATE(FIDTR); 875 EVALUATE(MXTRA); 876 EVALUATE(DXTRA); 877 EVALUATE(AXTRA); 878 EVALUATE(SXTRA); 879 EVALUATE(LXDTR); 880 EVALUATE(LDXTR); 881 EVALUATE(LTXTR); 882 EVALUATE(FIXTR); 883 EVALUATE(KDTR); 884 EVALUATE(CGDTRA); 885 EVALUATE(CUDTR); 886 EVALUATE(CDTR); 887 EVALUATE(EEDTR); 888 EVALUATE(ESDTR); 889 EVALUATE(KXTR); 890 EVALUATE(CGXTRA); 891 EVALUATE(CUXTR); 892 EVALUATE(CSXTR); 893 EVALUATE(CXTR); 894 EVALUATE(EEXTR); 895 EVALUATE(ESXTR); 896 EVALUATE(CDGTRA); 897 EVALUATE(CDUTR); 898 EVALUATE(CDSTR); 899 EVALUATE(CEDTR); 900 EVALUATE(QADTR); 901 EVALUATE(IEDTR); 902 EVALUATE(RRDTR); 903 EVALUATE(CXGTRA); 904 EVALUATE(CXUTR); 905 EVALUATE(CXSTR); 906 EVALUATE(CEXTR); 907 EVALUATE(QAXTR); 908 EVALUATE(IEXTR); 909 EVALUATE(RRXTR); 910 EVALUATE(LPGR); 911 EVALUATE(LNGR); 912 EVALUATE(LTGR); 913 EVALUATE(LCGR); 914 EVALUATE(LGR); 915 EVALUATE(LGBR); 916 EVALUATE(LGHR); 917 EVALUATE(AGR); 918 EVALUATE(SGR); 919 EVALUATE(ALGR); 920 EVALUATE(SLGR); 921 EVALUATE(MSGR); 922 EVALUATE(MSGRKC); 923 EVALUATE(DSGR); 924 EVALUATE(LRVGR); 925 EVALUATE(LPGFR); 926 EVALUATE(LNGFR); 927 EVALUATE(LTGFR); 928 EVALUATE(LCGFR); 929 EVALUATE(LGFR); 930 EVALUATE(LLGFR); 931 EVALUATE(LLGTR); 932 EVALUATE(AGFR); 933 EVALUATE(SGFR); 934 EVALUATE(ALGFR); 935 EVALUATE(SLGFR); 936 EVALUATE(MSGFR); 937 EVALUATE(DSGFR); 938 EVALUATE(KMAC); 939 EVALUATE(LRVR); 940 EVALUATE(CGR); 941 EVALUATE(CLGR); 942 EVALUATE(LBR); 943 EVALUATE(LHR); 944 EVALUATE(KMF); 945 EVALUATE(KMO); 946 EVALUATE(PCC); 947 EVALUATE(KMCTR); 948 EVALUATE(KM); 949 EVALUATE(KMC); 950 EVALUATE(CGFR); 951 EVALUATE(KIMD); 952 EVALUATE(KLMD); 953 EVALUATE(CFDTR); 954 EVALUATE(CLGDTR); 955 EVALUATE(CLFDTR); 956 EVALUATE(BCTGR); 957 EVALUATE(CFXTR); 958 EVALUATE(CLFXTR); 959 EVALUATE(CDFTR); 960 EVALUATE(CDLGTR); 961 EVALUATE(CDLFTR); 962 EVALUATE(CXFTR); 963 EVALUATE(CXLGTR); 964 EVALUATE(CXLFTR); 965 EVALUATE(CGRT); 966 EVALUATE(NGR); 967 EVALUATE(OGR); 968 EVALUATE(XGR); 969 EVALUATE(FLOGR); 970 EVALUATE(LLGCR); 971 EVALUATE(LLGHR); 972 EVALUATE(MLGR); 973 EVALUATE(DLGR); 974 EVALUATE(ALCGR); 975 EVALUATE(SLBGR); 976 EVALUATE(EPSW); 977 EVALUATE(TRTT); 978 EVALUATE(TRTO); 979 EVALUATE(TROT); 980 EVALUATE(TROO); 981 EVALUATE(LLCR); 982 EVALUATE(LLHR); 983 EVALUATE(MLR); 984 EVALUATE(DLR); 985 EVALUATE(ALCR); 986 EVALUATE(SLBR); 987 EVALUATE(CU14); 988 EVALUATE(CU24); 989 EVALUATE(CU41); 990 EVALUATE(CU42); 991 EVALUATE(TRTRE); 992 EVALUATE(SRSTU); 993 EVALUATE(TRTE); 994 EVALUATE(AHHHR); 995 EVALUATE(SHHHR); 996 EVALUATE(ALHHHR); 997 EVALUATE(SLHHHR); 998 EVALUATE(CHHR); 999 EVALUATE(AHHLR); 1000 EVALUATE(SHHLR); 1001 EVALUATE(ALHHLR); 1002 EVALUATE(SLHHLR); 1003 EVALUATE(CHLR); 1004 EVALUATE(POPCNT_Z); 1005 EVALUATE(LOCGR); 1006 EVALUATE(NGRK); 1007 EVALUATE(OGRK); 1008 EVALUATE(XGRK); 1009 EVALUATE(AGRK); 1010 EVALUATE(SGRK); 1011 EVALUATE(ALGRK); 1012 EVALUATE(SLGRK); 1013 EVALUATE(LOCR); 1014 EVALUATE(NRK); 1015 EVALUATE(ORK); 1016 EVALUATE(XRK); 1017 EVALUATE(ARK); 1018 EVALUATE(SRK); 1019 EVALUATE(ALRK); 1020 EVALUATE(SLRK); 1021 EVALUATE(LTG); 1022 EVALUATE(LG); 1023 EVALUATE(CVBY); 1024 EVALUATE(AG); 1025 EVALUATE(SG); 1026 EVALUATE(ALG); 1027 EVALUATE(SLG); 1028 EVALUATE(MSG); 1029 EVALUATE(DSG); 1030 EVALUATE(CVBG); 1031 EVALUATE(LRVG); 1032 EVALUATE(LT); 1033 EVALUATE(LGF); 1034 EVALUATE(LGH); 1035 EVALUATE(LLGF); 1036 EVALUATE(LLGT); 1037 EVALUATE(AGF); 1038 EVALUATE(SGF); 1039 EVALUATE(ALGF); 1040 EVALUATE(SLGF); 1041 EVALUATE(MSGF); 1042 EVALUATE(DSGF); 1043 EVALUATE(LRV); 1044 EVALUATE(LRVH); 1045 EVALUATE(CG); 1046 EVALUATE(CLG); 1047 EVALUATE(STG); 1048 EVALUATE(NTSTG); 1049 EVALUATE(CVDY); 1050 EVALUATE(CVDG); 1051 EVALUATE(STRVG); 1052 EVALUATE(CGF); 1053 EVALUATE(CLGF); 1054 EVALUATE(LTGF); 1055 EVALUATE(CGH); 1056 EVALUATE(PFD); 1057 EVALUATE(STRV); 1058 EVALUATE(STRVH); 1059 EVALUATE(BCTG); 1060 EVALUATE(STY); 1061 EVALUATE(MSY); 1062 EVALUATE(MSC); 1063 EVALUATE(NY); 1064 EVALUATE(CLY); 1065 EVALUATE(OY); 1066 EVALUATE(XY); 1067 EVALUATE(LY); 1068 EVALUATE(CY); 1069 EVALUATE(AY); 1070 EVALUATE(SY); 1071 EVALUATE(MFY); 1072 EVALUATE(ALY); 1073 EVALUATE(SLY); 1074 EVALUATE(STHY); 1075 EVALUATE(LAY); 1076 EVALUATE(STCY); 1077 EVALUATE(ICY); 1078 EVALUATE(LAEY); 1079 EVALUATE(LB); 1080 EVALUATE(LGB); 1081 EVALUATE(LHY); 1082 EVALUATE(CHY); 1083 EVALUATE(AHY); 1084 EVALUATE(SHY); 1085 EVALUATE(MHY); 1086 EVALUATE(NG); 1087 EVALUATE(OG); 1088 EVALUATE(XG); 1089 EVALUATE(LGAT); 1090 EVALUATE(MLG); 1091 EVALUATE(DLG); 1092 EVALUATE(ALCG); 1093 EVALUATE(SLBG); 1094 EVALUATE(STPQ); 1095 EVALUATE(LPQ); 1096 EVALUATE(LLGC); 1097 EVALUATE(LLGH); 1098 EVALUATE(LLC); 1099 EVALUATE(LLH); 1100 EVALUATE(ML); 1101 EVALUATE(DL); 1102 EVALUATE(ALC); 1103 EVALUATE(SLB); 1104 EVALUATE(LLGTAT); 1105 EVALUATE(LLGFAT); 1106 EVALUATE(LAT); 1107 EVALUATE(LBH); 1108 EVALUATE(LLCH); 1109 EVALUATE(STCH); 1110 EVALUATE(LHH); 1111 EVALUATE(LLHH); 1112 EVALUATE(STHH); 1113 EVALUATE(LFHAT); 1114 EVALUATE(LFH); 1115 EVALUATE(STFH); 1116 EVALUATE(CHF); 1117 EVALUATE(MVCDK); 1118 EVALUATE(MVHHI); 1119 EVALUATE(MVGHI); 1120 EVALUATE(MVHI); 1121 EVALUATE(CHHSI); 1122 EVALUATE(CGHSI); 1123 EVALUATE(CHSI); 1124 EVALUATE(CLFHSI); 1125 EVALUATE(TBEGIN); 1126 EVALUATE(TBEGINC); 1127 EVALUATE(LMG); 1128 EVALUATE(SRAG); 1129 EVALUATE(SLAG); 1130 EVALUATE(SRLG); 1131 EVALUATE(SLLG); 1132 EVALUATE(CSY); 1133 EVALUATE(CSG); 1134 EVALUATE(RLLG); 1135 EVALUATE(RLL); 1136 EVALUATE(STMG); 1137 EVALUATE(STMH); 1138 EVALUATE(STCMH); 1139 EVALUATE(STCMY); 1140 EVALUATE(CDSY); 1141 EVALUATE(CDSG); 1142 EVALUATE(BXHG); 1143 EVALUATE(BXLEG); 1144 EVALUATE(ECAG); 1145 EVALUATE(TMY); 1146 EVALUATE(MVIY); 1147 EVALUATE(NIY); 1148 EVALUATE(CLIY); 1149 EVALUATE(OIY); 1150 EVALUATE(XIY); 1151 EVALUATE(ASI); 1152 EVALUATE(ALSI); 1153 EVALUATE(AGSI); 1154 EVALUATE(ALGSI); 1155 EVALUATE(ICMH); 1156 EVALUATE(ICMY); 1157 EVALUATE(MVCLU); 1158 EVALUATE(CLCLU); 1159 EVALUATE(STMY); 1160 EVALUATE(LMH); 1161 EVALUATE(LMY); 1162 EVALUATE(TP); 1163 EVALUATE(SRAK); 1164 EVALUATE(SLAK); 1165 EVALUATE(SRLK); 1166 EVALUATE(SLLK); 1167 EVALUATE(LOCG); 1168 EVALUATE(STOCG); 1169 EVALUATE(LANG); 1170 EVALUATE(LAOG); 1171 EVALUATE(LAXG); 1172 EVALUATE(LAAG); 1173 EVALUATE(LAALG); 1174 EVALUATE(LOC); 1175 EVALUATE(STOC); 1176 EVALUATE(LAN); 1177 EVALUATE(LAO); 1178 EVALUATE(LAX); 1179 EVALUATE(LAA); 1180 EVALUATE(LAAL); 1181 EVALUATE(BRXHG); 1182 EVALUATE(BRXLG); 1183 EVALUATE(RISBLG); 1184 EVALUATE(RNSBG); 1185 EVALUATE(RISBG); 1186 EVALUATE(ROSBG); 1187 EVALUATE(RXSBG); 1188 EVALUATE(RISBGN); 1189 EVALUATE(RISBHG); 1190 EVALUATE(CGRJ); 1191 EVALUATE(CGIT); 1192 EVALUATE(CIT); 1193 EVALUATE(CLFIT); 1194 EVALUATE(CGIJ); 1195 EVALUATE(CIJ); 1196 EVALUATE(AHIK); 1197 EVALUATE(AGHIK); 1198 EVALUATE(ALHSIK); 1199 EVALUATE(ALGHSIK); 1200 EVALUATE(CGRB); 1201 EVALUATE(CGIB); 1202 EVALUATE(CIB); 1203 EVALUATE(LDEB); 1204 EVALUATE(LXDB); 1205 EVALUATE(LXEB); 1206 EVALUATE(MXDB); 1207 EVALUATE(KEB); 1208 EVALUATE(CEB); 1209 EVALUATE(AEB); 1210 EVALUATE(SEB); 1211 EVALUATE(MDEB); 1212 EVALUATE(DEB); 1213 EVALUATE(MAEB); 1214 EVALUATE(MSEB); 1215 EVALUATE(TCEB); 1216 EVALUATE(TCDB); 1217 EVALUATE(TCXB); 1218 EVALUATE(SQEB); 1219 EVALUATE(SQDB); 1220 EVALUATE(MEEB); 1221 EVALUATE(KDB); 1222 EVALUATE(CDB); 1223 EVALUATE(ADB); 1224 EVALUATE(SDB); 1225 EVALUATE(MDB); 1226 EVALUATE(DDB); 1227 EVALUATE(MADB); 1228 EVALUATE(MSDB); 1229 EVALUATE(SLDT); 1230 EVALUATE(SRDT); 1231 EVALUATE(SLXT); 1232 EVALUATE(SRXT); 1233 EVALUATE(TDCET); 1234 EVALUATE(TDGET); 1235 EVALUATE(TDCDT); 1236 EVALUATE(TDGDT); 1237 EVALUATE(TDCXT); 1238 EVALUATE(TDGXT); 1239 EVALUATE(LEY); 1240 EVALUATE(LDY); 1241 EVALUATE(STEY); 1242 EVALUATE(STDY); 1243 EVALUATE(CZDT); 1244 EVALUATE(CZXT); 1245 EVALUATE(CDZT); 1246 EVALUATE(CXZT); 1247 #undef EVALUATE 1248 }; 1249 1250 } // namespace internal 1251 } // namespace v8 1252 1253 #endif // defined(USE_SIMULATOR) 1254 #endif // V8_EXECUTION_S390_SIMULATOR_S390_H_ 1255