1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6 #include <common.h>
7 #include <acpi_s3.h>
8 #include <cpu_func.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <rtc.h>
12 #include <asm/cmos_layout.h>
13 #include <asm/early_cmos.h>
14 #include <asm/io.h>
15 #include <asm/mrccache.h>
16 #include <asm/post.h>
17 #include <asm/processor.h>
18 #include <asm/fsp/fsp_support.h>
19
20 DECLARE_GLOBAL_DATA_PTR;
21
checkcpu(void)22 int checkcpu(void)
23 {
24 return 0;
25 }
26
print_cpuinfo(void)27 int print_cpuinfo(void)
28 {
29 post_code(POST_CPU_INFO);
30 return default_print_cpuinfo();
31 }
32
fsp_init_phase_pci(void)33 int fsp_init_phase_pci(void)
34 {
35 u32 status;
36
37 /* call into FspNotify */
38 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
39 status = fsp_notify(NULL, INIT_PHASE_PCI);
40 if (status)
41 debug("fail, error code %x\n", status);
42 else
43 debug("OK\n");
44
45 return status ? -EPERM : 0;
46 }
47
board_final_cleanup(void)48 void board_final_cleanup(void)
49 {
50 u32 status;
51
52 /* call into FspNotify */
53 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
54 status = fsp_notify(NULL, INIT_PHASE_BOOT);
55 if (status)
56 debug("fail, error code %x\n", status);
57 else
58 debug("OK\n");
59 }
60
fsp_prepare_mrc_cache(void)61 void *fsp_prepare_mrc_cache(void)
62 {
63 struct mrc_data_container *cache;
64 struct mrc_region entry;
65 int ret;
66
67 ret = mrccache_get_region(NULL, &entry);
68 if (ret)
69 return NULL;
70
71 cache = mrccache_find_current(&entry);
72 if (!cache)
73 return NULL;
74
75 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
76 cache->data, cache->data_size, cache->checksum);
77
78 return cache->data;
79 }
80
81 #ifdef CONFIG_HAVE_ACPI_RESUME
fsp_save_s3_stack(void)82 int fsp_save_s3_stack(void)
83 {
84 struct udevice *dev;
85 int ret;
86
87 if (gd->arch.prev_sleep_state == ACPI_S3)
88 return 0;
89
90 ret = uclass_get_device(UCLASS_RTC, 0, &dev);
91 if (ret) {
92 debug("Cannot find RTC: err=%d\n", ret);
93 return -ENODEV;
94 }
95
96 /* Save the stack address to CMOS */
97 ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
98 if (ret) {
99 debug("Save stack address to CMOS: err=%d\n", ret);
100 return -EIO;
101 }
102
103 return 0;
104 }
105 #endif
106