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Searched defs:hart (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/riscv/lib/
Dandes_plic.c22 #define PENDING_REG(base, hart) ((ulong)(base) + 0x1000 + ((hart) / 4) * 4) argument
24 #define ENABLE_REG(base, hart) ((ulong)(base) + 0x2000 + (hart) * 0x80) argument
26 #define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000) argument
29 #define SEND_IPI_TO_HART(hart) (0x80 >> (hart)) argument
47 static int enable_ipi(int hart) in enable_ipi()
95 int riscv_send_ipi(int hart) in riscv_send_ipi()
108 int riscv_clear_ipi(int hart) in riscv_clear_ipi()
120 int riscv_get_ipi(int hart, int *pending) in riscv_get_ipi()
Dsifive_clint.c18 #define MSIP_REG(base, hart) ((ulong)(base) + (hart) * 4) argument
20 #define MTIMECMP_REG(base, hart) ((ulong)(base) + 0x4000 + (hart) * 8) argument
47 int riscv_set_timecmp(int hart, u64 cmp) in riscv_set_timecmp()
56 int riscv_send_ipi(int hart) in riscv_send_ipi()
65 int riscv_clear_ipi(int hart) in riscv_clear_ipi()
74 int riscv_get_ipi(int hart, int *pending) in riscv_get_ipi()
Dsbi_ipi.c10 int riscv_send_ipi(int hart) in riscv_send_ipi()
20 int riscv_clear_ipi(int hart) in riscv_clear_ipi()
27 int riscv_get_ipi(int hart, int *pending) in riscv_get_ipi()
Dsmp.c108 void handle_ipi(ulong hart) in handle_ipi()
/external/u-boot/drivers/cache/
Dcache-v5l2.c53 #define CCTL_CMD_REG(base, hart) ((ulong)(base) + 0x40 + (hart) * 0x10) argument
57 #define CCTL_STATUS_MSK(hart) (0xf << ((hart) * 4)) argument
58 #define CCTL_STATUS_IDLE(hart) (0 << ((hart) * 4)) argument
59 #define CCTL_STATUS_PROCESS(hart) (1 << ((hart) * 4)) argument
60 #define CCTL_STATUS_ILLEGAL(hart) (2 << ((hart) * 4)) argument
87 u8 hart = gd->arch.boot_hart; in v5l2_disable() local