1 /******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 /*!
21 **************************************************************************
22 * \file ih264d_utils.c
23 *
24 * \brief
25 * Contains routines that handle of start and end of pic processing
26 *
27 * \date
28 * 19/12/2002
29 *
30 * \author AI
31 **************************************************************************
32 */
33
34 #include <string.h>
35 #include "ih264_typedefs.h"
36 #include "ithread.h"
37 #include "ih264d_deblocking.h"
38 #include "ih264d_parse_slice.h"
39 #include "ih264d_parse_cavlc.h"
40 #include "ih264d_dpb_manager.h"
41 #include "ih264d_defs.h"
42 #include "ih264d_structs.h"
43 #include "ih264d_mem_request.h"
44 #include "ih264_typedefs.h"
45 #include "ih264_macros.h"
46 #include "ih264_platform_macros.h"
47 #include "ih264d_tables.h"
48 #include "ih264d_debug.h"
49 #include "ih264d_mb_utils.h"
50 #include "ih264d_error_handler.h"
51 #include "ih264d_dpb_manager.h"
52 #include "ih264d_utils.h"
53 #include "ih264d_defs.h"
54 #include "ih264d_tables.h"
55 #include "ih264d_inter_pred.h"
56 #include "ih264d_dpb_manager.h"
57 #include "iv.h"
58 #include "ivd.h"
59 #include "ih264d_format_conv.h"
60 #include "ih264_error.h"
61 #include "ih264_disp_mgr.h"
62 #include "ih264_buf_mgr.h"
63 #include "ih264d_utils.h"
64
65 /*!
66 **************************************************************************
67 * \if Function name : ih264d_is_end_of_pic \endif
68 *
69 * \brief
70 * Determines whether current slice is first slice of a new picture as
71 * defined in 7.4.1.2.4 of 14496-10.
72 *
73 * \return
74 * Return 1 if current slice is first slice of a new picture
75 * Otherwise it returns 0
76 **************************************************************************
77 */
ih264d_is_end_of_pic(UWORD16 u2_frame_num,UWORD8 u1_nal_ref_idc,pocstruct_t * ps_cur_poc,pocstruct_t * ps_prev_poc,dec_slice_params_t * ps_prev_slice,UWORD8 u1_pic_order_cnt_type,UWORD8 u1_nal_unit_type,UWORD32 u4_idr_pic_id,UWORD8 u1_field_pic_flag,UWORD8 u1_bottom_field_flag)78 UWORD8 ih264d_is_end_of_pic(UWORD16 u2_frame_num,
79 UWORD8 u1_nal_ref_idc,
80 pocstruct_t *ps_cur_poc,
81 pocstruct_t *ps_prev_poc,
82 dec_slice_params_t * ps_prev_slice, /*!< Previous slice parameters*/
83 UWORD8 u1_pic_order_cnt_type,
84 UWORD8 u1_nal_unit_type,
85 UWORD32 u4_idr_pic_id,
86 UWORD8 u1_field_pic_flag,
87 UWORD8 u1_bottom_field_flag)
88 {
89 WORD8 i1_is_end_of_pic;
90 WORD8 a, b, c, d, e, f, g, h;
91
92 a = b = c = d = e = f = g = h = 0;
93 a = (ps_prev_slice->u2_frame_num != u2_frame_num);
94 b = (ps_prev_slice->u1_field_pic_flag != u1_field_pic_flag);
95 if(u1_field_pic_flag && ps_prev_slice->u1_field_pic_flag)
96 c = (u1_bottom_field_flag != ps_prev_slice->u1_bottom_field_flag);
97 d =
98 (u1_nal_ref_idc == 0 && ps_prev_slice->u1_nal_ref_idc != 0)
99 || (u1_nal_ref_idc != 0
100 && ps_prev_slice->u1_nal_ref_idc
101 == 0);
102 if(!a)
103 {
104 if((u1_pic_order_cnt_type == 0)
105 && (ps_prev_slice->u1_pic_order_cnt_type == 0))
106 {
107 e =
108 ((ps_cur_poc->i4_pic_order_cnt_lsb
109 != ps_prev_poc->i4_pic_order_cnt_lsb)
110 || (ps_cur_poc->i4_delta_pic_order_cnt_bottom
111 != ps_prev_poc->i4_delta_pic_order_cnt_bottom));
112 }
113
114 if((u1_pic_order_cnt_type == 1)
115 && (ps_prev_slice->u1_pic_order_cnt_type == 1))
116 {
117 f =
118 ((ps_cur_poc->i4_delta_pic_order_cnt[0]
119 != ps_prev_poc->i4_delta_pic_order_cnt[0])
120 || (ps_cur_poc->i4_delta_pic_order_cnt[1]
121 != ps_prev_poc->i4_delta_pic_order_cnt[1]));
122 }
123 }
124
125 if((u1_nal_unit_type == IDR_SLICE_NAL)
126 && (ps_prev_slice->u1_nal_unit_type == IDR_SLICE_NAL))
127 {
128 g = (u4_idr_pic_id != ps_prev_slice->u4_idr_pic_id);
129 }
130
131 if((u1_nal_unit_type == IDR_SLICE_NAL)
132 && (ps_prev_slice->u1_nal_unit_type != IDR_SLICE_NAL))
133 {
134 h = 1;
135 }
136 i1_is_end_of_pic = a + b + c + d + e + f + g + h;
137 return (i1_is_end_of_pic);
138 }
139
140 /*!
141 **************************************************************************
142 * \if Function name : ih264d_decode_pic_order_cnt \endif
143 *
144 * \brief
145 * Calculates picture order count of picture.
146 *
147 * \return
148 * Returns the pic order count of the picture to which current
149 * Slice belongs.
150 *
151 **************************************************************************
152 */
ih264d_decode_pic_order_cnt(UWORD8 u1_is_idr_slice,UWORD32 u2_frame_num,pocstruct_t * ps_prev_poc,pocstruct_t * ps_cur_poc,dec_slice_params_t * ps_cur_slice,dec_pic_params_t * ps_pps,UWORD8 u1_nal_ref_idc,UWORD8 u1_bottom_field_flag,UWORD8 u1_field_pic_flag,WORD32 * pi4_poc)153 WORD32 ih264d_decode_pic_order_cnt(UWORD8 u1_is_idr_slice,
154 UWORD32 u2_frame_num,
155 pocstruct_t *ps_prev_poc,
156 pocstruct_t *ps_cur_poc,
157 dec_slice_params_t *ps_cur_slice, /*!< Pointer to current slice Params*/
158 dec_pic_params_t * ps_pps,
159 UWORD8 u1_nal_ref_idc,
160 UWORD8 u1_bottom_field_flag,
161 UWORD8 u1_field_pic_flag,
162 WORD32 *pi4_poc)
163 {
164 WORD16 i1_pic_msb;
165 WORD32 i4_top_field_order_cnt = 0, i4_bottom_field_order_cnt = 0;
166 dec_seq_params_t *ps_seq = ps_pps->ps_sps;
167 WORD32 i4_prev_frame_num_ofst;
168
169 switch(ps_seq->u1_pic_order_cnt_type)
170 {
171 case 0:
172 /* POC TYPE 0 */
173 if(u1_is_idr_slice)
174 {
175 ps_prev_poc->i4_pic_order_cnt_msb = 0;
176 ps_prev_poc->i4_pic_order_cnt_lsb = 0;
177 }
178 if(ps_prev_poc->u1_mmco_equalto5)
179 {
180 if(ps_prev_poc->u1_bot_field != 1)
181 {
182 ps_prev_poc->i4_pic_order_cnt_msb = 0;
183 ps_prev_poc->i4_pic_order_cnt_lsb =
184 ps_prev_poc->i4_top_field_order_count;
185 }
186 else
187 {
188 ps_prev_poc->i4_pic_order_cnt_msb = 0;
189 ps_prev_poc->i4_pic_order_cnt_lsb = 0;
190 }
191 }
192
193 if((ps_cur_poc->i4_pic_order_cnt_lsb
194 < ps_prev_poc->i4_pic_order_cnt_lsb)
195 && ((ps_prev_poc->i4_pic_order_cnt_lsb
196 - ps_cur_poc->i4_pic_order_cnt_lsb)
197 >= (ps_seq->i4_max_pic_order_cntLsb
198 >> 1)))
199 {
200 i1_pic_msb = ps_prev_poc->i4_pic_order_cnt_msb
201 + ps_seq->i4_max_pic_order_cntLsb;
202 }
203 else if((ps_cur_poc->i4_pic_order_cnt_lsb
204 > ps_prev_poc->i4_pic_order_cnt_lsb)
205 && ((ps_cur_poc->i4_pic_order_cnt_lsb
206 - ps_prev_poc->i4_pic_order_cnt_lsb)
207 >= (ps_seq->i4_max_pic_order_cntLsb
208 >> 1)))
209 {
210 i1_pic_msb = ps_prev_poc->i4_pic_order_cnt_msb
211 - ps_seq->i4_max_pic_order_cntLsb;
212 }
213 else
214 {
215 i1_pic_msb = ps_prev_poc->i4_pic_order_cnt_msb;
216 }
217
218 if(!u1_field_pic_flag || !u1_bottom_field_flag)
219 i4_top_field_order_cnt = i1_pic_msb
220 + ps_cur_poc->i4_pic_order_cnt_lsb;
221
222 if(!u1_field_pic_flag)
223 {
224 i4_bottom_field_order_cnt = i4_top_field_order_cnt
225 + ps_cur_poc->i4_delta_pic_order_cnt_bottom;
226 }
227 else if(u1_bottom_field_flag)
228 {
229 i4_bottom_field_order_cnt = i1_pic_msb
230 + ps_cur_poc->i4_pic_order_cnt_lsb;
231 }
232 ps_cur_poc->i4_pic_order_cnt_msb = i1_pic_msb;
233 break;
234
235 case 1:
236 {
237 /* POC TYPE 1 */
238 UWORD8 i;
239 WORD32 prev_frame_num;
240 WORD32 frame_num_ofst;
241 WORD32 abs_frm_num;
242 WORD32 poc_cycle_cnt, frame_num_in_poc_cycle;
243 WORD64 i8_expected_delta_poc_cycle;
244 WORD32 expected_poc;
245 WORD64 i8_result;
246
247 prev_frame_num = (WORD32)ps_cur_slice->u2_frame_num;
248 if(!u1_is_idr_slice)
249 {
250 if(ps_cur_slice->u1_mmco_equalto5)
251 {
252 prev_frame_num = 0;
253 i4_prev_frame_num_ofst = 0;
254 }
255 else
256 {
257 i4_prev_frame_num_ofst = ps_prev_poc->i4_prev_frame_num_ofst;
258 }
259 }
260 else
261 i4_prev_frame_num_ofst = 0;
262
263 /* 1. Derivation for FrameNumOffset */
264 if(u1_is_idr_slice)
265 {
266 frame_num_ofst = 0;
267 ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
268 ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
269 }
270 else if(prev_frame_num > ((WORD32)u2_frame_num))
271 {
272 frame_num_ofst = i4_prev_frame_num_ofst
273 + (WORD32)ps_seq->u2_u4_max_pic_num_minus1 + 1;
274 }
275 else
276 frame_num_ofst = i4_prev_frame_num_ofst;
277
278 /* 2. Derivation for absFrameNum */
279 if(0 != ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle)
280 abs_frm_num = frame_num_ofst + (WORD32)u2_frame_num;
281 else
282 abs_frm_num = 0;
283 if((u1_nal_ref_idc == 0) && (abs_frm_num > 0))
284 abs_frm_num = abs_frm_num - 1;
285
286 /* 4. expectedDeltaPerPicOrderCntCycle is derived as */
287 i8_expected_delta_poc_cycle = 0;
288 for(i = 0; i < ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle;
289 i++)
290 {
291 i8_expected_delta_poc_cycle +=
292 ps_seq->i4_ofst_for_ref_frame[i];
293 }
294
295 /* 3. When absFrameNum > 0, picOrderCntCycleCnt and
296 frame_num_in_poc_cycle are derived as : */
297 /* 5. expectedPicOrderCnt is derived as : */
298 if(abs_frm_num > 0)
299 {
300 poc_cycle_cnt =
301 DIV((abs_frm_num - 1),
302 ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle);
303 frame_num_in_poc_cycle =
304 MOD((abs_frm_num - 1),
305 ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle);
306
307 i8_result = poc_cycle_cnt
308 * i8_expected_delta_poc_cycle;
309
310 for(i = 0; i <= frame_num_in_poc_cycle; i++)
311 {
312 i8_result = i8_result
313 + ps_seq->i4_ofst_for_ref_frame[i];
314 }
315
316 if(IS_OUT_OF_RANGE_S32(i8_result))
317 return ERROR_INV_POC;
318
319 expected_poc = (WORD32)i8_result;
320
321 }
322 else
323 expected_poc = 0;
324
325 if(u1_nal_ref_idc == 0)
326 {
327 i8_result = (WORD64)expected_poc
328 + ps_seq->i4_ofst_for_non_ref_pic;
329
330 if(IS_OUT_OF_RANGE_S32(i8_result))
331 return ERROR_INV_POC;
332
333 expected_poc = (WORD32)i8_result;
334 }
335
336 /* 6. TopFieldOrderCnt or BottomFieldOrderCnt are derived as */
337 if(!u1_field_pic_flag)
338 {
339 i8_result = (WORD64)expected_poc
340 + ps_cur_poc->i4_delta_pic_order_cnt[0];
341
342 if(IS_OUT_OF_RANGE_S32(i8_result))
343 return ERROR_INV_POC;
344 i4_top_field_order_cnt = (WORD32)i8_result;
345
346 i8_result = (WORD64)i4_top_field_order_cnt
347 + ps_seq->i4_ofst_for_top_to_bottom_field
348 + ps_cur_poc->i4_delta_pic_order_cnt[1];
349
350 if(IS_OUT_OF_RANGE_S32(i8_result))
351 return ERROR_INV_POC;
352 i4_bottom_field_order_cnt = (WORD32)i8_result;
353 }
354 else if(!u1_bottom_field_flag)
355 {
356 i8_result = (WORD64)expected_poc
357 + ps_cur_poc->i4_delta_pic_order_cnt[0];
358
359 if(IS_OUT_OF_RANGE_S32(i8_result))
360 return ERROR_INV_POC;
361 i4_top_field_order_cnt = (WORD32)i8_result;
362 }
363 else
364 {
365 i8_result = (WORD64)expected_poc
366 + ps_seq->i4_ofst_for_top_to_bottom_field
367 + ps_cur_poc->i4_delta_pic_order_cnt[0];
368
369 if(IS_OUT_OF_RANGE_S32(i8_result))
370 return ERROR_INV_POC;
371 i4_bottom_field_order_cnt = (WORD32)i8_result;
372 }
373 /* Copy the current POC info into Previous POC structure */
374 ps_cur_poc->i4_prev_frame_num_ofst = frame_num_ofst;
375 }
376
377 break;
378 case 2:
379 {
380 /* POC TYPE 2 */
381 WORD32 prev_frame_num;
382 WORD32 frame_num_ofst;
383 WORD32 tmp_poc;
384
385 prev_frame_num = (WORD32)ps_cur_slice->u2_frame_num;
386 if(!u1_is_idr_slice)
387 {
388 if(ps_cur_slice->u1_mmco_equalto5)
389 {
390 prev_frame_num = 0;
391 i4_prev_frame_num_ofst = 0;
392 }
393 else
394 i4_prev_frame_num_ofst = ps_prev_poc->i4_prev_frame_num_ofst;
395 }
396 else
397 i4_prev_frame_num_ofst = 0;
398
399 /* 1. Derivation for FrameNumOffset */
400 if(u1_is_idr_slice)
401 {
402 frame_num_ofst = 0;
403 ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
404 ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
405 }
406 else if(prev_frame_num > ((WORD32)u2_frame_num))
407 {
408 frame_num_ofst = i4_prev_frame_num_ofst
409 + (WORD32)ps_seq->u2_u4_max_pic_num_minus1 + 1;
410 }
411 else
412 frame_num_ofst = i4_prev_frame_num_ofst;
413
414 /* 2. Derivation for tempPicOrderCnt */
415 if(u1_is_idr_slice)
416 tmp_poc = 0;
417 else if(u1_nal_ref_idc == 0)
418 tmp_poc = ((frame_num_ofst + (WORD32)u2_frame_num) << 1)
419 - 1;
420 else
421 tmp_poc = ((frame_num_ofst + (WORD32)u2_frame_num) << 1);
422
423 /* 6. TopFieldOrderCnt or BottomFieldOrderCnt are derived as */
424 if(!u1_field_pic_flag)
425 {
426 i4_top_field_order_cnt = tmp_poc;
427 i4_bottom_field_order_cnt = tmp_poc;
428 }
429 else if(!u1_bottom_field_flag)
430 i4_top_field_order_cnt = tmp_poc;
431 else
432 i4_bottom_field_order_cnt = tmp_poc;
433
434 /* Copy the current POC info into Previous POC structure */
435 ps_prev_poc->i4_prev_frame_num_ofst = frame_num_ofst;
436 ps_cur_poc->i4_prev_frame_num_ofst = frame_num_ofst;
437 }
438 break;
439 default:
440 return ERROR_INV_POC_TYPE_T;
441 break;
442 }
443
444 if(!u1_field_pic_flag) // or a complementary field pair
445 {
446 *pi4_poc = MIN(i4_top_field_order_cnt, i4_bottom_field_order_cnt);
447 ps_pps->i4_top_field_order_cnt = i4_top_field_order_cnt;
448 ps_pps->i4_bottom_field_order_cnt = i4_bottom_field_order_cnt;
449 }
450 else if(!u1_bottom_field_flag)
451 {
452 *pi4_poc = i4_top_field_order_cnt;
453 ps_pps->i4_top_field_order_cnt = i4_top_field_order_cnt;
454 }
455 else
456 {
457 *pi4_poc = i4_bottom_field_order_cnt;
458 ps_pps->i4_bottom_field_order_cnt = i4_bottom_field_order_cnt;
459 }
460
461 ps_pps->i4_avg_poc = *pi4_poc;
462
463 return OK;
464 }
465
466 /*!
467 **************************************************************************
468 * \if Function name : ih264d_end_of_pic_processing \endif
469 *
470 * \brief
471 * Performs the end of picture processing.
472 *
473 * It performs deblocking on the current picture and sets the i4_status of
474 * current picture as decoded.
475 *
476 * \return
477 * 0 on Success and Error code otherwise.
478 **************************************************************************
479 */
ih264d_end_of_pic_processing(dec_struct_t * ps_dec)480 WORD32 ih264d_end_of_pic_processing(dec_struct_t *ps_dec)
481 {
482 UWORD8 u1_pic_type, u1_nal_ref_idc;
483 dec_slice_params_t *ps_cur_slice = ps_dec->ps_cur_slice;
484
485 /* If nal_ref_idc is equal to 0 for one slice or slice data partition NAL
486 unit of a particular picture, it shall be equal to 0 for all slice and
487 slice data partition NAL units of the picture. nal_ref_idc greater
488 than 0 indicates that the content of the NAL unit belongs to a decoded
489 picture that is stored and marked for use as a reference picture in the
490 decoded picture buffer. */
491
492 /* 1. Do MMCO
493 2. Add Cur Pic to list of reference pics.
494 */
495
496 /* Call MMCO */
497 u1_pic_type = 0;
498 u1_nal_ref_idc = ps_cur_slice->u1_nal_ref_idc;
499
500 if(u1_nal_ref_idc)
501 {
502 if(ps_cur_slice->u1_nal_unit_type == IDR_SLICE_NAL)
503 {
504 if(ps_dec->ps_dpb_cmds->u1_long_term_reference_flag == 0)
505 {
506 ih264d_reset_ref_bufs(ps_dec->ps_dpb_mgr);
507 /* ignore DPB errors */
508 ih264d_insert_st_node(ps_dec->ps_dpb_mgr,
509 ps_dec->ps_cur_pic,
510 ps_dec->u1_pic_buf_id,
511 ps_cur_slice->u2_frame_num);
512 }
513 else
514 {
515 /* Equivalent of inserting a pic directly as longterm Pic */
516
517 {
518 /* ignore DPB errors */
519 ih264d_insert_st_node(ps_dec->ps_dpb_mgr,
520 ps_dec->ps_cur_pic,
521 ps_dec->u1_pic_buf_id,
522 ps_cur_slice->u2_frame_num);
523
524 /* Set longTermIdx = 0, MaxLongTermFrameIdx = 0 */
525 ih264d_delete_st_node_or_make_lt(
526 ps_dec->ps_dpb_mgr,
527 ps_cur_slice->u2_frame_num, 0,
528 ps_cur_slice->u1_field_pic_flag);
529
530 ps_dec->ps_dpb_mgr->u1_max_lt_pic_idx_plus1 = 1;
531 }
532 }
533 }
534 else
535 {
536
537 {
538 UWORD16 u2_pic_num = ps_cur_slice->u2_frame_num;
539
540 /* ignore DPB errors */
541 ih264d_do_mmco_buffer(ps_dec->ps_dpb_cmds, ps_dec->ps_dpb_mgr,
542 ps_dec->ps_cur_sps->u1_num_ref_frames, u2_pic_num,
543 (ps_dec->ps_cur_sps->u2_u4_max_pic_num_minus1),
544 ps_dec->u1_nal_unit_type, ps_dec->ps_cur_pic,
545 ps_dec->u1_pic_buf_id,
546 ps_cur_slice->u1_field_pic_flag,
547 ps_dec->e_dec_status);
548
549
550 }
551 }
552 ih264d_update_default_index_list(ps_dec->ps_dpb_mgr);
553 }
554
555 if(ps_cur_slice->u1_field_pic_flag)
556 {
557 if(ps_cur_slice->u1_bottom_field_flag)
558 {
559 if(u1_nal_ref_idc)
560 u1_pic_type = u1_pic_type | BOT_REF;
561 u1_pic_type = u1_pic_type | BOT_FLD;
562 }
563 else
564 {
565 if(u1_nal_ref_idc)
566 u1_pic_type = u1_pic_type | TOP_REF;
567 u1_pic_type = u1_pic_type | TOP_FLD;
568 }
569 }
570 else
571 u1_pic_type = TOP_REF | BOT_REF;
572 ps_dec->ps_cur_pic->u1_pic_type |= u1_pic_type;
573
574
575 if(ps_cur_slice->u1_field_pic_flag)
576 {
577 H264_DEC_DEBUG_PRINT("Toggling secondField\n");
578 ps_dec->u1_second_field = 1 - ps_dec->u1_second_field;
579 }
580
581 return OK;
582 }
583
584 /*****************************************************************************/
585 /* */
586 /* Function Name : init_dpb_size */
587 /* */
588 /* Description : This function calculates the DBP i4_size in frames */
589 /* Inputs : ps_seq - current sequence params */
590 /* */
591 /* Globals : None */
592 /* */
593 /* Outputs : None */
594 /* */
595 /* Returns : DPB in frames */
596 /* */
597 /* Issues : None */
598 /* */
599 /* Revision History: */
600 /* */
601 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
602 /* 28 04 2005 NS Draft */
603 /* */
604 /*****************************************************************************/
ih264d_get_dpb_size(dec_seq_params_t * ps_seq)605 WORD32 ih264d_get_dpb_size(dec_seq_params_t *ps_seq)
606 {
607 WORD32 i4_size;
608 UWORD8 u1_level_idc;
609
610 u1_level_idc = ps_seq->u1_level_idc;
611
612 switch(u1_level_idc)
613 {
614 case 10:
615 i4_size = 152064;
616 break;
617 case 11:
618 i4_size = 345600;
619 break;
620 case 12:
621 i4_size = 912384;
622 break;
623 case 13:
624 i4_size = 912384;
625 break;
626 case 20:
627 i4_size = 912384;
628 break;
629 case 21:
630 i4_size = 1824768;
631 break;
632 case 22:
633 i4_size = 3110400;
634 break;
635 case 30:
636 i4_size = 3110400;
637 break;
638 case 31:
639 i4_size = 6912000;
640 break;
641 case 32:
642 i4_size = 7864320;
643 break;
644 case 40:
645 i4_size = 12582912;
646 break;
647 case 41:
648 i4_size = 12582912;
649 break;
650 case 42:
651 i4_size = 12582912;
652 break;
653 case 50:
654 i4_size = 42393600;
655 break;
656 case 51:
657 i4_size = 70778880;
658 break;
659 case 52:
660 i4_size = 70778880;
661 break;
662 default:
663 i4_size = 70778880;
664 break;
665 }
666
667 i4_size /= (ps_seq->u2_frm_wd_in_mbs * (ps_seq->u2_frm_ht_in_mbs << (1 - ps_seq->u1_frame_mbs_only_flag)));
668 i4_size /= 384;
669 i4_size = MIN(i4_size, 16);
670 i4_size = MAX(i4_size, 1);
671 return (i4_size);
672 }
673
674 /**************************************************************************/
675 /* This function initialises the value of ps_dec->u1_recon_mb_grp */
676 /* ps_dec->u1_recon_mb_grp must satisfy the following criteria */
677 /* - multiple of 2 (required for N/2 parse-mvpred design) */
678 /* - multiple of 4 (if it is not a frame_mbs_only sequence), */
679 /* in this case N/2 itself needs to be even for mbpair processing */
680 /* - lesser than ps_dec->u2_frm_wd_in_mbs/2 (at least 3 N-Chunks */
681 /* should make a row to ensure proper MvTop transferring) */
682 /**************************************************************************/
ih264d_init_dec_mb_grp(dec_struct_t * ps_dec)683 WORD32 ih264d_init_dec_mb_grp(dec_struct_t *ps_dec)
684 {
685 dec_seq_params_t *ps_seq = ps_dec->ps_cur_sps;
686 UWORD8 u1_frm = ps_seq->u1_frame_mbs_only_flag;
687
688 ps_dec->u1_recon_mb_grp = ps_dec->u2_frm_wd_in_mbs << ps_seq->u1_mb_aff_flag;
689
690 ps_dec->u1_recon_mb_grp_pair = ps_dec->u1_recon_mb_grp >> 1;
691
692 if(!ps_dec->u1_recon_mb_grp)
693 {
694 return ERROR_MB_GROUP_ASSGN_T;
695 }
696
697 ps_dec->u4_num_mbs_prev_nmb = ps_dec->u1_recon_mb_grp;
698
699 return OK;
700 }
701
702
703 /*!
704 **************************************************************************
705 * \if Function name : ih264d_init_pic \endif
706 *
707 * \brief
708 * Initializes the picture.
709 *
710 * \return
711 * 0 on Success and Error code otherwise
712 *
713 * \note
714 * This function is called when first slice of the
715 * NON -IDR picture is encountered.
716 **************************************************************************
717 */
ih264d_init_pic(dec_struct_t * ps_dec,UWORD16 u2_frame_num,WORD32 i4_poc,dec_pic_params_t * ps_pps)718 WORD32 ih264d_init_pic(dec_struct_t *ps_dec,
719 UWORD16 u2_frame_num,
720 WORD32 i4_poc,
721 dec_pic_params_t *ps_pps)
722 {
723 dec_seq_params_t *ps_seq = ps_pps->ps_sps;
724 prev_seq_params_t * ps_prev_seq_params = &ps_dec->s_prev_seq_params;
725 WORD32 i4_pic_bufs;
726 WORD32 ret;
727
728 ps_dec->ps_cur_slice->u2_frame_num = u2_frame_num;
729 ps_dec->ps_cur_slice->i4_poc = i4_poc;
730 ps_dec->ps_cur_pps = ps_pps;
731 ps_dec->ps_cur_pps->pv_codec_handle = ps_dec;
732
733 ps_dec->ps_cur_sps = ps_seq;
734 ps_dec->ps_dpb_mgr->i4_max_frm_num = ps_seq->u2_u4_max_pic_num_minus1
735 + 1;
736
737 ps_dec->ps_dpb_mgr->u2_pic_ht = ps_dec->u2_pic_ht;
738 ps_dec->ps_dpb_mgr->u2_pic_wd = ps_dec->u2_pic_wd;
739 ps_dec->i4_pic_type = NA_SLICE;
740 ps_dec->i4_frametype = IV_NA_FRAME;
741 ps_dec->i4_content_type = IV_CONTENTTYPE_NA;
742
743 /*--------------------------------------------------------------------*/
744 /* Get the value of MaxMbAddress and frmheight in Mbs */
745 /*--------------------------------------------------------------------*/
746 ps_seq->u2_max_mb_addr =
747 (ps_seq->u2_frm_wd_in_mbs
748 * (ps_dec->u2_pic_ht
749 >> (4
750 + ps_dec->ps_cur_slice->u1_field_pic_flag)))
751 - 1;
752 ps_dec->u2_frm_ht_in_mbs = (ps_dec->u2_pic_ht
753 >> (4 + ps_dec->ps_cur_slice->u1_field_pic_flag));
754
755 /***************************************************************************/
756 /* If change in Level or the required PicBuffers i4_size is more than the */
757 /* current one FREE the current PicBuffers and allocate affresh */
758 /***************************************************************************/
759 if(!ps_dec->u1_init_dec_flag)
760 {
761 ps_dec->u1_max_dec_frame_buffering = ih264d_get_dpb_size(ps_seq);
762
763 ps_dec->i4_display_delay = ps_dec->u1_max_dec_frame_buffering;
764 if((1 == ps_seq->u1_vui_parameters_present_flag) &&
765 (1 == ps_seq->s_vui.u1_bitstream_restriction_flag))
766 {
767 if(ps_seq->u1_frame_mbs_only_flag == 1)
768 ps_dec->i4_display_delay = ps_seq->s_vui.u4_num_reorder_frames + 1;
769 else
770 ps_dec->i4_display_delay = ps_seq->s_vui.u4_num_reorder_frames * 2 + 2;
771 }
772 ps_dec->i4_reorder_depth = ps_dec->i4_display_delay;
773
774 if(IVD_DECODE_FRAME_OUT == ps_dec->e_frm_out_mode)
775 ps_dec->i4_display_delay = 0;
776
777 if(ps_dec->u4_share_disp_buf == 0)
778 {
779 if(ps_seq->u1_frame_mbs_only_flag == 1)
780 ps_dec->u1_pic_bufs = ps_dec->i4_display_delay + ps_seq->u1_num_ref_frames + 1;
781 else
782 ps_dec->u1_pic_bufs = ps_dec->i4_display_delay + ps_seq->u1_num_ref_frames * 2 + 2;
783 }
784 else
785 {
786 ps_dec->u1_pic_bufs = (WORD32)ps_dec->u4_num_disp_bufs;
787 }
788
789 /* Ensure at least two buffers are allocated */
790 ps_dec->u1_pic_bufs = MAX(ps_dec->u1_pic_bufs, 2);
791
792 if(ps_dec->u4_share_disp_buf == 0)
793 ps_dec->u1_pic_bufs = MIN(ps_dec->u1_pic_bufs,
794 (H264_MAX_REF_PICS * 2));
795
796 ps_dec->u1_max_dec_frame_buffering = MIN(
797 ps_dec->u1_max_dec_frame_buffering,
798 ps_dec->u1_pic_bufs);
799
800 /* Temporary hack to run Tractor Cav/Cab/MbAff Profiler streams also for CAFI1_SVA_C.264 in conformance*/
801 if(ps_dec->u1_init_dec_flag)
802 {
803 ih264d_release_pics_in_dpb((void *)ps_dec,
804 ps_dec->u1_pic_bufs);
805 ih264d_release_display_bufs(ps_dec);
806 ih264d_reset_ref_bufs(ps_dec->ps_dpb_mgr);
807 }
808
809 /*********************************************************************/
810 /* Configuring decoder parameters based on level and then */
811 /* fresh pointer initialisation in decoder scratch and state buffers */
812 /*********************************************************************/
813 if(!ps_dec->u1_init_dec_flag ||
814 ((ps_seq->u1_level_idc < H264_LEVEL_3_0) ^ (ps_prev_seq_params->u1_level_idc < H264_LEVEL_3_0)))
815 {
816 ret = ih264d_init_dec_mb_grp(ps_dec);
817 if(ret != OK)
818 return ret;
819 }
820
821 ret = ih264d_allocate_dynamic_bufs(ps_dec);
822 if(ret != OK)
823 {
824 /* Free any dynamic buffers that are allocated */
825 ih264d_free_dynamic_bufs(ps_dec);
826 ps_dec->i4_error_code = IVD_MEM_ALLOC_FAILED;
827 return IVD_MEM_ALLOC_FAILED;
828 }
829
830 ret = ih264d_create_pic_buffers(ps_dec->u1_pic_bufs,
831 ps_dec);
832 if(ret != OK)
833 return ret;
834
835
836
837 ret = ih264d_create_mv_bank(ps_dec, ps_dec->u2_pic_wd,
838 ps_dec->u2_pic_ht);
839 if(ret != OK)
840 return ret;
841
842 /* In shared mode, set all of them as used by display */
843 if(ps_dec->u4_share_disp_buf == 1)
844 {
845 WORD32 i;
846
847 for(i = 0; i < ps_dec->u1_pic_bufs; i++)
848 {
849 ih264_buf_mgr_set_status((buf_mgr_t *)ps_dec->pv_pic_buf_mgr, i,
850 BUF_MGR_IO);
851 }
852 }
853
854 ps_dec->u1_init_dec_flag = 1;
855 ps_prev_seq_params->u2_frm_wd_in_mbs = ps_seq->u2_frm_wd_in_mbs;
856 ps_prev_seq_params->u1_level_idc = ps_seq->u1_level_idc;
857 ps_prev_seq_params->u1_profile_idc = ps_seq->u1_profile_idc;
858 ps_prev_seq_params->u2_frm_ht_in_mbs = ps_seq->u2_frm_ht_in_mbs;
859 ps_prev_seq_params->u1_frame_mbs_only_flag =
860 ps_seq->u1_frame_mbs_only_flag;
861 ps_prev_seq_params->u1_direct_8x8_inference_flag =
862 ps_seq->u1_direct_8x8_inference_flag;
863
864 ps_dec->i4_cur_display_seq = 0;
865 ps_dec->i4_prev_max_display_seq = 0;
866 ps_dec->i4_max_poc = 0;
867
868 {
869 /* 0th entry of CtxtIncMbMap will be always be containing default values
870 for CABAC context representing MB not available */
871 ctxt_inc_mb_info_t *p_DefCtxt = ps_dec->p_ctxt_inc_mb_map - 1;
872 UWORD8 *pu1_temp;
873 WORD8 i;
874 p_DefCtxt->u1_mb_type = CAB_SKIP;
875
876 p_DefCtxt->u1_cbp = 0x0f;
877 p_DefCtxt->u1_intra_chroma_pred_mode = 0;
878
879 p_DefCtxt->u1_yuv_dc_csbp = 0x7;
880
881 p_DefCtxt->u1_transform8x8_ctxt = 0;
882
883 pu1_temp = (UWORD8*)p_DefCtxt->i1_ref_idx;
884 for(i = 0; i < 4; i++, pu1_temp++)
885 (*pu1_temp) = 0;
886 pu1_temp = (UWORD8*)p_DefCtxt->u1_mv;
887 for(i = 0; i < 16; i++, pu1_temp++)
888 (*pu1_temp) = 0;
889 ps_dec->ps_def_ctxt_mb_info = p_DefCtxt;
890 }
891
892 }
893 /* reset DBP commands read u4_flag */
894 ps_dec->ps_dpb_cmds->u1_dpb_commands_read = 0;
895
896 return OK;
897 }
898
899 /*****************************************************************************/
900 /* */
901 /* Function Name : ih264d_get_next_display_field */
902 /* */
903 /* Description : Application calls this module to get the next field */
904 /* to be displayed */
905 /* */
906 /* Inputs : 1. IBUFAPI_Handle Hnadle to the Display buffer */
907 /* 2. IH264DEC_DispUnit Pointer to the display struct */
908 /* */
909 /* Globals : */
910 /* */
911 /* */
912 /* Processing : None */
913 /* Outputs : None */
914 /* Returns : None */
915 /* Issues : None */
916 /* */
917 /* Revision History: */
918 /* */
919 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
920 /* 27 05 2005 Ittiam Draft */
921 /* */
922 /*****************************************************************************/
923
ih264d_get_next_display_field(dec_struct_t * ps_dec,ivd_out_bufdesc_t * ps_out_buffer,ivd_get_display_frame_op_t * pv_disp_op)924 WORD32 ih264d_get_next_display_field(dec_struct_t * ps_dec,
925 ivd_out_bufdesc_t *ps_out_buffer,
926 ivd_get_display_frame_op_t *pv_disp_op)
927 {
928 pic_buffer_t *pic_buf;
929
930 UWORD8 i1_cur_fld;
931 WORD32 u4_api_ret = -1;
932 WORD32 i4_disp_buf_id;
933 iv_yuv_buf_t *ps_op_frm;
934
935
936
937 ps_op_frm = &(ps_dec->s_disp_frame_info);
938 H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
939 pic_buf = (pic_buffer_t *)ih264_disp_mgr_get(
940 (disp_mgr_t *)ps_dec->pv_disp_buf_mgr, &i4_disp_buf_id);
941 ps_dec->u4_num_fld_in_frm = 0;
942 u4_api_ret = -1;
943 pv_disp_op->u4_ts = 0;
944 pv_disp_op->e_output_format = ps_dec->u1_chroma_format;
945
946 pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_out_buffer->pu1_bufs[0];
947 pv_disp_op->s_disp_frm_buf.pv_u_buf = ps_out_buffer->pu1_bufs[1];
948 pv_disp_op->s_disp_frm_buf.pv_v_buf = ps_out_buffer->pu1_bufs[2];
949 ps_dec->i4_display_index = DEFAULT_POC;
950 if(pic_buf != NULL)
951 {
952 ps_dec->pv_disp_sei_params = &pic_buf->s_sei_pic;
953 pv_disp_op->e4_fld_type = 0;
954 pv_disp_op->u4_disp_buf_id = i4_disp_buf_id;
955
956 ps_op_frm->u4_y_ht = pic_buf->u2_disp_height << 1;
957 ps_op_frm->u4_u_ht = ps_op_frm->u4_v_ht = ps_op_frm->u4_y_ht >> 1;
958 ps_op_frm->u4_y_wd = pic_buf->u2_disp_width;
959
960 ps_op_frm->u4_u_wd = ps_op_frm->u4_v_wd = ps_op_frm->u4_y_wd >> 1;
961
962 ps_op_frm->u4_y_strd = pic_buf->u2_frm_wd_y;
963 ps_op_frm->u4_u_strd = ps_op_frm->u4_v_strd = pic_buf->u2_frm_wd_uv;
964
965 /* ! */
966 pv_disp_op->u4_ts = pic_buf->u4_ts;
967 ps_dec->i4_display_index = pic_buf->i4_poc;
968
969 /* set the start of the Y, U and V buffer pointer for display */
970 ps_op_frm->pv_y_buf = pic_buf->pu1_buf1 + pic_buf->u2_crop_offset_y;
971 ps_op_frm->pv_u_buf = pic_buf->pu1_buf2 + pic_buf->u2_crop_offset_uv;
972 ps_op_frm->pv_v_buf = pic_buf->pu1_buf3 + pic_buf->u2_crop_offset_uv;
973 ps_dec->u4_num_fld_in_frm++;
974 ps_dec->u4_num_fld_in_frm++;
975 u4_api_ret = 0;
976
977 if(pic_buf->u1_picturetype == 0)
978 pv_disp_op->u4_progressive_frame_flag = 1;
979 else
980 pv_disp_op->u4_progressive_frame_flag = 0;
981
982 } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
983 pv_disp_op->u4_error_code = u4_api_ret;
984 pv_disp_op->e_pic_type = 0xFFFFFFFF; //Junk;
985
986 if(u4_api_ret)
987 {
988 pv_disp_op->u4_error_code = 1; //put a proper error code here
989 }
990 else
991 {
992
993 //Release the buffer if being sent for display
994 UWORD32 temp;
995 UWORD32 dest_inc_Y = 0, dest_inc_UV = 0;
996
997 pv_disp_op->s_disp_frm_buf.u4_y_wd = temp = MIN(ps_op_frm->u4_y_wd,
998 ps_op_frm->u4_y_strd);
999 pv_disp_op->s_disp_frm_buf.u4_u_wd = pv_disp_op->s_disp_frm_buf.u4_y_wd
1000 >> 1;
1001 pv_disp_op->s_disp_frm_buf.u4_v_wd = pv_disp_op->s_disp_frm_buf.u4_y_wd
1002 >> 1;
1003
1004 pv_disp_op->s_disp_frm_buf.u4_y_ht = ps_op_frm->u4_y_ht;
1005 pv_disp_op->s_disp_frm_buf.u4_u_ht = pv_disp_op->s_disp_frm_buf.u4_y_ht
1006 >> 1;
1007 pv_disp_op->s_disp_frm_buf.u4_v_ht = pv_disp_op->s_disp_frm_buf.u4_y_ht
1008 >> 1;
1009 if(0 == ps_dec->u4_share_disp_buf)
1010 {
1011 pv_disp_op->s_disp_frm_buf.u4_y_strd =
1012 pv_disp_op->s_disp_frm_buf.u4_y_wd;
1013 pv_disp_op->s_disp_frm_buf.u4_u_strd =
1014 pv_disp_op->s_disp_frm_buf.u4_y_wd >> 1;
1015 pv_disp_op->s_disp_frm_buf.u4_v_strd =
1016 pv_disp_op->s_disp_frm_buf.u4_y_wd >> 1;
1017
1018 }
1019 else
1020 {
1021 pv_disp_op->s_disp_frm_buf.u4_y_strd = ps_op_frm->u4_y_strd;
1022 }
1023
1024 if(ps_dec->u4_app_disp_width)
1025 {
1026 pv_disp_op->s_disp_frm_buf.u4_y_strd = MAX(
1027 ps_dec->u4_app_disp_width,
1028 pv_disp_op->s_disp_frm_buf.u4_y_strd);
1029 }
1030
1031 pv_disp_op->u4_error_code = 0;
1032 if(pv_disp_op->e_output_format == IV_YUV_420P)
1033 {
1034 UWORD32 i;
1035 pv_disp_op->s_disp_frm_buf.u4_u_strd =
1036 pv_disp_op->s_disp_frm_buf.u4_y_strd >> 1;
1037 pv_disp_op->s_disp_frm_buf.u4_v_strd =
1038 pv_disp_op->s_disp_frm_buf.u4_y_strd >> 1;
1039
1040 pv_disp_op->s_disp_frm_buf.u4_u_wd = ps_op_frm->u4_y_wd >> 1;
1041 pv_disp_op->s_disp_frm_buf.u4_v_wd = ps_op_frm->u4_y_wd >> 1;
1042
1043 if(1 == ps_dec->u4_share_disp_buf)
1044 {
1045 pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_op_frm->pv_y_buf;
1046
1047 for(i = 0; i < MAX_DISP_BUFS_NEW; i++)
1048 {
1049 UWORD8 *buf = ps_dec->disp_bufs[i].buf[0];
1050 buf += ps_dec->disp_bufs[i].u4_ofst[0];
1051 if(((UWORD8 *)pv_disp_op->s_disp_frm_buf.pv_y_buf
1052 - pic_buf->u2_crop_offset_y) == buf)
1053 {
1054 buf = ps_dec->disp_bufs[i].buf[1];
1055 buf += ps_dec->disp_bufs[i].u4_ofst[1];
1056 pv_disp_op->s_disp_frm_buf.pv_u_buf = buf
1057 + (pic_buf->u2_crop_offset_uv
1058 / YUV420SP_FACTOR);
1059
1060 buf = ps_dec->disp_bufs[i].buf[2];
1061 buf += ps_dec->disp_bufs[i].u4_ofst[2];
1062 pv_disp_op->s_disp_frm_buf.pv_v_buf = buf
1063 + (pic_buf->u2_crop_offset_uv
1064 / YUV420SP_FACTOR);
1065
1066 }
1067 }
1068 }
1069
1070 }
1071 else if((pv_disp_op->e_output_format == IV_YUV_420SP_UV)
1072 || (pv_disp_op->e_output_format == IV_YUV_420SP_VU))
1073 {
1074 pv_disp_op->s_disp_frm_buf.u4_u_strd =
1075 pv_disp_op->s_disp_frm_buf.u4_y_strd;
1076 pv_disp_op->s_disp_frm_buf.u4_v_strd = 0;
1077
1078 if(1 == ps_dec->u4_share_disp_buf)
1079 {
1080 UWORD32 i;
1081
1082 pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_op_frm->pv_y_buf;
1083
1084 for(i = 0; i < MAX_DISP_BUFS_NEW; i++)
1085 {
1086 UWORD8 *buf = ps_dec->disp_bufs[i].buf[0];
1087 buf += ps_dec->disp_bufs[i].u4_ofst[0];
1088 if((UWORD8 *)pv_disp_op->s_disp_frm_buf.pv_y_buf
1089 - pic_buf->u2_crop_offset_y == buf)
1090 {
1091 buf = ps_dec->disp_bufs[i].buf[1];
1092 buf += ps_dec->disp_bufs[i].u4_ofst[1];
1093 pv_disp_op->s_disp_frm_buf.pv_u_buf = buf
1094 + pic_buf->u2_crop_offset_uv;
1095 ;
1096
1097 buf = ps_dec->disp_bufs[i].buf[2];
1098 buf += ps_dec->disp_bufs[i].u4_ofst[2];
1099 pv_disp_op->s_disp_frm_buf.pv_v_buf = buf
1100 + pic_buf->u2_crop_offset_uv;
1101 ;
1102 }
1103 }
1104 }
1105 pv_disp_op->s_disp_frm_buf.u4_u_wd =
1106 pv_disp_op->s_disp_frm_buf.u4_y_wd;
1107 pv_disp_op->s_disp_frm_buf.u4_v_wd = 0;
1108
1109 }
1110 else if((pv_disp_op->e_output_format == IV_RGB_565)
1111 || (pv_disp_op->e_output_format == IV_YUV_422ILE))
1112 {
1113
1114 pv_disp_op->s_disp_frm_buf.u4_u_strd = 0;
1115 pv_disp_op->s_disp_frm_buf.u4_v_strd = 0;
1116 pv_disp_op->s_disp_frm_buf.u4_u_wd = 0;
1117 pv_disp_op->s_disp_frm_buf.u4_v_wd = 0;
1118 pv_disp_op->s_disp_frm_buf.u4_u_ht = 0;
1119 pv_disp_op->s_disp_frm_buf.u4_v_ht = 0;
1120
1121 }
1122
1123
1124 }
1125
1126 return u4_api_ret;
1127 }
1128
1129
1130 /*****************************************************************************/
1131 /* Function Name : ih264d_release_display_field */
1132 /* */
1133 /* Description : This function releases the display field that was returned */
1134 /* here. */
1135 /* Inputs : ps_dec - Decoder parameters */
1136 /* Globals : None */
1137 /* Processing : Refer bumping process in the standard */
1138 /* Outputs : Assigns display sequence number. */
1139 /* Returns : None */
1140 /* */
1141 /* Issues : None */
1142 /* */
1143 /* Revision History: */
1144 /* */
1145 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
1146 /* 27 04 2005 NS Draft */
1147 /* */
1148 /*****************************************************************************/
ih264d_release_display_field(dec_struct_t * ps_dec,ivd_get_display_frame_op_t * pv_disp_op)1149 void ih264d_release_display_field(dec_struct_t *ps_dec,
1150 ivd_get_display_frame_op_t *pv_disp_op)
1151 {
1152 if(1 == pv_disp_op->u4_error_code)
1153 {
1154 if(1 == ps_dec->u1_flushfrm)
1155 {
1156 UWORD32 i;
1157
1158 if(1 == ps_dec->u4_share_disp_buf)
1159 {
1160 H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
1161 for(i = 0; i < (MAX_DISP_BUFS_NEW); i++)
1162 {
1163 if(1 == ps_dec->u4_disp_buf_mapping[i])
1164 {
1165 ih264_buf_mgr_release(
1166 (buf_mgr_t *)ps_dec->pv_pic_buf_mgr, i,
1167 BUF_MGR_IO);
1168 ps_dec->u4_disp_buf_mapping[i] = 0;
1169 }
1170 } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
1171
1172 memset(ps_dec->u4_disp_buf_to_be_freed, 0,
1173 (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
1174 for(i = 0; i < ps_dec->u1_pic_bufs; i++)
1175 ps_dec->u4_disp_buf_mapping[i] = 1;
1176 }
1177 ps_dec->u1_flushfrm = 0;
1178
1179 }
1180 }
1181 else
1182 {
1183 H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
1184
1185 if(0 == ps_dec->u4_share_disp_buf)
1186 {
1187 ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1188 pv_disp_op->u4_disp_buf_id,
1189 BUF_MGR_IO);
1190
1191 }
1192 else
1193 {
1194 ps_dec->u4_disp_buf_mapping[pv_disp_op->u4_disp_buf_id] = 1;
1195 } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
1196
1197 }
1198 }
1199 /*****************************************************************************/
1200 /* Function Name : ih264d_assign_display_seq */
1201 /* */
1202 /* Description : This function implments bumping process. Every outgoing */
1203 /* frame from DPB is assigned a display sequence number */
1204 /* which increases monotonically. System looks for this */
1205 /* number to display a frame. */
1206 /* here. */
1207 /* Inputs : ps_dec - Decoder parameters */
1208 /* Globals : None */
1209 /* Processing : Refer bumping process in the standard */
1210 /* Outputs : Assigns display sequence number. */
1211 /* Returns : None */
1212 /* */
1213 /* Issues : None */
1214 /* */
1215 /* Revision History: */
1216 /* */
1217 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
1218 /* 27 04 2005 NS Draft */
1219 /* */
1220 /*****************************************************************************/
ih264d_assign_display_seq(dec_struct_t * ps_dec)1221 WORD32 ih264d_assign_display_seq(dec_struct_t *ps_dec)
1222 {
1223 WORD32 i;
1224 WORD32 i4_min_poc;
1225 WORD32 i4_min_poc_buf_id;
1226 WORD32 i4_min_index;
1227 dpb_manager_t *ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1228 WORD32 (*i4_poc_buf_id_map)[3] = ps_dpb_mgr->ai4_poc_buf_id_map;
1229
1230 i4_min_poc = 0x7fffffff;
1231 i4_min_poc_buf_id = -1;
1232 i4_min_index = -1;
1233
1234 if(ps_dpb_mgr->i1_poc_buf_id_entries >= ps_dec->i4_display_delay)
1235 {
1236 for(i = 0; i < MAX_FRAMES; i++)
1237 {
1238 if((i4_poc_buf_id_map[i][0] != -1)
1239 && (DO_NOT_DISP
1240 != ps_dpb_mgr->ai4_poc_buf_id_map[i][0]))
1241 {
1242 /* Checking for <= is necessary to handle cases where there is one
1243 valid buffer with poc set to 0x7FFFFFFF. */
1244 if(i4_poc_buf_id_map[i][1] <= i4_min_poc)
1245 {
1246 i4_min_poc = i4_poc_buf_id_map[i][1];
1247 i4_min_poc_buf_id = i4_poc_buf_id_map[i][0];
1248 i4_min_index = i;
1249 }
1250 }
1251 }
1252
1253 if((i4_min_index != -1) && (DO_NOT_DISP != i4_min_poc_buf_id))
1254 {
1255 ps_dec->i4_cur_display_seq++;
1256 ih264_disp_mgr_add(
1257 (disp_mgr_t *)ps_dec->pv_disp_buf_mgr,
1258 i4_min_poc_buf_id, ps_dec->i4_cur_display_seq,
1259 ps_dec->apv_buf_id_pic_buf_map[i4_min_poc_buf_id]);
1260 i4_poc_buf_id_map[i4_min_index][0] = -1;
1261 i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1262 ps_dpb_mgr->i1_poc_buf_id_entries--;
1263 }
1264 else if(DO_NOT_DISP == i4_min_poc_buf_id)
1265 {
1266 WORD32 i4_error_code;
1267 i4_error_code = ERROR_GAPS_IN_FRM_NUM;
1268 // i4_error_code |= 1<<IVD_CORRUPTEDDATA;
1269 return i4_error_code;
1270 }
1271 }
1272 return OK;
1273 }
1274
1275 /*****************************************************************************/
1276 /* */
1277 /* Function Name : ih264d_release_display_bufs */
1278 /* */
1279 /* Description : This function implments bumping process when mmco = 5. */
1280 /* Each outgoing frame from DPB is assigned a display */
1281 /* sequence number which increases monotonically. System */
1282 /* looks for this number to display a frame. */
1283 /* Inputs : ps_dec - Decoder parameters */
1284 /* Globals : None */
1285 /* Processing : Refer bumping process in the standard for mmco = 5 */
1286 /* Outputs : Assigns display sequence number. */
1287 /* Returns : None */
1288 /* */
1289 /* Issues : None */
1290 /* */
1291 /* Revision History: */
1292 /* */
1293 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
1294 /* 27 04 2005 NS Draft */
1295 /* */
1296 /*****************************************************************************/
ih264d_release_display_bufs(dec_struct_t * ps_dec)1297 void ih264d_release_display_bufs(dec_struct_t *ps_dec)
1298 {
1299 WORD32 i, j;
1300 WORD32 i4_min_poc;
1301 WORD32 i4_min_poc_buf_id;
1302 WORD32 i4_min_index;
1303 UWORD64 u8_temp;
1304 dpb_manager_t *ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1305 WORD32 (*i4_poc_buf_id_map)[3] = ps_dpb_mgr->ai4_poc_buf_id_map;
1306
1307 i4_min_poc = 0x7fffffff;
1308 i4_min_poc_buf_id = 0;
1309 i4_min_index = 0;
1310
1311 ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1312
1313 for(j = 0; j < ps_dpb_mgr->i1_poc_buf_id_entries; j++)
1314 {
1315 i4_min_poc = 0x7fffffff;
1316 for(i = 0; i < MAX_FRAMES; i++)
1317 {
1318 if(i4_poc_buf_id_map[i][0] != -1)
1319 {
1320 /* Checking for <= is necessary to handle cases where there is one
1321 valid buffer with poc set to 0x7FFFFFFF. */
1322 if(i4_poc_buf_id_map[i][1] <= i4_min_poc)
1323 {
1324 i4_min_poc = i4_poc_buf_id_map[i][1];
1325 i4_min_poc_buf_id = i4_poc_buf_id_map[i][0];
1326 i4_min_index = i;
1327 }
1328 }
1329 }
1330
1331 if(DO_NOT_DISP != i4_min_poc_buf_id)
1332 {
1333 ps_dec->i4_cur_display_seq++;
1334 ih264_disp_mgr_add(
1335 (disp_mgr_t *)ps_dec->pv_disp_buf_mgr,
1336 i4_min_poc_buf_id, ps_dec->i4_cur_display_seq,
1337 ps_dec->apv_buf_id_pic_buf_map[i4_min_poc_buf_id]);
1338 i4_poc_buf_id_map[i4_min_index][0] = -1;
1339 i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1340 ps_dpb_mgr->ai4_poc_buf_id_map[i4_min_index][2] = 0;
1341 }
1342 else
1343 {
1344 i4_poc_buf_id_map[i4_min_index][0] = -1;
1345 i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1346 ps_dpb_mgr->ai4_poc_buf_id_map[i4_min_index][2] = 0;
1347 }
1348 }
1349 ps_dpb_mgr->i1_poc_buf_id_entries = 0;
1350 u8_temp = (UWORD64)ps_dec->i4_prev_max_display_seq + ps_dec->i4_max_poc
1351 + ps_dec->u1_max_dec_frame_buffering + 1;
1352 /*If i4_prev_max_display_seq overflows integer range, reset it */
1353 ps_dec->i4_prev_max_display_seq = (u8_temp > 0x7fffffff)?
1354 0 : u8_temp;
1355 ps_dec->i4_max_poc = 0;
1356 }
1357
1358 /*****************************************************************************/
1359 /* */
1360 /* Function Name : ih264d_assign_pic_num */
1361 /* */
1362 /* Description : This function assigns pic num to each reference frame */
1363 /* depending on the cur_frame_num as speified in section */
1364 /* 8.2.4.1 */
1365 /* */
1366 /* Inputs : ps_dec */
1367 /* */
1368 /* Globals : NO globals used */
1369 /* */
1370 /* Processing : for all ST pictures */
1371 /* if( FrameNum > cur_frame_num) */
1372 /* PicNum = FrameNum - MaxFrameNum */
1373 /* else */
1374 /* PicNum = FrameNum */
1375 /* */
1376 /* Returns : void */
1377 /* */
1378 /* Issues : NO */
1379 /* */
1380 /* Revision History: */
1381 /* */
1382 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
1383 /* 13 07 2002 Jay Draft */
1384 /* */
1385 /*****************************************************************************/
1386
ih264d_assign_pic_num(dec_struct_t * ps_dec)1387 void ih264d_assign_pic_num(dec_struct_t *ps_dec)
1388 {
1389 dpb_manager_t *ps_dpb_mgr;
1390 struct dpb_info_t *ps_next_dpb;
1391 WORD8 i;
1392 WORD32 i4_cur_frame_num, i4_max_frame_num;
1393 WORD32 i4_ref_frame_num;
1394 UWORD8 u1_fld_pic_flag = ps_dec->ps_cur_slice->u1_field_pic_flag;
1395
1396 i4_max_frame_num = ps_dec->ps_cur_sps->u2_u4_max_pic_num_minus1 + 1;
1397 i4_cur_frame_num = ps_dec->ps_cur_pic->i4_frame_num;
1398 ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1399
1400 /* Start from ST head */
1401 ps_next_dpb = ps_dpb_mgr->ps_dpb_st_head;
1402 for(i = 0; i < ps_dpb_mgr->u1_num_st_ref_bufs; i++)
1403 {
1404 WORD32 i4_pic_num;
1405
1406 i4_ref_frame_num = ps_next_dpb->ps_pic_buf->i4_frame_num;
1407 if(i4_ref_frame_num > i4_cur_frame_num)
1408 {
1409 /* RefPic Buf frame_num is before Current frame_num in decode order */
1410 i4_pic_num = i4_ref_frame_num - i4_max_frame_num;
1411 }
1412 else
1413 {
1414 /* RefPic Buf frame_num is after Current frame_num in decode order */
1415 i4_pic_num = i4_ref_frame_num;
1416 }
1417
1418 ps_next_dpb->ps_pic_buf->i4_pic_num = i4_pic_num;
1419 ps_next_dpb->i4_frame_num = i4_pic_num;
1420 ps_next_dpb->ps_pic_buf->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1421 if(u1_fld_pic_flag)
1422 {
1423 /* Assign the pic num to top fields and bot fields */
1424
1425 ps_next_dpb->s_top_field.i4_pic_num = i4_pic_num * 2
1426 + !(ps_dec->ps_cur_slice->u1_bottom_field_flag);
1427 ps_next_dpb->s_bot_field.i4_pic_num = i4_pic_num * 2
1428 + ps_dec->ps_cur_slice->u1_bottom_field_flag;
1429 }
1430 /* Chase the next link */
1431 ps_next_dpb = ps_next_dpb->ps_prev_short;
1432 }
1433
1434 if(ps_dec->ps_cur_sps->u1_gaps_in_frame_num_value_allowed_flag
1435 && ps_dpb_mgr->u1_num_gaps)
1436 {
1437 WORD32 i4_start_frm, i4_end_frm;
1438 /* Assign pic numbers for gaps */
1439 for(i = 0; i < MAX_FRAMES; i++)
1440 {
1441 i4_start_frm = ps_dpb_mgr->ai4_gaps_start_frm_num[i];
1442 if(i4_start_frm != INVALID_FRAME_NUM)
1443 {
1444 if(i4_start_frm > i4_cur_frame_num)
1445 {
1446 /* gap's frame_num is before Current frame_num in
1447 decode order */
1448 i4_start_frm -= i4_max_frame_num;
1449 }
1450 ps_dpb_mgr->ai4_gaps_start_frm_num[i] = i4_start_frm;
1451 i4_end_frm = ps_dpb_mgr->ai4_gaps_end_frm_num[i];
1452
1453 if(i4_end_frm > i4_cur_frame_num)
1454 {
1455 /* gap's frame_num is before Current frame_num in
1456 decode order */
1457 i4_end_frm -= i4_max_frame_num;
1458 }
1459 ps_dpb_mgr->ai4_gaps_end_frm_num[i] = i4_end_frm;
1460 }
1461 }
1462 }
1463 }
1464
1465 /*!
1466 **************************************************************************
1467 * \if Function name : ih264d_update_qp \endif
1468 *
1469 * \brief
1470 * Updates the values of QP and its related entities
1471 *
1472 * \return
1473 * 0 on Success and Error code otherwise
1474 *
1475 **************************************************************************
1476 */
ih264d_update_qp(dec_struct_t * ps_dec,const WORD8 i1_qp)1477 WORD32 ih264d_update_qp(dec_struct_t * ps_dec, const WORD8 i1_qp)
1478 {
1479 WORD32 i_temp;
1480 i_temp = (ps_dec->u1_qp + i1_qp + 52) % 52;
1481
1482 if((i_temp < 0) || (i_temp > 51) || (i1_qp < -26) || (i1_qp > 25))
1483 return ERROR_INV_RANGE_QP_T;
1484
1485 ps_dec->u1_qp = i_temp;
1486 ps_dec->u1_qp_y_rem6 = ps_dec->u1_qp % 6;
1487 ps_dec->u1_qp_y_div6 = ps_dec->u1_qp / 6;
1488 i_temp = CLIP3(0, 51, ps_dec->u1_qp + ps_dec->ps_cur_pps->i1_chroma_qp_index_offset);
1489 ps_dec->u1_qp_u_rem6 = MOD(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1490 ps_dec->u1_qp_u_div6 = DIV(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1491
1492 i_temp = CLIP3(0, 51, ps_dec->u1_qp + ps_dec->ps_cur_pps->i1_second_chroma_qp_index_offset);
1493 ps_dec->u1_qp_v_rem6 = MOD(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1494 ps_dec->u1_qp_v_div6 = DIV(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1495
1496 ps_dec->pu2_quant_scale_y =
1497 gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_y_rem6];
1498 ps_dec->pu2_quant_scale_u =
1499 gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_u_rem6];
1500 ps_dec->pu2_quant_scale_v =
1501 gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_v_rem6];
1502 return OK;
1503 }
1504
1505 /*****************************************************************************/
1506 /* */
1507 /* Function Name : ih264d_decode_gaps_in_frame_num */
1508 /* */
1509 /* Description : This function decodes gaps in frame number */
1510 /* */
1511 /* Inputs : ps_dec Decoder parameters */
1512 /* u2_frame_num current frame number */
1513 /* */
1514 /* Globals : None */
1515 /* Processing : This functionality needs to be implemented */
1516 /* Outputs : None */
1517 /* Returns : None */
1518 /* */
1519 /* Issues : Not implemented */
1520 /* */
1521 /* Revision History: */
1522 /* */
1523 /* DD MM YYYY Author(s) Changes (Describe the changes made) */
1524 /* 06 05 2002 NS Draft */
1525 /* */
1526 /*****************************************************************************/
ih264d_decode_gaps_in_frame_num(dec_struct_t * ps_dec,UWORD16 u2_frame_num)1527 WORD32 ih264d_decode_gaps_in_frame_num(dec_struct_t *ps_dec,
1528 UWORD16 u2_frame_num)
1529 {
1530 UWORD32 u4_next_frm_num, u4_start_frm_num;
1531 UWORD32 u4_max_frm_num;
1532 pocstruct_t s_tmp_poc;
1533 WORD32 i4_poc;
1534 dec_slice_params_t *ps_cur_slice;
1535
1536 dec_pic_params_t *ps_pic_params;
1537 WORD8 i1_gap_idx;
1538 WORD32 *i4_gaps_start_frm_num;
1539 dpb_manager_t *ps_dpb_mgr;
1540 WORD32 i4_frame_gaps;
1541 WORD8 *pi1_gaps_per_seq;
1542 WORD32 ret;
1543
1544 ps_cur_slice = ps_dec->ps_cur_slice;
1545 if(ps_cur_slice->u1_field_pic_flag)
1546 {
1547 if(ps_dec->u2_prev_ref_frame_num == u2_frame_num)
1548 return 0;
1549 }
1550
1551 u4_next_frm_num = ps_dec->u2_prev_ref_frame_num + 1;
1552 u4_max_frm_num = ps_dec->ps_cur_sps->u2_u4_max_pic_num_minus1 + 1;
1553
1554 // check
1555 if(u4_next_frm_num >= u4_max_frm_num)
1556 {
1557 u4_next_frm_num -= u4_max_frm_num;
1558 }
1559
1560 if(u4_next_frm_num == u2_frame_num)
1561 {
1562 return (0);
1563 }
1564
1565 // check
1566 if((ps_dec->u1_nal_unit_type == IDR_SLICE_NAL)
1567 && (u4_next_frm_num >= u2_frame_num))
1568 {
1569 return (0);
1570 }
1571 u4_start_frm_num = u4_next_frm_num;
1572
1573 s_tmp_poc.i4_pic_order_cnt_lsb = 0;
1574 s_tmp_poc.i4_delta_pic_order_cnt_bottom = 0;
1575 s_tmp_poc.i4_pic_order_cnt_lsb = 0;
1576 s_tmp_poc.i4_delta_pic_order_cnt_bottom = 0;
1577 s_tmp_poc.i4_delta_pic_order_cnt[0] = 0;
1578 s_tmp_poc.i4_delta_pic_order_cnt[1] = 0;
1579
1580 ps_cur_slice = ps_dec->ps_cur_slice;
1581 ps_pic_params = ps_dec->ps_cur_pps;
1582
1583 i4_frame_gaps = 0;
1584 ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1585
1586 /* Find a empty slot to store gap seqn info */
1587 i4_gaps_start_frm_num = ps_dpb_mgr->ai4_gaps_start_frm_num;
1588 for(i1_gap_idx = 0; i1_gap_idx < MAX_FRAMES; i1_gap_idx++)
1589 {
1590 if(INVALID_FRAME_NUM == i4_gaps_start_frm_num[i1_gap_idx])
1591 break;
1592 }
1593 if(MAX_FRAMES == i1_gap_idx)
1594 {
1595 UWORD32 i4_error_code;
1596 i4_error_code = ERROR_DBP_MANAGER_T;
1597 // i4_error_code |= 1<<IVD_CORRUPTEDDATA;
1598 return i4_error_code;
1599 }
1600
1601 i4_poc = 0;
1602 i4_gaps_start_frm_num[i1_gap_idx] = u4_start_frm_num;
1603 ps_dpb_mgr->ai4_gaps_end_frm_num[i1_gap_idx] = u2_frame_num - 1;
1604 pi1_gaps_per_seq = ps_dpb_mgr->ai1_gaps_per_seq;
1605 pi1_gaps_per_seq[i1_gap_idx] = 0;
1606 while(u4_next_frm_num != u2_frame_num)
1607 {
1608 ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1609 if(ps_pic_params->ps_sps->u1_pic_order_cnt_type)
1610 {
1611 /* allocate a picture buffer and insert it as ST node */
1612 ret = ih264d_decode_pic_order_cnt(0, u4_next_frm_num,
1613 &ps_dec->s_prev_pic_poc,
1614 &s_tmp_poc, ps_cur_slice,
1615 ps_pic_params, 1, 0, 0,
1616 &i4_poc);
1617 if(ret != OK)
1618 return ret;
1619
1620 /* Display seq no calculations */
1621 if(i4_poc >= ps_dec->i4_max_poc)
1622 ps_dec->i4_max_poc = i4_poc;
1623 /* IDR Picture or POC wrap around */
1624 if(i4_poc == 0)
1625 {
1626 UWORD64 u8_temp;
1627 u8_temp = (UWORD64)ps_dec->i4_prev_max_display_seq
1628 + ps_dec->i4_max_poc
1629 + ps_dec->u1_max_dec_frame_buffering + 1;
1630 /*If i4_prev_max_display_seq overflows integer range, reset it */
1631 ps_dec->i4_prev_max_display_seq = (u8_temp > 0x7fffffff)?
1632 0 : u8_temp;
1633 ps_dec->i4_max_poc = 0;
1634 }
1635
1636 ps_cur_slice->u1_mmco_equalto5 = 0;
1637 ps_cur_slice->u2_frame_num = u4_next_frm_num;
1638 }
1639
1640 // check
1641 if(ps_dpb_mgr->i1_poc_buf_id_entries
1642 >= ps_dec->u1_max_dec_frame_buffering)
1643 {
1644 ret = ih264d_assign_display_seq(ps_dec);
1645 if(ret != OK)
1646 return ret;
1647 }
1648
1649 {
1650 UWORD64 i8_display_poc;
1651 i8_display_poc = (UWORD64)ps_dec->i4_prev_max_display_seq +
1652 i4_poc;
1653 if(IS_OUT_OF_RANGE_S32(i8_display_poc))
1654 {
1655 ps_dec->i4_prev_max_display_seq = 0;
1656 }
1657 }
1658 ret = ih264d_insert_pic_in_display_list(
1659 ps_dec->ps_dpb_mgr, (WORD8) DO_NOT_DISP,
1660 (WORD32)(ps_dec->i4_prev_max_display_seq + i4_poc),
1661 u4_next_frm_num);
1662 if(ret != OK)
1663 return ret;
1664
1665 pi1_gaps_per_seq[i1_gap_idx]++;
1666 ret = ih264d_do_mmco_for_gaps(ps_dpb_mgr,
1667 ps_dec->ps_cur_sps->u1_num_ref_frames);
1668 if(ret != OK)
1669 return ret;
1670
1671 ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1672
1673 u4_next_frm_num++;
1674 if(u4_next_frm_num >= u4_max_frm_num)
1675 {
1676 u4_next_frm_num -= u4_max_frm_num;
1677 }
1678
1679 i4_frame_gaps++;
1680 }
1681
1682 return OK;
1683 }
1684
1685 /*!
1686 **************************************************************************
1687 * \if Function name : ih264d_create_pic_buffers \endif
1688 *
1689 * \brief
1690 * This function creates Picture Buffers.
1691 *
1692 * \return
1693 * 0 on Success and -1 on error
1694 **************************************************************************
1695 */
ih264d_create_pic_buffers(UWORD8 u1_num_of_buf,dec_struct_t * ps_dec)1696 WORD32 ih264d_create_pic_buffers(UWORD8 u1_num_of_buf,
1697 dec_struct_t *ps_dec)
1698 {
1699 struct pic_buffer_t *ps_pic_buf;
1700 UWORD8 i;
1701 UWORD32 u4_luma_size, u4_chroma_size;
1702 UWORD8 u1_frm = ps_dec->ps_cur_sps->u1_frame_mbs_only_flag;
1703 WORD32 j;
1704 UWORD8 *pu1_buf;
1705
1706 ps_pic_buf = ps_dec->ps_pic_buf_base;
1707 ih264_disp_mgr_init((disp_mgr_t *)ps_dec->pv_disp_buf_mgr);
1708 ih264_buf_mgr_init((buf_mgr_t *)ps_dec->pv_pic_buf_mgr);
1709 u4_luma_size = ps_dec->u2_frm_wd_y * ps_dec->u2_frm_ht_y;
1710 u4_chroma_size = ps_dec->u2_frm_wd_uv * ps_dec->u2_frm_ht_uv;
1711
1712 {
1713 if(ps_dec->u4_share_disp_buf == 1)
1714 {
1715 /* In case of buffers getting shared between application and library
1716 there is no need of reference memtabs. Instead of setting the i4_size
1717 to zero, it is reduced to a small i4_size to ensure that changes
1718 in the code are minimal */
1719 if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
1720 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU)
1721 || (ps_dec->u1_chroma_format == IV_YUV_420P))
1722 {
1723 u4_luma_size = 64;
1724 }
1725
1726 if(ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
1727 {
1728 u4_chroma_size = 64;
1729 }
1730
1731 }
1732 }
1733
1734 pu1_buf = ps_dec->pu1_pic_buf_base;
1735
1736 /* Allocate memory for refernce buffers */
1737 for(i = 0; i < u1_num_of_buf; i++)
1738 {
1739 UWORD32 u4_offset;
1740 WORD32 buf_ret;
1741 UWORD8 *pu1_luma, *pu1_chroma;
1742 void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1743
1744 pu1_luma = pu1_buf;
1745 pu1_buf += ALIGN64(u4_luma_size);
1746 pu1_chroma = pu1_buf;
1747 pu1_buf += ALIGN64(u4_chroma_size);
1748
1749 /* Offset to the start of the pic from the top left corner of the frame
1750 buffer */
1751
1752 if((0 == ps_dec->u4_share_disp_buf)
1753 || (NULL == ps_dec->disp_bufs[i].buf[0]))
1754 {
1755 UWORD32 pad_len_h, pad_len_v;
1756
1757 u4_offset = ps_dec->u2_frm_wd_y * (PAD_LEN_Y_V << 1) + PAD_LEN_Y_H;
1758 ps_pic_buf->pu1_buf1 = (UWORD8 *)(pu1_luma) + u4_offset;
1759
1760 pad_len_h = MAX(PAD_LEN_UV_H, (PAD_LEN_Y_H >> 1));
1761 pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1762
1763 u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1764
1765 ps_pic_buf->pu1_buf2 = (UWORD8 *)(pu1_chroma) + u4_offset;
1766 ps_pic_buf->pu1_buf3 = (UWORD8 *)(NULL) + u4_offset;
1767
1768 }
1769 else
1770 {
1771 UWORD32 pad_len_h, pad_len_v;
1772 u4_offset = ps_dec->u2_frm_wd_y * (PAD_LEN_Y_V << 1) + PAD_LEN_Y_H;
1773 ps_pic_buf->pu1_buf1 = (UWORD8 *)ps_dec->disp_bufs[i].buf[0]
1774 + u4_offset;
1775
1776 ps_dec->disp_bufs[i].u4_ofst[0] = u4_offset;
1777
1778 if(ps_dec->u1_chroma_format == IV_YUV_420P)
1779 {
1780 pad_len_h = MAX(PAD_LEN_UV_H * YUV420SP_FACTOR,
1781 (PAD_LEN_Y_H >> 1));
1782 pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1783
1784 u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1785 ps_pic_buf->pu1_buf2 = (UWORD8 *)(pu1_chroma) + u4_offset;
1786 ps_pic_buf->pu1_buf3 = (UWORD8 *)(NULL) + u4_offset;
1787
1788 ps_dec->disp_bufs[i].u4_ofst[1] = u4_offset;
1789 ps_dec->disp_bufs[i].u4_ofst[2] = u4_offset;
1790
1791 }
1792 else
1793 {
1794 pad_len_h = MAX(PAD_LEN_UV_H * YUV420SP_FACTOR,
1795 (PAD_LEN_Y_H >> 1));
1796 pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1797
1798 u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1799 ps_pic_buf->pu1_buf2 = (UWORD8 *)(ps_dec->disp_bufs[i].buf[1])
1800 + u4_offset;
1801 ps_pic_buf->pu1_buf3 = (UWORD8 *)(ps_dec->disp_bufs[i].buf[1])
1802 + u4_offset;
1803
1804 ps_dec->disp_bufs[i].u4_ofst[1] = u4_offset;
1805 ps_dec->disp_bufs[i].u4_ofst[2] = u4_offset;
1806 }
1807 }
1808
1809 ps_pic_buf->u2_frm_ht_y = ps_dec->u2_frm_ht_y;
1810 ps_pic_buf->u2_frm_ht_uv = ps_dec->u2_frm_ht_uv;
1811 ps_pic_buf->u2_frm_wd_y = ps_dec->u2_frm_wd_y;
1812 ps_pic_buf->u2_frm_wd_uv = ps_dec->u2_frm_wd_uv;
1813
1814 ps_pic_buf->u1_pic_buf_id = i;
1815
1816 buf_ret = ih264_buf_mgr_add((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1817 ps_pic_buf, i);
1818 if(0 != buf_ret)
1819 {
1820 ps_dec->i4_error_code = ERROR_BUF_MGR;
1821 return ERROR_BUF_MGR;
1822 }
1823
1824 ps_dec->apv_buf_id_pic_buf_map[i] = (void *)ps_pic_buf;
1825 ps_pic_buf++;
1826 }
1827
1828 if(1 == ps_dec->u4_share_disp_buf)
1829 {
1830 for(i = 0; i < u1_num_of_buf; i++)
1831 ps_dec->u4_disp_buf_mapping[i] = 1;
1832 }
1833 return OK;
1834 }
1835
1836 /*!
1837 **************************************************************************
1838 * \if Function name : ih264d_allocate_dynamic_bufs \endif
1839 *
1840 * \brief
1841 * This function allocates memory required by Decoder.
1842 *
1843 * \param ps_dec: Pointer to dec_struct_t.
1844 *
1845 * \return
1846 * Returns i4_status as returned by MemManager.
1847 *
1848 **************************************************************************
1849 */
ih264d_allocate_dynamic_bufs(dec_struct_t * ps_dec)1850 WORD16 ih264d_allocate_dynamic_bufs(dec_struct_t * ps_dec)
1851 {
1852 struct MemReq s_MemReq;
1853 struct MemBlock *p_MemBlock;
1854
1855 pred_info_t *ps_pred_frame;
1856 dec_mb_info_t *ps_frm_mb_info;
1857 dec_slice_struct_t *ps_dec_slice_buf;
1858 UWORD8 *pu1_dec_mb_map, *pu1_recon_mb_map;
1859 UWORD16 *pu2_slice_num_map;
1860
1861 WORD16 *pi16_res_coeff;
1862 WORD16 i16_status = 0;
1863 UWORD8 uc_frmOrFld = (1 - ps_dec->ps_cur_sps->u1_frame_mbs_only_flag);
1864 UWORD16 u4_luma_wd = ps_dec->u2_frm_wd_y;
1865 UWORD16 u4_chroma_wd = ps_dec->u2_frm_wd_uv;
1866 WORD8 c_i = 0;
1867 dec_seq_params_t *ps_sps = ps_dec->ps_cur_sps;
1868 UWORD32 u4_total_mbs = ps_sps->u2_total_num_of_mbs << uc_frmOrFld;
1869 UWORD32 u4_wd_mbs = ps_dec->u2_frm_wd_in_mbs;
1870 UWORD32 u4_ht_mbs = ps_dec->u2_frm_ht_in_mbs;
1871 UWORD32 u4_blk_wd;
1872 UWORD32 ui_size = 0;
1873 UWORD32 u4_int_scratch_size = 0, u4_ref_pred_size = 0;
1874 UWORD8 *pu1_buf;
1875 WORD32 num_entries;
1876 WORD32 size;
1877 void *pv_buf;
1878 UWORD32 u4_num_bufs;
1879 UWORD32 u4_luma_size, u4_chroma_size;
1880 void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1881
1882 size = u4_total_mbs;
1883 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1884 RETURN_IF((NULL == pv_buf), IV_FAIL);
1885 memset(pv_buf, 0, size);
1886 ps_dec->pu1_dec_mb_map = pv_buf;
1887
1888 size = u4_total_mbs;
1889 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1890 RETURN_IF((NULL == pv_buf), IV_FAIL);
1891 memset(pv_buf, 0, size);
1892 ps_dec->pu1_recon_mb_map = pv_buf;
1893
1894 size = u4_total_mbs * sizeof(UWORD16);
1895 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1896 RETURN_IF((NULL == pv_buf), IV_FAIL);
1897 memset(pv_buf, 0, size);
1898 ps_dec->pu2_slice_num_map = pv_buf;
1899
1900 /************************************************************/
1901 /* Post allocation Initialisations */
1902 /************************************************************/
1903 ps_dec->ps_parse_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1904 ps_dec->ps_decode_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1905 ps_dec->ps_computebs_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1906
1907 ps_dec->ps_pred_start = ps_dec->ps_pred;
1908
1909 size = sizeof(parse_pmbarams_t) * (ps_dec->u1_recon_mb_grp);
1910 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1911 RETURN_IF((NULL == pv_buf), IV_FAIL);
1912 memset(pv_buf, 0, size);
1913 ps_dec->ps_parse_mb_data = pv_buf;
1914
1915 size = sizeof(parse_part_params_t)
1916 * ((ps_dec->u1_recon_mb_grp) << 4);
1917 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1918 RETURN_IF((NULL == pv_buf), IV_FAIL);
1919 memset(pv_buf, 0, size);
1920 ps_dec->ps_parse_part_params = pv_buf;
1921
1922 size = ((u4_wd_mbs * sizeof(deblkmb_neighbour_t)) << uc_frmOrFld);
1923 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1924 RETURN_IF((NULL == pv_buf), IV_FAIL);
1925 memset(pv_buf, 0, size);
1926 ps_dec->ps_deblk_top_mb = pv_buf;
1927
1928 size = ((sizeof(ctxt_inc_mb_info_t))
1929 * (((u4_wd_mbs + 1) << uc_frmOrFld) + 1));
1930 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1931 RETURN_IF((NULL == pv_buf), IV_FAIL);
1932 memset(pv_buf, 0, size);
1933 ps_dec->p_ctxt_inc_mb_map = pv_buf;
1934
1935 /* 0th entry of CtxtIncMbMap will be always be containing default values
1936 for CABAC context representing MB not available */
1937 ps_dec->p_ctxt_inc_mb_map += 1;
1938
1939 size = (sizeof(mv_pred_t) * ps_dec->u1_recon_mb_grp
1940 * 16);
1941 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1942 RETURN_IF((NULL == pv_buf), IV_FAIL);
1943 memset(pv_buf, 0, size);
1944 ps_dec->ps_mv_p[0] = pv_buf;
1945
1946 size = (sizeof(mv_pred_t) * ps_dec->u1_recon_mb_grp
1947 * 16);
1948 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1949 RETURN_IF((NULL == pv_buf), IV_FAIL);
1950 memset(pv_buf, 0, size);
1951 ps_dec->ps_mv_p[1] = pv_buf;
1952
1953 {
1954 UWORD8 i;
1955 for(i = 0; i < MV_SCRATCH_BUFS; i++)
1956 {
1957 size = (sizeof(mv_pred_t)
1958 * ps_dec->u1_recon_mb_grp * 4);
1959 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1960 RETURN_IF((NULL == pv_buf), IV_FAIL);
1961 memset(pv_buf, 0, size);
1962 ps_dec->ps_mv_top_p[i] = pv_buf;
1963 }
1964 }
1965
1966 size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
1967 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1968 RETURN_IF((NULL == pv_buf), IV_FAIL);
1969 ps_dec->pu1_y_intra_pred_line = pv_buf;
1970 memset(ps_dec->pu1_y_intra_pred_line, 0, size);
1971 ps_dec->pu1_y_intra_pred_line += MB_SIZE;
1972
1973 size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
1974 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1975 RETURN_IF((NULL == pv_buf), IV_FAIL);
1976 ps_dec->pu1_u_intra_pred_line = pv_buf;
1977 memset(ps_dec->pu1_u_intra_pred_line, 0, size);
1978 ps_dec->pu1_u_intra_pred_line += MB_SIZE;
1979
1980 size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
1981 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1982 RETURN_IF((NULL == pv_buf), IV_FAIL);
1983 ps_dec->pu1_v_intra_pred_line = pv_buf;
1984 memset(ps_dec->pu1_v_intra_pred_line, 0, size);
1985 ps_dec->pu1_v_intra_pred_line += MB_SIZE;
1986
1987 if(ps_dec->u1_separate_parse)
1988 {
1989 /* Needs one extra row of info, to hold top row data */
1990 size = sizeof(mb_neigbour_params_t)
1991 * 2 * ((u4_wd_mbs + 2) * (u4_ht_mbs + 1));
1992 }
1993 else
1994 {
1995 size = sizeof(mb_neigbour_params_t)
1996 * 2 * ((u4_wd_mbs + 2) << uc_frmOrFld);
1997 }
1998 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1999 RETURN_IF((NULL == pv_buf), IV_FAIL);
2000
2001 ps_dec->ps_nbr_mb_row = pv_buf;
2002 memset(ps_dec->ps_nbr_mb_row, 0, size);
2003
2004 /* Allocate deblock MB info */
2005 size = (u4_total_mbs + u4_wd_mbs) * sizeof(deblk_mb_t);
2006
2007 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2008 RETURN_IF((NULL == pv_buf), IV_FAIL);
2009 ps_dec->ps_deblk_pic = pv_buf;
2010
2011 memset(ps_dec->ps_deblk_pic, 0, size);
2012
2013 /* Allocate frame level mb info */
2014 size = sizeof(dec_mb_info_t) * u4_total_mbs;
2015 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2016 RETURN_IF((NULL == pv_buf), IV_FAIL);
2017 ps_dec->ps_frm_mb_info = pv_buf;
2018 memset(ps_dec->ps_frm_mb_info, 0, size);
2019
2020 /* Allocate memory for slice headers dec_slice_struct_t */
2021 num_entries = MAX_FRAMES;
2022 if((1 >= ps_dec->ps_cur_sps->u1_num_ref_frames) &&
2023 (0 == ps_dec->i4_display_delay))
2024 {
2025 num_entries = 1;
2026 }
2027 num_entries = ((2 * num_entries) + 1);
2028 num_entries *= 2;
2029
2030 size = num_entries * sizeof(void *);
2031 size += PAD_MAP_IDX_POC * sizeof(void *);
2032 size *= u4_total_mbs;
2033 size += sizeof(dec_slice_struct_t) * u4_total_mbs;
2034 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2035 RETURN_IF((NULL == pv_buf), IV_FAIL);
2036
2037 ps_dec->ps_dec_slice_buf = pv_buf;
2038 memset(ps_dec->ps_dec_slice_buf, 0, size);
2039 pu1_buf = (UWORD8 *)ps_dec->ps_dec_slice_buf;
2040 pu1_buf += sizeof(dec_slice_struct_t) * u4_total_mbs;
2041 ps_dec->pv_map_ref_idx_to_poc_buf = (void *)pu1_buf;
2042
2043 /* Allocate memory for packed pred info */
2044 num_entries = u4_total_mbs;
2045 num_entries *= 16 * 2;
2046
2047 size = sizeof(pred_info_pkd_t) * num_entries;
2048 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2049 RETURN_IF((NULL == pv_buf), IV_FAIL);
2050 memset(pv_buf, 0, size);
2051 ps_dec->ps_pred_pkd = pv_buf;
2052
2053 /* Allocate memory for coeff data */
2054 size = MB_LUM_SIZE * sizeof(WORD16);
2055 /*For I16x16 MBs, 16 4x4 AC coeffs and 1 4x4 DC coeff TU blocks will be sent
2056 For all MBs along with 8 4x4 AC coeffs 2 2x2 DC coeff TU blocks will be sent
2057 So use 17 4x4 TU blocks for luma and 9 4x4 TU blocks for chroma */
2058 size += u4_total_mbs * (MAX(17 * sizeof(tu_sblk4x4_coeff_data_t),4 * sizeof(tu_blk8x8_coeff_data_t))
2059 + 9 * sizeof(tu_sblk4x4_coeff_data_t));
2060 //32 bytes for each mb to store u1_prev_intra4x4_pred_mode and u1_rem_intra4x4_pred_mode data
2061 size += u4_total_mbs * 32;
2062 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2063 RETURN_IF((NULL == pv_buf), IV_FAIL);
2064 memset(pv_buf, 0, size);
2065
2066 ps_dec->pi2_coeff_data = pv_buf;
2067
2068 ps_dec->pv_pic_tu_coeff_data = (void *)(ps_dec->pi2_coeff_data + MB_LUM_SIZE);
2069
2070 /* Allocate MV bank buffer */
2071 {
2072 UWORD32 col_flag_buffer_size, mvpred_buffer_size;
2073
2074 col_flag_buffer_size = ((ps_dec->u2_pic_wd * ps_dec->u2_pic_ht) >> 4);
2075 mvpred_buffer_size = sizeof(mv_pred_t)
2076 * ((ps_dec->u2_pic_wd * (ps_dec->u2_pic_ht + PAD_MV_BANK_ROW)) >> 4);
2077
2078 u4_num_bufs = ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
2079
2080 u4_num_bufs = MIN(u4_num_bufs, ps_dec->u1_pic_bufs);
2081 u4_num_bufs = MAX(u4_num_bufs, 2);
2082 size = ALIGN64(mvpred_buffer_size) + ALIGN64(col_flag_buffer_size);
2083 size *= u4_num_bufs;
2084 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2085 RETURN_IF((NULL == pv_buf), IV_FAIL);
2086 memset(pv_buf, 0, size);
2087 ps_dec->pu1_mv_bank_buf_base = pv_buf;
2088 }
2089
2090 /* Allocate Pic buffer */
2091 u4_luma_size = ps_dec->u2_frm_wd_y * ps_dec->u2_frm_ht_y;
2092 u4_chroma_size = ps_dec->u2_frm_wd_uv * ps_dec->u2_frm_ht_uv;
2093
2094 {
2095 if(ps_dec->u4_share_disp_buf == 1)
2096 {
2097 /* In case of buffers getting shared between application and library
2098 there is no need of reference memtabs. Instead of setting the i4_size
2099 to zero, it is reduced to a small i4_size to ensure that changes
2100 in the code are minimal */
2101 if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2102 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU)
2103 || (ps_dec->u1_chroma_format == IV_YUV_420P))
2104 {
2105 u4_luma_size = 64;
2106 }
2107
2108 if(ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2109 {
2110 u4_chroma_size = 64;
2111 }
2112
2113 }
2114 }
2115
2116 size = ALIGN64(u4_luma_size) + ALIGN64(u4_chroma_size);
2117 size *= ps_dec->u1_pic_bufs;
2118 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2119 RETURN_IF((NULL == pv_buf), IV_FAIL);
2120 memset(pv_buf, 0, size);
2121 ps_dec->pu1_pic_buf_base = pv_buf;
2122
2123 /* Post allocation Increment Actions */
2124
2125 /***************************************************************************/
2126 /*Initialize cabac context pointers for every SE that has fixed contextIdx */
2127 /***************************************************************************/
2128 {
2129 bin_ctxt_model_t * const p_cabac_ctxt_table_t =
2130 ps_dec->p_cabac_ctxt_table_t;
2131 bin_ctxt_model_t * * p_coeff_abs_level_minus1_t =
2132 ps_dec->p_coeff_abs_level_minus1_t;
2133 bin_ctxt_model_t * * p_cbf_t = ps_dec->p_cbf_t;
2134
2135 ps_dec->p_mb_field_dec_flag_t = p_cabac_ctxt_table_t
2136 + MB_FIELD_DECODING_FLAG;
2137 ps_dec->p_prev_intra4x4_pred_mode_flag_t = p_cabac_ctxt_table_t
2138 + PREV_INTRA4X4_PRED_MODE_FLAG;
2139 ps_dec->p_rem_intra4x4_pred_mode_t = p_cabac_ctxt_table_t
2140 + REM_INTRA4X4_PRED_MODE;
2141 ps_dec->p_intra_chroma_pred_mode_t = p_cabac_ctxt_table_t
2142 + INTRA_CHROMA_PRED_MODE;
2143 ps_dec->p_mb_qp_delta_t = p_cabac_ctxt_table_t + MB_QP_DELTA;
2144 ps_dec->p_ref_idx_t = p_cabac_ctxt_table_t + REF_IDX;
2145 ps_dec->p_mvd_x_t = p_cabac_ctxt_table_t + MVD_X;
2146 ps_dec->p_mvd_y_t = p_cabac_ctxt_table_t + MVD_Y;
2147 p_cbf_t[0] = p_cabac_ctxt_table_t + CBF + 0;
2148 p_cbf_t[1] = p_cabac_ctxt_table_t + CBF + 4;
2149 p_cbf_t[2] = p_cabac_ctxt_table_t + CBF + 8;
2150 p_cbf_t[3] = p_cabac_ctxt_table_t + CBF + 12;
2151 p_cbf_t[4] = p_cabac_ctxt_table_t + CBF + 16;
2152 ps_dec->p_cbp_luma_t = p_cabac_ctxt_table_t + CBP_LUMA;
2153 ps_dec->p_cbp_chroma_t = p_cabac_ctxt_table_t + CBP_CHROMA;
2154
2155 p_coeff_abs_level_minus1_t[LUMA_DC_CTXCAT] = p_cabac_ctxt_table_t
2156 + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_0_OFFSET;
2157
2158 p_coeff_abs_level_minus1_t[LUMA_AC_CTXCAT] = p_cabac_ctxt_table_t
2159 + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_1_OFFSET;
2160
2161 p_coeff_abs_level_minus1_t[LUMA_4X4_CTXCAT] = p_cabac_ctxt_table_t
2162 + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_2_OFFSET;
2163
2164 p_coeff_abs_level_minus1_t[CHROMA_DC_CTXCAT] = p_cabac_ctxt_table_t
2165 + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_3_OFFSET;
2166
2167 p_coeff_abs_level_minus1_t[CHROMA_AC_CTXCAT] = p_cabac_ctxt_table_t
2168 + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_4_OFFSET;
2169
2170 p_coeff_abs_level_minus1_t[LUMA_8X8_CTXCAT] = p_cabac_ctxt_table_t
2171 + COEFF_ABS_LEVEL_MINUS1_8X8
2172 + COEFF_ABS_LEVEL_CAT_5_OFFSET;
2173
2174 /********************************************************/
2175 /* context for the high profile related syntax elements */
2176 /* This is maintained seperately in s_high_profile */
2177 /********************************************************/
2178 {
2179
2180 ps_dec->s_high_profile.ps_transform8x8_flag = p_cabac_ctxt_table_t
2181 + TRANSFORM_SIZE_8X8_FLAG;
2182
2183 ps_dec->s_high_profile.ps_sigcoeff_8x8_frame = p_cabac_ctxt_table_t
2184 + SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
2185
2186 ps_dec->s_high_profile.ps_last_sigcoeff_8x8_frame =
2187 p_cabac_ctxt_table_t
2188 + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
2189
2190 ps_dec->s_high_profile.ps_coeff_abs_levelminus1 =
2191 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8;
2192
2193 ps_dec->s_high_profile.ps_sigcoeff_8x8_field = p_cabac_ctxt_table_t
2194 + SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
2195
2196 ps_dec->s_high_profile.ps_last_sigcoeff_8x8_field =
2197 p_cabac_ctxt_table_t
2198 + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
2199 }
2200 }
2201 return (i16_status);
2202 }
2203
2204 /*!
2205 **************************************************************************
2206 * \if Function name : ih264d_free_dynamic_bufs \endif
2207 *
2208 * \brief
2209 * This function frees dynamic memory allocated by Decoder.
2210 *
2211 * \param ps_dec: Pointer to dec_struct_t.
2212 *
2213 * \return
2214 * Returns i4_status as returned by MemManager.
2215 *
2216 **************************************************************************
2217 */
ih264d_free_dynamic_bufs(dec_struct_t * ps_dec)2218 WORD16 ih264d_free_dynamic_bufs(dec_struct_t * ps_dec)
2219 {
2220 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_bits_buf_dynamic);
2221
2222 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_deblk_pic);
2223 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_dec_mb_map);
2224 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_recon_mb_map);
2225 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu2_slice_num_map);
2226 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dec_slice_buf);
2227 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_frm_mb_info);
2228 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pi2_coeff_data);
2229 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_parse_mb_data);
2230 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_parse_part_params);
2231 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_deblk_top_mb);
2232
2233 if(ps_dec->p_ctxt_inc_mb_map)
2234 {
2235 ps_dec->p_ctxt_inc_mb_map -= 1;
2236 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->p_ctxt_inc_mb_map);
2237 }
2238
2239 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_p[0]);
2240 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_p[1]);
2241 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pred_pkd);
2242 {
2243 UWORD8 i;
2244 for(i = 0; i < MV_SCRATCH_BUFS; i++)
2245 {
2246 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_top_p[i]);
2247 }
2248 }
2249
2250 if(ps_dec->pu1_y_intra_pred_line)
2251 {
2252 ps_dec->pu1_y_intra_pred_line -= MB_SIZE;
2253 }
2254 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_y_intra_pred_line);
2255
2256 if(ps_dec->pu1_u_intra_pred_line)
2257 {
2258 ps_dec->pu1_u_intra_pred_line -= MB_SIZE;
2259 }
2260 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_u_intra_pred_line);
2261
2262 if(ps_dec->pu1_v_intra_pred_line)
2263 {
2264 ps_dec->pu1_v_intra_pred_line -= MB_SIZE;
2265 }
2266 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_v_intra_pred_line);
2267 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_nbr_mb_row);
2268 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_mv_bank_buf_base);
2269 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_pic_buf_base);
2270 return 0;
2271 }
2272
2273 /*!
2274 **************************************************************************
2275 * \if Function name : ih264d_create_mv_bank \endif
2276 *
2277 * \brief
2278 * This function creates MV bank.
2279 *
2280 * \param memType : Type of memory being handled
2281 * 0: Display Buffer
2282 * 1: Decoder Buffer
2283 * 2: Internal Buffer
2284 * \param u1_num_of_buf: Number of decode or display buffers.
2285 * \param u4_wd : Frame width.
2286 * \param u4_ht : Frame Height.
2287 * \param ps_pic_buf_api : Pointer to Picture Buffer API.
2288 * \param ih264d_dec_mem_manager : Memory manager utility supplied by system.
2289 *
2290 * \return
2291 * 0 on Success and -1 on error
2292 *
2293 **************************************************************************
2294 */
ih264d_create_mv_bank(void * pv_dec,UWORD32 ui_width,UWORD32 ui_height)2295 WORD32 ih264d_create_mv_bank(void *pv_dec,
2296 UWORD32 ui_width,
2297 UWORD32 ui_height)
2298 {
2299 UWORD8 i;
2300 UWORD32 col_flag_buffer_size, mvpred_buffer_size;
2301 UWORD8 *pu1_mv_buf_mgr_base, *pu1_mv_bank_base;
2302 col_mv_buf_t *ps_col_mv;
2303 mv_pred_t *ps_mv;
2304 UWORD8 *pu1_col_zero_flag_buf;
2305 dec_struct_t *ps_dec = (dec_struct_t *)pv_dec;
2306 WORD32 buf_ret;
2307 UWORD32 u4_num_bufs;
2308 UWORD8 *pu1_buf;
2309 WORD32 size;
2310 void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
2311
2312 col_flag_buffer_size = ((ui_width * ui_height) >> 4);
2313 mvpred_buffer_size = sizeof(mv_pred_t)
2314 * ((ui_width * (ui_height + PAD_MV_BANK_ROW)) >> 4);
2315
2316 ih264_buf_mgr_init((buf_mgr_t *)ps_dec->pv_mv_buf_mgr);
2317
2318 ps_col_mv = ps_dec->ps_col_mv_base;
2319
2320 u4_num_bufs = ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
2321
2322 u4_num_bufs = MIN(u4_num_bufs, ps_dec->u1_pic_bufs);
2323 u4_num_bufs = MAX(u4_num_bufs, 2);
2324 pu1_buf = ps_dec->pu1_mv_bank_buf_base;
2325 for(i = 0 ; i < u4_num_bufs ; i++)
2326 {
2327 pu1_col_zero_flag_buf = pu1_buf;
2328 pu1_buf += ALIGN64(col_flag_buffer_size);
2329
2330 ps_mv = (mv_pred_t *)pu1_buf;
2331 pu1_buf += ALIGN64(mvpred_buffer_size);
2332
2333 memset(ps_mv, 0, ((ui_width * OFFSET_MV_BANK_ROW) >> 4) * sizeof(mv_pred_t));
2334 ps_mv += (ui_width*OFFSET_MV_BANK_ROW) >> 4;
2335
2336 ps_col_mv->pv_col_zero_flag = (void *)pu1_col_zero_flag_buf;
2337 ps_col_mv->pv_mv = (void *)ps_mv;
2338 buf_ret = ih264_buf_mgr_add((buf_mgr_t *)ps_dec->pv_mv_buf_mgr, ps_col_mv, i);
2339 if(0 != buf_ret)
2340 {
2341 ps_dec->i4_error_code = ERROR_BUF_MGR;
2342 return ERROR_BUF_MGR;
2343 }
2344 ps_col_mv++;
2345 }
2346 return OK;
2347 }
2348
ih264d_unpack_coeff4x4_dc_4x4blk(tu_sblk4x4_coeff_data_t * ps_tu_4x4,WORD16 * pi2_out_coeff_data,UWORD8 * pu1_inv_scan)2349 void ih264d_unpack_coeff4x4_dc_4x4blk(tu_sblk4x4_coeff_data_t *ps_tu_4x4,
2350 WORD16 *pi2_out_coeff_data,
2351 UWORD8 *pu1_inv_scan)
2352 {
2353 UWORD16 u2_sig_coeff_map = ps_tu_4x4->u2_sig_coeff_map;
2354 WORD32 idx;
2355 WORD16 *pi2_coeff_data = &ps_tu_4x4->ai2_level[0];
2356
2357 while(u2_sig_coeff_map)
2358 {
2359 idx = CLZ(u2_sig_coeff_map);
2360
2361 idx = 31 - idx;
2362 RESET_BIT(u2_sig_coeff_map,idx);
2363
2364 idx = pu1_inv_scan[idx];
2365 pi2_out_coeff_data[idx] = *pi2_coeff_data++;
2366
2367 }
2368 }
2369