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Searched defs:instr1 (Results 1 – 20 of 20) sorted by relevance

/external/tensorflow/tensorflow/compiler/xla/service/
Dmulti_output_fusion.cc132 HloInstruction* MultiOutputFusion::Fuse(HloInstruction* instr1, in Fuse()
193 MultiOutputFusion::GetNewFusibles(HloInstruction* instr1, in GetNewFusibles()
240 void MultiOutputFusion::UpdateBeforeFuse(HloInstruction* instr1, in UpdateBeforeFuse()
292 bool MultiOutputFusion::LegalToFuse(HloInstruction* instr1, in LegalToFuse()
300 bool MultiOutputFusion::LegalToFuseMainConstraints(HloInstruction* instr1, in LegalToFuseMainConstraints()
346 HloInstruction* instr1, HloInstruction* instr2, in UpdateReachability()
374 HloInstruction* instr1 = candidate.instr1; in Perform() local
Dmulti_output_fusion.h136 HloInstruction* instr1; member
167 bool is_connected(HloInstruction* instr1, HloInstruction* instr2) { in is_connected()
Dhlo_verifier.cc1272 Status CheckSameChannel(const HloInstruction* instr1, in CheckSameChannel()
1287 Status CheckSameIsHostTransfer(const HloInstruction* instr1, in CheckSameIsHostTransfer()
Dhlo_instruction_test.cc1771 auto instr1 = HloInstruction::CreateCustomCall(ShapeUtil::MakeShape(F32, {}), in TEST_F() local
1783 auto instr1 = HloInstruction::CreateCustomCall(ShapeUtil::MakeShape(F32, {}), in TEST_F() local
1796 auto instr1 = HloInstruction::CreateCustomCall(ShapeUtil::MakeShape(F32, {}), in TEST_F() local
/external/tensorflow/tensorflow/compiler/xla/service/gpu/
Dmulti_output_fusion.cc40 bool GpuMultiOutputFusion::ShapesCompatibleForFusion(HloInstruction* instr1, in ShapesCompatibleForFusion()
49 int64 GpuMultiOutputFusion::GetProfit(HloInstruction* instr1, in GetProfit()
68 bool GpuMultiOutputFusion::LegalToFuse(HloInstruction* instr1, in LegalToFuse()
Dgpu_fusible.cc117 bool ShapesCompatibleForMultiOutputFusion(const HloInstruction& instr1, in ShapesCompatibleForMultiOutputFusion()
298 bool FusionWouldBeTooLarge(const HloInstruction& instr1, in FusionWouldBeTooLarge()
/external/v8/src/codegen/mips/
Dassembler-mips-inl.h125 Instr instr1 = Assembler::instr_at(pc + 0 * kInstrSize); in set_target_internal_reference_encoded_at() local
211 Instr instr1 = Assembler::instr_at(pc_ + 0 * kInstrSize); in target_internal_reference() local
262 Instr instr1 = instr_at(pc); in relative_code_target_object_handle_at() local
Dassembler-mips.cc854 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at() local
978 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at_put() local
3465 Instr instr1 = instr_at(pc + 0 * kInstrSize); in MSA_BIT_LIST() local
3506 Instr instr1 = instr_at(pc + 0 * kInstrSize); in RelocateRelativeReference() local
3690 Instr instr1 = instr_at(pc); in target_address_at() local
3726 Instr instr1 = instr_at(pc); in set_target_value_at() local
Dassembler-mips.h183 Instr instr1 = in pc_offset_for_safepoint() local
/external/v8/src/codegen/ppc/
Dassembler-ppc-inl.h283 Instr instr1 = instr_at(pc); in target_address_at() local
397 Instr instr1 = instr_at(pc); in PatchConstantPoolAccessInstruction() local
460 Instr instr1 = instr_at(pc); in set_target_address_at() local
Dassembler-ppc.cc336 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12()
350 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12()
/external/mesa3d/src/compiler/nir/
Dnir_opt_vectorize.c99 instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in instrs_equal()
165 instr_try_combine(struct nir_shader *nir, nir_instr *instr1, nir_instr *instr2, in instr_try_combine()
372 const nir_instr *instr1 = *(nir_instr **)util_dynarray_begin(arr1); in cmp_func() local
Dnir_instr_set.c549 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal()
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_nir_vectorize_vs_inputs.c97 r600_io_access_same_var(const nir_instr *instr1, const nir_instr *instr2) in r600_io_access_same_var()
220 const nir_instr *instr1 = *(nir_instr **)util_dynarray_begin(arr1); in r600_cmp_func() local
/external/v8/src/codegen/s390/
Dassembler-s390.cc433 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP()
/external/v8/src/codegen/mips64/
Dassembler-mips64.h181 Instr instr1 = in pc_offset_for_safepoint() local
Dassembler-mips64.cc3897 Instr instr1 = instr_at(pc + 1 * kInstrSize); in target_address_at() local
3937 Instr instr1 = instr_at(pc + kInstrSize); in set_target_value_at() local
/external/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc406 #define ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2) \ argument
3424 #define ATOMIC_ARITH_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
3433 #define ATOMIC_LOGIC_BINOP_CASE(op, instr1) \ in AssembleArchInstruction() argument
/external/tensorflow/tensorflow/compiler/tf2xla/
Dxla_compiler_test.cc761 auto instr1 = c1.instructions(j); in TEST_F() local
/external/v8/src/compiler/backend/ia32/
Dcode-generator-ia32.cc426 #define ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ argument
4273 #define ATOMIC_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument