1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include "ixheaacd_sbr_common.h"
22 #include "ixheaacd_type_def.h"
23 #include "ixheaacd_constants.h"
24 #include "ixheaacd_basic_ops32.h"
25 #include "ixheaacd_basic_ops16.h"
26 #include "ixheaacd_basic_ops40.h"
27 #include "ixheaacd_bitbuffer.h"
28 #include "ixheaacd_defines.h"
29 #include "ixheaacd_aac_rom.h"
30 #include "ixheaacd_pulsedata.h"
31
32 #include "ixheaacd_pns.h"
33 #include "ixheaacd_drc_data_struct.h"
34
35 #include "ixheaacd_lt_predict.h"
36
37 #include "ixheaacd_channelinfo.h"
38 #include "ixheaacd_drc_dec.h"
39 #include "ixheaacd_sbrdecoder.h"
40
41 #include "ixheaacd_audioobjtypes.h"
42 #include "ixheaacd_sbrdecsettings.h"
43 #include "ixheaacd_memory_standards.h"
44 #include "ixheaacd_error_codes.h"
45
46 #include "ixheaacd_defines.h"
47
48 #include "ixheaacd_sbr_scale.h"
49 #include "ixheaacd_lpp_tran.h"
50 #include "ixheaacd_env_extr_part.h"
51 #include "ixheaacd_sbr_rom.h"
52
53 #include "ixheaacd_hybrid.h"
54 #include "ixheaacd_ps_dec.h"
55 #include "ixheaacd_ps_bitdec.h"
56
57 #include "ixheaacd_pulsedata.h"
58
59 #include "ixheaacd_pns.h"
60
61 #include "ixheaacd_channelinfo.h"
62
63 #include "ixheaacd_env_extr.h"
64 #include "ixheaacd_common_rom.h"
65 #include "ixheaacd_block.h"
66 #include "ixheaacd_channel.h"
67 #include "ixheaacd_audioobjtypes.h"
68 #include "ixheaacd_latmdemux.h"
69 #include "ixheaacd_aacdec.h"
70 #include "ixheaacd_mps_polyphase.h"
71 #include "ixheaacd_config.h"
72 #include "ixheaacd_mps_dec.h"
73 #include "ixheaacd_struct_def.h"
74 #include "ixheaacd_headerdecode.h"
75
76 #include "ixheaacd_multichannel.h"
77
78 #include "ixheaacd_basic_op.h"
79 #include "ixheaacd_intrinsics.h"
80
81 static PLATFORM_INLINE UWORD32
ixheaacd_aac_showbits_7(ia_bit_buf_struct * it_bit_buff)82 ixheaacd_aac_showbits_7(ia_bit_buf_struct *it_bit_buff) {
83 UWORD8 *v = it_bit_buff->ptr_read_next;
84 UWORD32 b = 0;
85 UWORD32 x;
86 b = ((WORD32)v[0] << 8);
87 if (it_bit_buff->bit_pos < 6) {
88 b |= (WORD32)(v[1]);
89 }
90 x = (UWORD32)b << (15 + 8 - it_bit_buff->bit_pos);
91 x = (UWORD32)x >> (25);
92
93 return x;
94 }
95
ixheaacd_get_channel_mask(ia_exhaacplus_dec_api_struct * p_obj_enhaacplus_dec)96 WORD ixheaacd_get_channel_mask(
97 ia_exhaacplus_dec_api_struct *p_obj_enhaacplus_dec) {
98 WORD ixheaacd_drc_offset = 0, channel_mask = 0;
99 WORD flag1 = 0, flag2 = 0;
100 WORD ch_idx;
101 WORD *ptr_slot_element = p_obj_enhaacplus_dec->aac_config.slot_element;
102 WORD *ptr_element_type = p_obj_enhaacplus_dec->aac_config.element_type;
103
104 memset(ptr_slot_element, 0, sizeof(WORD) * MAX_BS_ELEMENT);
105
106 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
107 if (ptr_element_type[ch_idx] == 1) {
108 channel_mask += 0x3;
109 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
110 ixheaacd_drc_offset += 2;
111 flag1 = ch_idx + 1;
112 break;
113 }
114 }
115
116 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
117 if (ptr_element_type[ch_idx] == 0) {
118 channel_mask += 0x4;
119 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
120 ixheaacd_drc_offset += 1;
121 flag2 = ch_idx + 1;
122 break;
123 }
124 }
125 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
126 if (ptr_element_type[ch_idx] == 3) {
127 channel_mask += 0x8;
128 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
129 ixheaacd_drc_offset += 1;
130 break;
131 }
132 }
133 for (ch_idx = flag1; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
134 if (ptr_element_type[ch_idx] == 1) {
135 channel_mask += 0x30;
136 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
137 ixheaacd_drc_offset += 2;
138 flag1 = ch_idx + 1;
139 break;
140 }
141 }
142 for (ch_idx = flag2; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
143 if (ptr_element_type[ch_idx] == 0) {
144 channel_mask += 0x100;
145 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
146 ixheaacd_drc_offset += 1;
147 break;
148 }
149 }
150 for (ch_idx = flag1; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
151 if (ptr_element_type[ch_idx] == 1) {
152 {
153 channel_mask += (0x40 + 0x80);
154 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
155 ixheaacd_drc_offset += 2;
156 break;
157 }
158 }
159 }
160
161 return channel_mask;
162 }
163
ixheaacd_read_data_stream_element(ia_bit_buf_struct * it_bit_buff,WORD32 * byte_align_bits,ia_drc_dec_struct * drc_handle)164 VOID ixheaacd_read_data_stream_element(ia_bit_buf_struct *it_bit_buff,
165 WORD32 *byte_align_bits,
166 ia_drc_dec_struct *drc_handle) {
167 ia_bit_buf_struct temp_bs = {0};
168 WORD32 count = ixheaacd_read_bits_buf(it_bit_buff, 13);
169 WORD32 cnt = (count & 0xff);
170 WORD32 start_pos = 0;
171
172 if (cnt == 255) {
173 cnt += ixheaacd_read_bits_buf(it_bit_buff, 8);
174 }
175
176 if ((count & 0x0100) >> 8) {
177 ixheaacd_byte_align(it_bit_buff, byte_align_bits);
178 }
179
180 {
181 memcpy(&temp_bs, it_bit_buff, sizeof(ia_bit_buf_struct));
182 start_pos = temp_bs.cnt_bits;
183
184 if (ixheaacd_read_bits_buf(&temp_bs, 8) == DVB_ANC_DATA_SYNC_BYTE) {
185 int dmx_level_present, compression_present;
186 int coarse_gain_present, fine_grain_present;
187
188 ixheaacd_read_bits_buf(&temp_bs, 8);
189
190 ixheaacd_read_bits_buf(&temp_bs, 3);
191 dmx_level_present = ixheaacd_read_bits_buf(&temp_bs, 1);
192 ixheaacd_read_bits_buf(&temp_bs, 1);
193 compression_present = ixheaacd_read_bits_buf(&temp_bs, 1);
194 coarse_gain_present = ixheaacd_read_bits_buf(&temp_bs, 1);
195 fine_grain_present = ixheaacd_read_bits_buf(&temp_bs, 1);
196
197 if (dmx_level_present) ixheaacd_read_bits_buf(&temp_bs, 8);
198
199 if (compression_present) ixheaacd_read_bits_buf(&temp_bs, 16);
200
201 if (coarse_gain_present) ixheaacd_read_bits_buf(&temp_bs, 16);
202
203 if (fine_grain_present) ixheaacd_read_bits_buf(&temp_bs, 16);
204
205 if (!drc_handle->dvb_anc_data_present && temp_bs.cnt_bits >= 0) {
206 drc_handle->dvb_anc_data_pos = start_pos;
207 drc_handle->dvb_anc_data_present = 1;
208 }
209 }
210 }
211
212 if (it_bit_buff->cnt_bits < (cnt << 3)) {
213 longjmp(*(it_bit_buff->xaac_jmp_buf),
214 IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
215 }
216 it_bit_buff->ptr_read_next += cnt;
217 it_bit_buff->cnt_bits -= ((cnt) << 3);
218 }
219
ixheaacd_read_fill_element(ia_bit_buf_struct * it_bit_buff,ia_drc_dec_struct * drc_dummy,ia_drc_dec_struct * ptr_drc_dec)220 VOID ixheaacd_read_fill_element(ia_bit_buf_struct *it_bit_buff,
221 ia_drc_dec_struct *drc_dummy,
222 ia_drc_dec_struct *ptr_drc_dec) {
223 WORD32 count;
224 count = ixheaacd_read_bits_buf(it_bit_buff, 4);
225
226 if ((count - 15) == 0) {
227 count = ixheaacd_read_bits_buf(it_bit_buff, 8);
228 count = (count + 14);
229 }
230
231 if (count > 0) {
232 WORD32 extension_type;
233
234 extension_type = ixheaacd_read_bits_buf(it_bit_buff, 4);
235
236 if (extension_type == EXT_DYNAMIC_RANGE) {
237 ptr_drc_dec->drc_element_found = 1;
238 count -=
239 ixheaacd_dec_drc_read_element(ptr_drc_dec, drc_dummy, it_bit_buff);
240
241 } else {
242 ixheaacd_read_bits_buf(it_bit_buff, 4);
243
244 if (it_bit_buff->cnt_bits < ((count - 1) << 3)) {
245 longjmp(*(it_bit_buff->xaac_jmp_buf),
246 IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
247 }
248 it_bit_buff->ptr_read_next += count - 1;
249 it_bit_buff->cnt_bits -= ((count - 1) << 3);
250 }
251 }
252 }
253
ixheaacd_get_element_index_tag(ia_exhaacplus_dec_api_struct * p_obj_enhaacplus_dec,WORD ch_idx1,WORD * ch_idx,WORD * channel,WORD * ele_idx_order,WORD total_elements,WORD8 * element_used,WORD total_channels,ia_drc_dec_struct * pstr_drc_dec,ia_drc_dec_struct * drc_dummy)254 WORD32 ixheaacd_get_element_index_tag(
255 ia_exhaacplus_dec_api_struct *p_obj_enhaacplus_dec, WORD ch_idx1,
256 WORD *ch_idx, WORD *channel, WORD *ele_idx_order, WORD total_elements,
257 WORD8 *element_used, WORD total_channels, ia_drc_dec_struct *pstr_drc_dec,
258 ia_drc_dec_struct *drc_dummy) {
259 WORD element_tag, j;
260 ia_aac_dec_state_struct *p_state_enhaacplus_dec =
261 p_obj_enhaacplus_dec->p_state_aac;
262
263 ia_bit_buf_struct *it_bit_buff = p_state_enhaacplus_dec->ptr_bit_stream;
264 WORD element_idx;
265 WORD element_type;
266
267 ia_aac_decoder_struct *aac_dec_handle =
268 p_state_enhaacplus_dec->pstr_aac_dec_info[ch_idx1];
269
270 *ch_idx = ch_idx1;
271
272 if (p_state_enhaacplus_dec->bs_format != LOAS_BSFORMAT) {
273 if (ch_idx1 == 0) {
274 ixheaacd_byte_align(it_bit_buff, &aac_dec_handle->byte_align_bits);
275 }
276 }
277 {
278 if (ch_idx1 == 0) {
279 aac_dec_handle->byte_align_bits = it_bit_buff->cnt_bits;
280 }
281 }
282
283 if (it_bit_buff->cnt_bits < 3) {
284 it_bit_buff->cnt_bits = -1;
285 return (WORD16)(
286 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
287 }
288
289 element_tag = (WORD)ixheaacd_read_bits_buf(it_bit_buff, 7);
290 ixheaacd_read_bidirection(it_bit_buff, -7);
291
292 element_idx = (element_tag & 0xF);
293 element_type = (element_tag >> 4) & 0x7;
294
295 p_obj_enhaacplus_dec->aac_config.str_prog_config.alignment_bits =
296 it_bit_buff->bit_pos;
297
298 while (element_type == 4 || element_type == 5 || element_type == 6) {
299 WORD type = (WORD)ixheaacd_read_bits_buf(it_bit_buff, 3);
300
301 if (it_bit_buff->cnt_bits < 3) {
302 it_bit_buff->cnt_bits = -1;
303 return (WORD16)(
304 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
305 }
306
307 if (type == 4) {
308 ixheaacd_read_data_stream_element(
309 it_bit_buff, &aac_dec_handle->byte_align_bits, pstr_drc_dec);
310 }
311 if (type == 5) {
312 WORD32 error_code = 0;
313 error_code = ixheaacd_decode_pce(
314 it_bit_buff, &p_obj_enhaacplus_dec->aac_config.ui_pce_found_in_hdr,
315 &p_obj_enhaacplus_dec->aac_config.str_prog_config);
316 if (error_code != 0) {
317 if (error_code < 0) return error_code;
318 return IA_ENHAACPLUS_DEC_EXE_NONFATAL_DECODE_FRAME_ERROR;
319 }
320 }
321 if (type == 6) {
322 ixheaacd_read_fill_element(it_bit_buff, drc_dummy, pstr_drc_dec);
323 }
324
325 if (it_bit_buff->cnt_bits < 7) {
326 it_bit_buff->cnt_bits = -1;
327 return (WORD16)(
328 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
329 }
330
331 element_tag = (WORD)ixheaacd_aac_showbits_7(it_bit_buff);
332 element_idx = (element_tag & 0xF);
333 element_type = (element_tag >> 4) & 0x7;
334 }
335
336 if (total_elements == 2 && total_channels == 2 &&
337 p_state_enhaacplus_dec->p_config->ui_pce_found_in_hdr == 2 &&
338 ch_idx1 == 0) {
339 ixheaacd_fill_prog_config_slots(p_state_enhaacplus_dec);
340 }
341
342 *channel = 1;
343 if (element_type == 1) {
344 *channel = 2;
345 }
346
347 for (j = 0; j < total_elements; j++) {
348 if (p_obj_enhaacplus_dec->aac_config.element_type[j] == element_type &&
349 (element_idx == ele_idx_order[j]) && (element_used[j] == 0)) {
350 *ch_idx = j;
351 element_used[j] = 1;
352 break;
353 }
354 }
355
356 if (j == total_elements) {
357 if (it_bit_buff->cnt_bits < 0) {
358 return (WORD16)(
359 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
360 }
361
362 ixheaacd_read_bidirection(
363 it_bit_buff, (WORD16)(it_bit_buff->cnt_bits - it_bit_buff->size));
364 return IA_ENHAACPLUS_DEC_EXE_NONFATAL_ELE_INSTANCE_TAG_NOT_FOUND;
365 } else
366 return 0;
367 }
368