Searched defs:pll_regs (Results 1 – 3 of 3) sorted by relevance
114 struct pll_regs { struct115 u32 cscr; /* Clock Source Control Register */116 u32 mpctl0; /* MCU PLL Control Register 0 */117 u32 mpctl1; /* MCU PLL Control Register 1 */118 u32 spctl0; /* System PLL Control Register 0 */119 u32 spctl1; /* System PLL Control Register 1 */120 u32 osc26mctl; /* Oscillator 26M Register */121 u32 pcdr0; /* Peripheral Clock Divider Register 0 */122 u32 pcdr1; /* Peripheral Clock Divider Register 1 */123 u32 pccr0; /* Peripheral Clock Control Register 0 */[all …]
107 void __iomem *pll_regs = map_physmem(AR71XX_PLL_BASE, in ar934x_pll_init() local
185 void __iomem *pll_regs = map_physmem(AR71XX_PLL_BASE, in set_val() local221 void __iomem *pll_regs = map_physmem(AR71XX_PLL_BASE, in qca956x_pll_init() local